Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev:
libata: ahci_start_engine compliant to AHCI spec
ata: pata_at91.c bugfix for initial_timing initialisation
ata: pata_at91.c bugfix for high master clock
ahci: AHCI-mode SATA patch for Intel Panther Point DeviceIDs
ata_piix: IDE-mode SATA patch for Intel Panther Point DeviceIDs
libata: Pioneer DVR-216D can't do SETXFER
ahci: don't enable port irq before handler is registered
libata: Implement ATA_FLAG_NO_DIPM and apply it to mcp65
libata: Kill unused ATA_DFLAG_{H|D}IPM flags
ahci: EM supported message type sysfs attribute
This commit is contained in:
Linus Torvalds
Коммит
8f7544682c
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@ -150,7 +150,7 @@ static const struct ata_port_info ahci_port_info[] = {
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{
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AHCI_HFLAGS (AHCI_HFLAG_NO_FPDMA_AA | AHCI_HFLAG_NO_PMP |
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AHCI_HFLAG_YES_NCQ),
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.flags = AHCI_FLAG_COMMON,
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.flags = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM,
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.pio_mask = ATA_PIO4,
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.udma_mask = ATA_UDMA6,
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.port_ops = &ahci_ops,
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@ -261,6 +261,12 @@ static const struct pci_device_id ahci_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, 0x1d06), board_ahci }, /* PBG RAID */
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{ PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG RAID */
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{ PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */
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{ PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */
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{ PCI_VDEVICE(INTEL, 0x1e03), board_ahci }, /* Panther Point AHCI */
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{ PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */
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{ PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */
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{ PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */
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{ PCI_VDEVICE(INTEL, 0x1e07), board_ahci }, /* Panther Point RAID */
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/* JMicron 360/1/3/5/6, match class to avoid IDE function */
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{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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@ -229,6 +229,10 @@ enum {
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EM_CTL_ALHD = (1 << 26), /* Activity LED */
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EM_CTL_XMT = (1 << 25), /* Transmit Only */
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EM_CTL_SMB = (1 << 24), /* Single Message Buffer */
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EM_CTL_SGPIO = (1 << 19), /* SGPIO messages supported */
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EM_CTL_SES = (1 << 18), /* SES-2 messages supported */
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EM_CTL_SAFTE = (1 << 17), /* SAF-TE messages supported */
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EM_CTL_LED = (1 << 16), /* LED messages supported */
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/* em message type */
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EM_MSG_TYPE_LED = (1 << 0), /* LED */
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@ -309,6 +309,14 @@ static const struct pci_device_id piix_pci_tbl[] = {
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{ 0x8086, 0x1d00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
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/* SATA Controller IDE (PBG) */
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{ 0x8086, 0x1d08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
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/* SATA Controller IDE (Panther Point) */
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{ 0x8086, 0x1e00, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
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/* SATA Controller IDE (Panther Point) */
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{ 0x8086, 0x1e01, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_sata },
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/* SATA Controller IDE (Panther Point) */
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{ 0x8086, 0x1e08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
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/* SATA Controller IDE (Panther Point) */
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{ 0x8086, 0x1e09, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich8_2port_sata },
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{ } /* terminate list */
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};
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@ -109,6 +109,8 @@ static ssize_t ahci_read_em_buffer(struct device *dev,
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static ssize_t ahci_store_em_buffer(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t size);
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static ssize_t ahci_show_em_supported(struct device *dev,
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struct device_attribute *attr, char *buf);
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static DEVICE_ATTR(ahci_host_caps, S_IRUGO, ahci_show_host_caps, NULL);
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static DEVICE_ATTR(ahci_host_cap2, S_IRUGO, ahci_show_host_cap2, NULL);
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@ -116,6 +118,7 @@ static DEVICE_ATTR(ahci_host_version, S_IRUGO, ahci_show_host_version, NULL);
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static DEVICE_ATTR(ahci_port_cmd, S_IRUGO, ahci_show_port_cmd, NULL);
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static DEVICE_ATTR(em_buffer, S_IWUSR | S_IRUGO,
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ahci_read_em_buffer, ahci_store_em_buffer);
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static DEVICE_ATTR(em_message_supported, S_IRUGO, ahci_show_em_supported, NULL);
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struct device_attribute *ahci_shost_attrs[] = {
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&dev_attr_link_power_management_policy,
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@ -126,6 +129,7 @@ struct device_attribute *ahci_shost_attrs[] = {
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&dev_attr_ahci_host_version,
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&dev_attr_ahci_port_cmd,
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&dev_attr_em_buffer,
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&dev_attr_em_message_supported,
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NULL
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};
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EXPORT_SYMBOL_GPL(ahci_shost_attrs);
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@ -343,6 +347,24 @@ static ssize_t ahci_store_em_buffer(struct device *dev,
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return size;
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}
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static ssize_t ahci_show_em_supported(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct Scsi_Host *shost = class_to_shost(dev);
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struct ata_port *ap = ata_shost_to_port(shost);
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struct ahci_host_priv *hpriv = ap->host->private_data;
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void __iomem *mmio = hpriv->mmio;
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u32 em_ctl;
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em_ctl = readl(mmio + HOST_EM_CTL);
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return sprintf(buf, "%s%s%s%s\n",
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em_ctl & EM_CTL_LED ? "led " : "",
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em_ctl & EM_CTL_SAFTE ? "saf-te " : "",
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em_ctl & EM_CTL_SES ? "ses-2 " : "",
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em_ctl & EM_CTL_SGPIO ? "sgpio " : "");
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}
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/**
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* ahci_save_initial_config - Save and fixup initial config values
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* @dev: target AHCI device
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@ -539,6 +561,27 @@ void ahci_start_engine(struct ata_port *ap)
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{
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void __iomem *port_mmio = ahci_port_base(ap);
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u32 tmp;
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u8 status;
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status = readl(port_mmio + PORT_TFDATA) & 0xFF;
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/*
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* At end of section 10.1 of AHCI spec (rev 1.3), it states
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* Software shall not set PxCMD.ST to 1 until it is determined
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* that a functoinal device is present on the port as determined by
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* PxTFD.STS.BSY=0, PxTFD.STS.DRQ=0 and PxSSTS.DET=3h
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*
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* Even though most AHCI host controllers work without this check,
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* specific controller will fail under this condition
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*/
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if (status & (ATA_BUSY | ATA_DRQ))
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return;
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else {
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ahci_scr_read(&ap->link, SCR_STATUS, &tmp);
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if ((tmp & 0xf) != 0x3)
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return;
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}
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/* start DMA */
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tmp = readl(port_mmio + PORT_CMD);
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@ -1897,7 +1940,17 @@ static void ahci_pmp_attach(struct ata_port *ap)
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ahci_enable_fbs(ap);
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pp->intr_mask |= PORT_IRQ_BAD_PMP;
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writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
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/*
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* We must not change the port interrupt mask register if the
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* port is marked frozen, the value in pp->intr_mask will be
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* restored later when the port is thawed.
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*
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* Note that during initialization, the port is marked as
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* frozen since the irq handler is not yet registered.
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*/
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if (!(ap->pflags & ATA_PFLAG_FROZEN))
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writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
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}
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static void ahci_pmp_detach(struct ata_port *ap)
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@ -1913,7 +1966,10 @@ static void ahci_pmp_detach(struct ata_port *ap)
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writel(cmd, port_mmio + PORT_CMD);
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pp->intr_mask &= ~PORT_IRQ_BAD_PMP;
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writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
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/* see comment above in ahci_pmp_attach() */
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if (!(ap->pflags & ATA_PFLAG_FROZEN))
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writel(pp->intr_mask, port_mmio + PORT_IRQ_MASK);
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}
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int ahci_port_resume(struct ata_port *ap)
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@ -4139,6 +4139,7 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
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*/
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{ "PIONEER DVD-RW DVRTD08", "1.00", ATA_HORKAGE_NOSETXFER },
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{ "PIONEER DVD-RW DVR-212D", "1.28", ATA_HORKAGE_NOSETXFER },
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{ "PIONEER DVD-RW DVR-216D", "1.08", ATA_HORKAGE_NOSETXFER },
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/* End Marker */
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{ }
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@ -5480,7 +5481,7 @@ struct ata_port *ata_port_alloc(struct ata_host *host)
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if (!ap)
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return NULL;
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ap->pflags |= ATA_PFLAG_INITIALIZING;
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ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
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ap->lock = &host->lock;
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ap->print_id = -1;
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ap->host = host;
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@ -3316,6 +3316,7 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
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struct ata_eh_context *ehc = &link->eh_context;
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struct ata_device *dev, *link_dev = NULL, *lpm_dev = NULL;
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enum ata_lpm_policy old_policy = link->lpm_policy;
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bool no_dipm = ap->flags & ATA_FLAG_NO_DIPM;
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unsigned int hints = ATA_LPM_EMPTY | ATA_LPM_HIPM;
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unsigned int err_mask;
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int rc;
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@ -3332,7 +3333,7 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
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*/
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ata_for_each_dev(dev, link, ENABLED) {
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bool hipm = ata_id_has_hipm(dev->id);
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bool dipm = ata_id_has_dipm(dev->id);
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bool dipm = ata_id_has_dipm(dev->id) && !no_dipm;
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/* find the first enabled and LPM enabled devices */
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if (!link_dev)
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@ -3389,7 +3390,8 @@ static int ata_eh_set_lpm(struct ata_link *link, enum ata_lpm_policy policy,
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/* host config updated, enable DIPM if transitioning to MIN_POWER */
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ata_for_each_dev(dev, link, ENABLED) {
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if (policy == ATA_LPM_MIN_POWER && ata_id_has_dipm(dev->id)) {
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if (policy == ATA_LPM_MIN_POWER && !no_dipm &&
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ata_id_has_dipm(dev->id)) {
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err_mask = ata_dev_set_feature(dev,
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SETFEATURES_SATA_ENABLE, SATA_DIPM);
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if (err_mask && err_mask != AC_ERR_DEV) {
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@ -33,11 +33,12 @@
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#define DRV_NAME "pata_at91"
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#define DRV_VERSION "0.1"
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#define DRV_VERSION "0.2"
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#define CF_IDE_OFFSET 0x00c00000
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#define CF_ALT_IDE_OFFSET 0x00e00000
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#define CF_IDE_RES_SIZE 0x08
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#define NCS_RD_PULSE_LIMIT 0x3f /* maximal value for pulse bitfields */
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struct at91_ide_info {
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unsigned long mode;
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@ -49,8 +50,18 @@ struct at91_ide_info {
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void __iomem *alt_addr;
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};
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static const struct ata_timing initial_timing =
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{XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0};
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static const struct ata_timing initial_timing = {
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.mode = XFER_PIO_0,
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.setup = 70,
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.act8b = 290,
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.rec8b = 240,
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.cyc8b = 600,
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.active = 165,
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.recover = 150,
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.dmack_hold = 0,
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.cycle = 600,
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.udma = 0
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};
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static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
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{
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@ -109,6 +120,11 @@ static void set_smc_timing(struct device *dev,
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/* (CS0, CS1, DIR, OE) <= (CFCE1, CFCE2, CFRNW, NCSX) timings */
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ncs_read_setup = 1;
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ncs_read_pulse = read_cycle - 2;
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if (ncs_read_pulse > NCS_RD_PULSE_LIMIT) {
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ncs_read_pulse = NCS_RD_PULSE_LIMIT;
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dev_warn(dev, "ncs_read_pulse limited to maximal value %lu\n",
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ncs_read_pulse);
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}
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/* Write timings same as read timings */
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write_cycle = read_cycle;
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@ -137,8 +137,6 @@ enum {
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ATA_DFLAG_ACPI_PENDING = (1 << 5), /* ACPI resume action pending */
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ATA_DFLAG_ACPI_FAILED = (1 << 6), /* ACPI on devcfg has failed */
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ATA_DFLAG_AN = (1 << 7), /* AN configured */
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ATA_DFLAG_HIPM = (1 << 8), /* device supports HIPM */
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ATA_DFLAG_DIPM = (1 << 9), /* device supports DIPM */
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ATA_DFLAG_DMADIR = (1 << 10), /* device requires DMADIR */
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ATA_DFLAG_CFG_MASK = (1 << 12) - 1,
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@ -198,6 +196,7 @@ enum {
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* management */
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ATA_FLAG_SW_ACTIVITY = (1 << 22), /* driver supports sw activity
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* led */
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ATA_FLAG_NO_DIPM = (1 << 23), /* host not happy with DIPM */
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/* bits 24:31 of ap->flags are reserved for LLD specific flags */
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