drm/i915: Replace intel_ddi_pll_init()
intel_ddi_pll_init() is an anachronism. Rename it to hsw_assert_cdclk() and move it to the power domain init code. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190503193143.28240-1-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com>
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@ -1881,27 +1881,6 @@ static const struct intel_shared_dpll_funcs bxt_ddi_pll_funcs = {
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.get_hw_state = bxt_ddi_pll_get_hw_state,
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.get_hw_state = bxt_ddi_pll_get_hw_state,
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};
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};
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static void intel_ddi_pll_init(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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if (INTEL_GEN(dev_priv) < 9) {
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u32 val = I915_READ(LCPLL_CTL);
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/*
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* The LCPLL register should be turned on by the BIOS. For now
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* let's just check its state and print errors in case
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* something is wrong. Don't even try to turn it on.
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*/
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if (val & LCPLL_CD_SOURCE_FCLK)
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DRM_ERROR("CDCLK source is not LCPLL\n");
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if (val & LCPLL_PLL_DISABLE)
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DRM_ERROR("LCPLL is disabled\n");
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}
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}
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struct intel_dpll_mgr {
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struct intel_dpll_mgr {
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const struct dpll_info *dpll_info;
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const struct dpll_info *dpll_info;
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@ -3305,10 +3284,6 @@ void intel_shared_dpll_init(struct drm_device *dev)
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mutex_init(&dev_priv->dpll_lock);
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mutex_init(&dev_priv->dpll_lock);
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BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
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BUG_ON(dev_priv->num_shared_dpll > I915_NUM_PLLS);
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/* FIXME: Move this to a more suitable place */
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if (HAS_DDI(dev_priv))
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intel_ddi_pll_init(dev);
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}
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}
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/**
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/**
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@ -3625,6 +3625,23 @@ static void icl_mbus_init(struct drm_i915_private *dev_priv)
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I915_WRITE(MBUS_ABOX_CTL, val);
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I915_WRITE(MBUS_ABOX_CTL, val);
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}
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}
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static void hsw_assert_cdclk(struct drm_i915_private *dev_priv)
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{
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u32 val = I915_READ(LCPLL_CTL);
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/*
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* The LCPLL register should be turned on by the BIOS. For now
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* let's just check its state and print errors in case
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* something is wrong. Don't even try to turn it on.
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*/
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if (val & LCPLL_CD_SOURCE_FCLK)
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DRM_ERROR("CDCLK source is not LCPLL\n");
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if (val & LCPLL_PLL_DISABLE)
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DRM_ERROR("LCPLL is disabled\n");
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}
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static void intel_pch_reset_handshake(struct drm_i915_private *dev_priv,
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static void intel_pch_reset_handshake(struct drm_i915_private *dev_priv,
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bool enable)
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bool enable)
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{
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{
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@ -4085,7 +4102,10 @@ void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
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mutex_unlock(&power_domains->lock);
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mutex_unlock(&power_domains->lock);
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assert_ved_power_gated(i915);
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assert_ved_power_gated(i915);
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assert_isp_power_gated(i915);
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assert_isp_power_gated(i915);
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} else if (IS_IVYBRIDGE(i915) || INTEL_GEN(i915) >= 7) {
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} else if (IS_BROADWELL(i915) || IS_HASWELL(i915)) {
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hsw_assert_cdclk(i915);
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intel_pch_reset_handshake(i915, !HAS_PCH_NOP(i915));
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} else if (IS_IVYBRIDGE(i915)) {
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intel_pch_reset_handshake(i915, !HAS_PCH_NOP(i915));
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intel_pch_reset_handshake(i915, !HAS_PCH_NOP(i915));
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}
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}
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