IB/qib: Use cache inhibitted and guarded mapping on powerpc
The driver was requesting for a writethrough mapping. But with those flags we will end up with an SAO mapping because we now have memory conherence always enabled. ie, the existing mapping will end up with a WIMG value 0b1110 which is Strong Access Order. Update this to use cache inhibitted guarded mapping. Cc: Doug Ledford <dledford@redhat.com> Cc: Sean Hefty <sean.hefty@intel.com> Cc: Hal Rosenstock <hal.rosenstock@gmail.com> Cc: linux-rdma@vger.kernel.org Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Acked-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -822,10 +822,7 @@ static int mmap_piobufs(struct vm_area_struct *vma,
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phys = dd->physaddr + piobufs;
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#if defined(__powerpc__)
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/* There isn't a generic way to specify writethrough mappings */
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pgprot_val(vma->vm_page_prot) |= _PAGE_NO_CACHE;
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pgprot_val(vma->vm_page_prot) |= _PAGE_WRITETHRU;
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pgprot_val(vma->vm_page_prot) &= ~_PAGE_GUARDED;
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vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
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#endif
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/*
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@ -144,13 +144,7 @@ int qib_pcie_ddinit(struct qib_devdata *dd, struct pci_dev *pdev,
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addr = pci_resource_start(pdev, 0);
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len = pci_resource_len(pdev, 0);
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#if defined(__powerpc__)
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/* There isn't a generic way to specify writethrough mappings */
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dd->kregbase = __ioremap(addr, len, _PAGE_NO_CACHE | _PAGE_WRITETHRU);
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#else
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dd->kregbase = ioremap_nocache(addr, len);
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#endif
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if (!dd->kregbase)
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return -ENOMEM;
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