sparc: Access kernel TSB using physical addressing when possible.
On sun4v this is basically required since we point the hypervisor and the TSB walking hardware at these tables using physical addressing too. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
Родитель
a61b582954
Коммит
9076d0e7e0
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@ -133,29 +133,6 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
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sub TSB, 0x8, TSB; \
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TSB_STORE(TSB, TAG);
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#define KTSB_LOAD_QUAD(TSB, REG) \
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ldda [TSB] ASI_NUCLEUS_QUAD_LDD, REG;
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#define KTSB_STORE(ADDR, VAL) \
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stxa VAL, [ADDR] ASI_N;
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#define KTSB_LOCK_TAG(TSB, REG1, REG2) \
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99: lduwa [TSB] ASI_N, REG1; \
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sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\
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andcc REG1, REG2, %g0; \
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bne,pn %icc, 99b; \
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nop; \
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casa [TSB] ASI_N, REG1, REG2;\
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cmp REG1, REG2; \
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bne,pn %icc, 99b; \
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nop; \
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#define KTSB_WRITE(TSB, TTE, TAG) \
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add TSB, 0x8, TSB; \
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stxa TTE, [TSB] ASI_N; \
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sub TSB, 0x8, TSB; \
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stxa TAG, [TSB] ASI_N;
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/* Do a kernel page table walk. Leaves physical PTE pointer in
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* REG1. Jumps to FAIL_LABEL on early page table walk termination.
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* VADDR will not be clobbered, but REG2 will.
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@ -239,6 +216,8 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
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(KERNEL_TSB_SIZE_BYTES / 16)
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#define KERNEL_TSB4M_NENTRIES 4096
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#define KTSB_PHYS_SHIFT 15
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/* Do a kernel TSB lookup at tl>0 on VADDR+TAG, branch to OK_LABEL
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* on TSB hit. REG1, REG2, REG3, and REG4 are used as temporaries
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* and the found TTE will be left in REG1. REG3 and REG4 must
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@ -247,13 +226,22 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
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* VADDR and TAG will be preserved and not clobbered by this macro.
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*/
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#define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
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sethi %hi(swapper_tsb), REG1; \
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661: sethi %hi(swapper_tsb), REG1; \
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or REG1, %lo(swapper_tsb), REG1; \
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.section .swapper_tsb_phys_patch, "ax"; \
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.word 661b; \
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.previous; \
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661: nop; \
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.section .tsb_ldquad_phys_patch, "ax"; \
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.word 661b; \
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sllx REG1, KTSB_PHYS_SHIFT, REG1; \
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sllx REG1, KTSB_PHYS_SHIFT, REG1; \
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.previous; \
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srlx VADDR, PAGE_SHIFT, REG2; \
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and REG2, (KERNEL_TSB_NENTRIES - 1), REG2; \
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sllx REG2, 4, REG2; \
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add REG1, REG2, REG2; \
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KTSB_LOAD_QUAD(REG2, REG3); \
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TSB_LOAD_QUAD(REG2, REG3); \
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cmp REG3, TAG; \
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be,a,pt %xcc, OK_LABEL; \
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mov REG4, REG1;
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@ -263,12 +251,21 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
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* we can make use of that for the index computation.
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*/
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#define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
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sethi %hi(swapper_4m_tsb), REG1; \
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661: sethi %hi(swapper_4m_tsb), REG1; \
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or REG1, %lo(swapper_4m_tsb), REG1; \
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.section .swapper_4m_tsb_phys_patch, "ax"; \
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.word 661b; \
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.previous; \
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661: nop; \
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.section .tsb_ldquad_phys_patch, "ax"; \
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.word 661b; \
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sllx REG1, KTSB_PHYS_SHIFT, REG1; \
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sllx REG1, KTSB_PHYS_SHIFT, REG1; \
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.previous; \
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and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \
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sllx REG2, 4, REG2; \
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add REG1, REG2, REG2; \
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KTSB_LOAD_QUAD(REG2, REG3); \
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TSB_LOAD_QUAD(REG2, REG3); \
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cmp REG3, TAG; \
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be,a,pt %xcc, OK_LABEL; \
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mov REG4, REG1;
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@ -47,16 +47,16 @@ kvmap_itlb_tsb_miss:
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kvmap_itlb_vmalloc_addr:
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KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_itlb_longpath)
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KTSB_LOCK_TAG(%g1, %g2, %g7)
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TSB_LOCK_TAG(%g1, %g2, %g7)
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/* Load and check PTE. */
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ldxa [%g5] ASI_PHYS_USE_EC, %g5
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mov 1, %g7
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sllx %g7, TSB_TAG_INVALID_BIT, %g7
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brgez,a,pn %g5, kvmap_itlb_longpath
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KTSB_STORE(%g1, %g7)
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TSB_STORE(%g1, %g7)
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KTSB_WRITE(%g1, %g5, %g6)
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TSB_WRITE(%g1, %g5, %g6)
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/* fallthrough to TLB load */
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@ -102,9 +102,9 @@ kvmap_itlb_longpath:
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kvmap_itlb_obp:
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OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_itlb_longpath)
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KTSB_LOCK_TAG(%g1, %g2, %g7)
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TSB_LOCK_TAG(%g1, %g2, %g7)
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KTSB_WRITE(%g1, %g5, %g6)
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TSB_WRITE(%g1, %g5, %g6)
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ba,pt %xcc, kvmap_itlb_load
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nop
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@ -112,17 +112,17 @@ kvmap_itlb_obp:
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kvmap_dtlb_obp:
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OBP_TRANS_LOOKUP(%g4, %g5, %g2, %g3, kvmap_dtlb_longpath)
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KTSB_LOCK_TAG(%g1, %g2, %g7)
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TSB_LOCK_TAG(%g1, %g2, %g7)
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KTSB_WRITE(%g1, %g5, %g6)
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TSB_WRITE(%g1, %g5, %g6)
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ba,pt %xcc, kvmap_dtlb_load
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nop
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.align 32
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kvmap_dtlb_tsb4m_load:
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KTSB_LOCK_TAG(%g1, %g2, %g7)
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KTSB_WRITE(%g1, %g5, %g6)
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TSB_LOCK_TAG(%g1, %g2, %g7)
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TSB_WRITE(%g1, %g5, %g6)
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ba,pt %xcc, kvmap_dtlb_load
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nop
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@ -222,16 +222,16 @@ kvmap_linear_patch:
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kvmap_dtlb_vmalloc_addr:
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KERN_PGTABLE_WALK(%g4, %g5, %g2, kvmap_dtlb_longpath)
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KTSB_LOCK_TAG(%g1, %g2, %g7)
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TSB_LOCK_TAG(%g1, %g2, %g7)
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/* Load and check PTE. */
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ldxa [%g5] ASI_PHYS_USE_EC, %g5
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mov 1, %g7
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sllx %g7, TSB_TAG_INVALID_BIT, %g7
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brgez,a,pn %g5, kvmap_dtlb_longpath
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KTSB_STORE(%g1, %g7)
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TSB_STORE(%g1, %g7)
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KTSB_WRITE(%g1, %g5, %g6)
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TSB_WRITE(%g1, %g5, %g6)
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/* fallthrough to TLB load */
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@ -107,6 +107,16 @@ SECTIONS
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*(.sun4v_2insn_patch)
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__sun4v_2insn_patch_end = .;
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}
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.swapper_tsb_phys_patch : {
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__swapper_tsb_phys_patch = .;
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*(.swapper_tsb_phys_patch)
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__swapper_tsb_phys_patch_end = .;
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}
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.swapper_4m_tsb_phys_patch : {
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__swapper_4m_tsb_phys_patch = .;
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*(.swapper_4m_tsb_phys_patch)
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__swapper_4m_tsb_phys_patch_end = .;
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}
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.popc_3insn_patch : {
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__popc_3insn_patch = .;
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*(.popc_3insn_patch)
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@ -1597,6 +1597,42 @@ static void __init tsb_phys_patch(void)
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static struct hv_tsb_descr ktsb_descr[NUM_KTSB_DESCR];
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extern struct tsb swapper_tsb[KERNEL_TSB_NENTRIES];
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static void patch_one_ktsb_phys(unsigned int *start, unsigned int *end, unsigned long pa)
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{
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pa >>= KTSB_PHYS_SHIFT;
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while (start < end) {
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unsigned int *ia = (unsigned int *)(unsigned long)*start;
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ia[0] = (ia[0] & ~0x3fffff) | (pa >> 10);
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__asm__ __volatile__("flush %0" : : "r" (ia));
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ia[1] = (ia[1] & ~0x3ff) | (pa & 0x3ff);
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__asm__ __volatile__("flush %0" : : "r" (ia + 1));
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start++;
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}
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}
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static void ktsb_phys_patch(void)
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{
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extern unsigned int __swapper_tsb_phys_patch;
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extern unsigned int __swapper_tsb_phys_patch_end;
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extern unsigned int __swapper_4m_tsb_phys_patch;
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extern unsigned int __swapper_4m_tsb_phys_patch_end;
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unsigned long ktsb_pa;
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ktsb_pa = kern_base + ((unsigned long)&swapper_tsb[0] - KERNBASE);
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patch_one_ktsb_phys(&__swapper_tsb_phys_patch,
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&__swapper_tsb_phys_patch_end, ktsb_pa);
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#ifndef CONFIG_DEBUG_PAGEALLOC
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ktsb_pa = (kern_base +
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((unsigned long)&swapper_4m_tsb[0] - KERNBASE));
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patch_one_ktsb_phys(&__swapper_4m_tsb_phys_patch,
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&__swapper_4m_tsb_phys_patch_end, ktsb_pa);
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#endif
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}
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static void __init sun4v_ktsb_init(void)
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{
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unsigned long ktsb_pa;
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@ -1716,8 +1752,10 @@ void __init paging_init(void)
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sun4u_pgprot_init();
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if (tlb_type == cheetah_plus ||
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tlb_type == hypervisor)
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tlb_type == hypervisor) {
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tsb_phys_patch();
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ktsb_phys_patch();
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}
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if (tlb_type == hypervisor) {
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sun4v_patch_tlb_handlers();
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