drm/i915: re-layout intel_panel.c to obey 80 char limit
Especially intel_gmch_panel_fitting was shifting way too much over the right edge and also was way too long. So extract two helpers, one for gen4+ and one for gen2/3. Now the entire thing is again almost readable ... Spurred by checkpatch freaking out about a Ville's pipeconfig rework in intel_panel.c Otherwise just two lines that needed appropriate breaking. Not functional change in this patch. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Damien Lespiau <damien.lespiau@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -73,8 +73,10 @@ intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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{
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u32 scaled_width = adjusted_mode->hdisplay * pipe_config->pipe_src_h;
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u32 scaled_height = pipe_config->pipe_src_w * adjusted_mode->vdisplay;
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u32 scaled_width = adjusted_mode->hdisplay
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* pipe_config->pipe_src_h;
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u32 scaled_height = pipe_config->pipe_src_w
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* adjusted_mode->vdisplay;
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if (scaled_width > scaled_height) { /* pillar */
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width = scaled_height / pipe_config->pipe_src_h;
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if (width & 1)
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@ -169,6 +171,83 @@ static inline u32 panel_fitter_scaling(u32 source, u32 target)
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return (FACTOR * ratio + FACTOR/2) / FACTOR;
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}
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static void i965_scale_aspect(struct intel_crtc_config *pipe_config,
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u32 *pfit_control)
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{
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struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
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u32 scaled_width = adjusted_mode->hdisplay *
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pipe_config->pipe_src_h;
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u32 scaled_height = pipe_config->pipe_src_w *
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adjusted_mode->vdisplay;
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/* 965+ is easy, it does everything in hw */
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if (scaled_width > scaled_height)
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*pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_PILLAR;
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else if (scaled_width < scaled_height)
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*pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_LETTER;
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else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
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*pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
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}
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static void i9xx_scale_aspect(struct intel_crtc_config *pipe_config,
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u32 *pfit_control, u32 *pfit_pgm_ratios,
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u32 *border)
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{
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struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
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u32 scaled_width = adjusted_mode->hdisplay *
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pipe_config->pipe_src_h;
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u32 scaled_height = pipe_config->pipe_src_w *
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adjusted_mode->vdisplay;
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u32 bits;
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/*
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* For earlier chips we have to calculate the scaling
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* ratio by hand and program it into the
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* PFIT_PGM_RATIO register
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*/
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if (scaled_width > scaled_height) { /* pillar */
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centre_horizontally(adjusted_mode,
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scaled_height /
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pipe_config->pipe_src_h);
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*border = LVDS_BORDER_ENABLE;
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if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
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bits = panel_fitter_scaling(pipe_config->pipe_src_h,
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adjusted_mode->vdisplay);
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*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
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bits << PFIT_VERT_SCALE_SHIFT);
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*pfit_control |= (PFIT_ENABLE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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} else if (scaled_width < scaled_height) { /* letter */
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centre_vertically(adjusted_mode,
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scaled_width /
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pipe_config->pipe_src_w);
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*border = LVDS_BORDER_ENABLE;
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if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
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bits = panel_fitter_scaling(pipe_config->pipe_src_w,
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adjusted_mode->hdisplay);
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*pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
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bits << PFIT_VERT_SCALE_SHIFT);
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*pfit_control |= (PFIT_ENABLE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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} else {
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/* Aspects match, Let hw scale both directions */
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*pfit_control |= (PFIT_ENABLE |
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VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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}
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void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
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struct intel_crtc_config *pipe_config,
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int fitting_mode)
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@ -196,67 +275,11 @@ void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
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break;
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case DRM_MODE_SCALE_ASPECT:
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/* Scale but preserve the aspect ratio */
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if (INTEL_INFO(dev)->gen >= 4) {
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u32 scaled_width = adjusted_mode->hdisplay *
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pipe_config->pipe_src_h;
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u32 scaled_height = pipe_config->pipe_src_w *
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adjusted_mode->vdisplay;
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/* 965+ is easy, it does everything in hw */
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if (scaled_width > scaled_height)
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pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_PILLAR;
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else if (scaled_width < scaled_height)
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pfit_control |= PFIT_ENABLE |
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PFIT_SCALING_LETTER;
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else if (adjusted_mode->hdisplay != pipe_config->pipe_src_w)
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pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
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} else {
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u32 scaled_width = adjusted_mode->hdisplay *
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pipe_config->pipe_src_h;
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u32 scaled_height = pipe_config->pipe_src_w *
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adjusted_mode->vdisplay;
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/*
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* For earlier chips we have to calculate the scaling
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* ratio by hand and program it into the
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* PFIT_PGM_RATIO register
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*/
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if (scaled_width > scaled_height) { /* pillar */
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centre_horizontally(adjusted_mode,
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scaled_height /
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pipe_config->pipe_src_h);
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border = LVDS_BORDER_ENABLE;
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if (pipe_config->pipe_src_h != adjusted_mode->vdisplay) {
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u32 bits = panel_fitter_scaling(pipe_config->pipe_src_h, adjusted_mode->vdisplay);
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pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
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bits << PFIT_VERT_SCALE_SHIFT);
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pfit_control |= (PFIT_ENABLE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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} else if (scaled_width < scaled_height) { /* letter */
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centre_vertically(adjusted_mode,
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scaled_width /
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pipe_config->pipe_src_w);
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border = LVDS_BORDER_ENABLE;
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if (pipe_config->pipe_src_w != adjusted_mode->hdisplay) {
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u32 bits = panel_fitter_scaling(pipe_config->pipe_src_w, adjusted_mode->hdisplay);
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pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
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bits << PFIT_VERT_SCALE_SHIFT);
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pfit_control |= (PFIT_ENABLE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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} else {
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/* Aspects match, Let hw scale both directions */
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pfit_control |= (PFIT_ENABLE |
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VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
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VERT_INTERP_BILINEAR |
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HORIZ_INTERP_BILINEAR);
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}
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}
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if (INTEL_INFO(dev)->gen >= 4)
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i965_scale_aspect(pipe_config, &pfit_control);
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else
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i9xx_scale_aspect(pipe_config, &pfit_control,
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&pfit_pgm_ratios, &border);
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break;
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case DRM_MODE_SCALE_FULLSCREEN:
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/*
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@ -438,7 +461,8 @@ static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
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I915_WRITE(BLC_PWM_CPU_CTL, val | level);
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}
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static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
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static void intel_panel_actually_set_backlight(struct drm_device *dev,
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u32 level)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 tmp;
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