pxafb: move parallel LCD timing setup into dedicate function
the new_regs stuff has been removed, and all the setup (modification to those fbi->reg_*) is protected with IRQ disabled * disable IRQ is too heavy here, provided that no IRQ context will touch the fbi->reg_* and the only possible contending place is in the CPUFREQ_POSTCHANGE (task context), a mutex will be better, leave this for future improvement Signed-off-by: eric miao <eric.miao@marvell.com> Cc: "Antonino A. Daplas" <adaplas@pol.net> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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90eabbf0ec
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@ -594,6 +594,43 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal,
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return 0;
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}
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static void setup_parallel_timing(struct pxafb_info *fbi,
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struct fb_var_screeninfo *var)
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{
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unsigned int lines_per_panel, pcd = get_pcd(fbi, var->pixclock);
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fbi->reg_lccr1 =
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LCCR1_DisWdth(var->xres) +
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LCCR1_HorSnchWdth(var->hsync_len) +
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LCCR1_BegLnDel(var->left_margin) +
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LCCR1_EndLnDel(var->right_margin);
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/*
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* If we have a dual scan LCD, we need to halve
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* the YRES parameter.
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*/
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lines_per_panel = var->yres;
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if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual)
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lines_per_panel /= 2;
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fbi->reg_lccr2 =
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LCCR2_DisHght(lines_per_panel) +
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LCCR2_VrtSnchWdth(var->vsync_len) +
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LCCR2_BegFrmDel(var->upper_margin) +
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LCCR2_EndFrmDel(var->lower_margin);
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fbi->reg_lccr3 = fbi->lccr3 |
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(var->sync & FB_SYNC_HOR_HIGH_ACT ?
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LCCR3_HorSnchH : LCCR3_HorSnchL) |
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(var->sync & FB_SYNC_VERT_HIGH_ACT ?
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LCCR3_VrtSnchH : LCCR3_VrtSnchL);
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if (pcd) {
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fbi->reg_lccr3 |= LCCR3_PixClkDiv(pcd);
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set_hsync_time(fbi, pcd);
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}
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}
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/*
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* pxafb_activate_var():
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* Configures LCD Controller based on entries in var parameter.
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@ -602,9 +639,7 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal,
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static int pxafb_activate_var(struct fb_var_screeninfo *var,
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struct pxafb_info *fbi)
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{
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struct pxafb_lcd_reg new_regs;
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u_long flags;
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u_int lines_per_panel, pcd = get_pcd(fbi, var->pixclock);
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size_t nbytes;
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#if DEBUG_VAR
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@ -645,61 +680,31 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
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printk(KERN_ERR "%s: invalid lower_margin %d\n",
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fbi->fb.fix.id, var->lower_margin);
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#endif
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new_regs.lccr0 = fbi->lccr0 |
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(LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM |
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LCCR0_QDM | LCCR0_BM | LCCR0_OUM);
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new_regs.lccr1 =
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LCCR1_DisWdth(var->xres) +
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LCCR1_HorSnchWdth(var->hsync_len) +
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LCCR1_BegLnDel(var->left_margin) +
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LCCR1_EndLnDel(var->right_margin);
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/*
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* If we have a dual scan LCD, we need to halve
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* the YRES parameter.
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*/
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lines_per_panel = var->yres;
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if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual)
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lines_per_panel /= 2;
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new_regs.lccr2 =
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LCCR2_DisHght(lines_per_panel) +
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LCCR2_VrtSnchWdth(var->vsync_len) +
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LCCR2_BegFrmDel(var->upper_margin) +
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LCCR2_EndFrmDel(var->lower_margin);
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new_regs.lccr3 = fbi->lccr3 |
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pxafb_bpp_to_lccr3(var) |
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(var->sync & FB_SYNC_HOR_HIGH_ACT ?
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LCCR3_HorSnchH : LCCR3_HorSnchL) |
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(var->sync & FB_SYNC_VERT_HIGH_ACT ?
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LCCR3_VrtSnchH : LCCR3_VrtSnchL);
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if (pcd)
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new_regs.lccr3 |= LCCR3_PixClkDiv(pcd);
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/* Update shadow copy atomically */
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local_irq_save(flags);
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nbytes = lines_per_panel * fbi->fb.fix.line_length;
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setup_parallel_timing(fbi, var);
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if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual)
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fbi->reg_lccr0 = fbi->lccr0 |
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(LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM |
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LCCR0_QDM | LCCR0_BM | LCCR0_OUM);
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fbi->reg_lccr3 |= pxafb_bpp_to_lccr3(var);
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nbytes = var->yres * fbi->fb.fix.line_length;
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if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual) {
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nbytes = nbytes / 2;
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setup_frame_dma(fbi, DMA_LOWER, PAL_NONE, nbytes, nbytes);
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}
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if (var->bits_per_pixel >= 16)
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setup_frame_dma(fbi, DMA_BASE, PAL_NONE, 0, nbytes);
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else
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setup_frame_dma(fbi, DMA_BASE, PAL_BASE, 0, nbytes);
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fbi->reg_lccr0 = new_regs.lccr0;
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fbi->reg_lccr1 = new_regs.lccr1;
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fbi->reg_lccr2 = new_regs.lccr2;
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fbi->reg_lccr3 = new_regs.lccr3;
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fbi->reg_lccr4 = lcd_readl(fbi, LCCR4) & ~LCCR4_PAL_FOR_MASK;
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fbi->reg_lccr4 |= (fbi->lccr4 & LCCR4_PAL_FOR_MASK);
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set_hsync_time(fbi, pcd);
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local_irq_restore(flags);
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/*
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@ -21,14 +21,6 @@
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* for more details.
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*/
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/* Shadows for LCD controller registers */
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struct pxafb_lcd_reg {
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unsigned int lccr0;
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unsigned int lccr1;
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unsigned int lccr2;
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unsigned int lccr3;
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};
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/* PXA LCD DMA descriptor */
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struct pxafb_dma_descriptor {
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unsigned int fdadr;
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