drm/i915: PSR: Let's rely more on frontbuffer tracking.
The ultimate goal here is to remove the dependency we currently have on audio driver power to get PSR working. Since with audio driver runtime PM disabled the Hardware tracking believes graphics is fully active and prevent PSR Entry, or in other words continuously exit PSR. So, the idea is to transfer the PSR exit responsability from the HW tracking to the SW tracking (frontbuffer tracking), who is really mature right now. However with LPSP masked out there might be cases where we could miss exit from HW tracking since it can be relying on this, like a specific case reported at our mailing list who user reported he would miss screen updates if scrolling firefox in a Gnome environment when i915 runtimepm was enabled. So before masking out LPSP again to make us independent from the audio driver we need to make sure that all our cases are coverred from the frontbuffer tracking perspective, where the flush means invalidate and flush. Without this patch for HSW, BDW and SKL we just do the invalidate part when the flush wasn't originated by a page flip because we were trusting the HW tracking for the flip case. So let's rely more on frontbuffer tracking and do the invalidation regardless the origin as expected for all platforms. v2: Improve commit message as suggested by Paulo. v3: Another attempt to let commit message more clear. Cc: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Damien Lespiau damien.lespiau@intel.com Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -734,25 +734,9 @@ void intel_psr_flush(struct drm_device *dev,
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frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(pipe);
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dev_priv->psr.busy_frontbuffer_bits &= ~frontbuffer_bits;
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if (HAS_DDI(dev)) {
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/*
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* By definition every flush should mean invalidate + flush,
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* however on core platforms let's minimize the
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* disable/re-enable so we can avoid the invalidate when flip
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* originated the flush.
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*/
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if (frontbuffer_bits && origin != ORIGIN_FLIP)
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intel_psr_exit(dev);
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} else {
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/*
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* On Valleyview and Cherryview we don't use hardware tracking
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* so any plane updates or cursor moves don't result in a PSR
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* invalidating. Which means we need to manually fake this in
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* software for all flushes.
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*/
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if (frontbuffer_bits)
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intel_psr_exit(dev);
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}
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/* By definition flush = invalidate + flush */
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if (frontbuffer_bits)
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intel_psr_exit(dev);
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if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)
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if (!work_busy(&dev_priv->psr.work.work))
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