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ARM: OMAP2+: PM: share clkdms_setup() across OMAP2, 3, 4 

clkdms_setup() is identical across OMAP2, 3, and 4, so share it.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
This commit is contained in:
Paul Walmsley 2012-02-02 02:38:50 -07:00 коммит произвёл Kevin Hilman
Родитель e68e8093ed
Коммит 92206fd292
5 изменённых файлов: 14 добавлений и 45 удалений
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10
arch/arm/mach-omap2/pm.c
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@ -68,6 +68,16 @@ static void omap2_init_processor_devices(void)
#define FORCEWAKEUP_SWITCH 0
#define LOWPOWERSTATE_SWITCH 1
int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
{
if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
clkdm_allow_idle(clkdm);
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
atomic_read(&clkdm->usecount) == 0)
clkdm_sleep(clkdm);
return 0;
}
/*
* This sets pwrdm state (other than mpu & core. Currently only ON &
* RET are supported.

1
arch/arm/mach-omap2/pm.h
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@ -22,6 +22,7 @@ extern int omap3_can_sleep(void);
extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state);
extern int omap3_idle_init(void);
extern int omap4_idle_init(void);
extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
#if defined(CONFIG_PM_OPP)
extern int omap3_opp_init(void);

13
arch/arm/mach-omap2/pm24xx.c
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@ -283,17 +283,6 @@ static const struct platform_suspend_ops omap_pm_ops = {
static const struct platform_suspend_ops __initdata omap_pm_ops;
#endif /* CONFIG_SUSPEND */
/* XXX This function should be shareable between OMAP2xxx and OMAP3 */
static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
{
if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
clkdm_allow_idle(clkdm);
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
atomic_read(&clkdm->usecount) == 0)
clkdm_sleep(clkdm);
return 0;
}
static void __init prcm_setup_regs(void)
{
int i, num_mem_banks;
@ -335,7 +324,7 @@ static void __init prcm_setup_regs(void)
clkdm_sleep(gfx_clkdm);
/* Enable hardware-supervised idle for all clkdms */
clkdm_for_each(clkdms_setup, NULL);
clkdm_for_each(omap_pm_clkdms_setup, NULL);
clkdm_add_wkdep(mpu_clkdm, wkup_clkdm);
/* REVISIT: Configure number of 32 kHz clock cycles for sys_clk

17
arch/arm/mach-omap2/pm34xx.c
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@ -735,21 +735,6 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
return omap_set_pwrdm_state(pwrst->pwrdm, pwrst->next_state);
}
/*
* Enable hw supervised mode for all clockdomains if it's
* supported. Initiate sleep transition for other clockdomains, if
* they are not used
*/
static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
{
if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
clkdm_allow_idle(clkdm);
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
atomic_read(&clkdm->usecount) == 0)
clkdm_sleep(clkdm);
return 0;
}
/*
* Push functions to SRAM
*
@ -819,7 +804,7 @@ static int __init omap3_pm_init(void)
goto err2;
}
(void) clkdm_for_each(clkdms_setup, NULL);
(void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
if (mpu_pwrdm == NULL) {

18
arch/arm/mach-omap2/pm44xx.c
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@ -120,22 +120,6 @@ static const struct platform_suspend_ops omap_pm_ops = {
};
#endif /* CONFIG_SUSPEND */
/*
* Enable hardware supervised mode for all clockdomains if it's
* supported. Initiate sleep transition for other clockdomains, if
* they are not used
*/
static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
{
if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
clkdm_allow_idle(clkdm);
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
atomic_read(&clkdm->usecount) == 0)
clkdm_sleep(clkdm);
return 0;
}
static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
{
struct power_state *pwrst;
@ -247,7 +231,7 @@ static int __init omap4_pm_init(void)
goto err2;
}
(void) clkdm_for_each(clkdms_setup, NULL);
(void) clkdm_for_each(omap_pm_clkdms_setup, NULL);
#ifdef CONFIG_SUSPEND
suspend_set_ops(&omap_pm_ops);