Merge branches 'devel-cleanup', 'devel-board', 'devel-early-init' and 'devel-ti816x' into omap-for-linus
This commit is contained in:
Коммит
9238b6d8e8
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@ -4,7 +4,7 @@
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# Common support
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obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
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obj-y += clock.o clock_data.o opp_data.o
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obj-y += clock.o clock_data.o opp_data.o reset.o
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obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
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|
|
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@ -165,7 +165,7 @@ static struct map_desc ams_delta_io_desc[] __initdata = {
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}
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};
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static struct omap_lcd_config ams_delta_lcd_config __initdata = {
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static struct omap_lcd_config ams_delta_lcd_config = {
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.ctrl_name = "internal",
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};
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@ -175,7 +175,7 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
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.pins[0] = 2,
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};
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static struct omap_board_config_kernel ams_delta_config[] = {
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static struct omap_board_config_kernel ams_delta_config[] __initdata = {
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{ OMAP_TAG_LCD, &ams_delta_lcd_config },
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};
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@ -208,14 +208,14 @@ static const struct matrix_keymap_data ams_delta_keymap_data = {
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.keymap_size = ARRAY_SIZE(ams_delta_keymap),
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};
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static struct omap_kp_platform_data ams_delta_kp_data = {
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static struct omap_kp_platform_data ams_delta_kp_data __initdata = {
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.rows = 8,
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.cols = 8,
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.keymap_data = &ams_delta_keymap_data,
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.delay = 9,
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};
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static struct platform_device ams_delta_kp_device = {
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static struct platform_device ams_delta_kp_device __initdata = {
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.name = "omap-keypad",
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.id = -1,
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.dev = {
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@ -225,12 +225,12 @@ static struct platform_device ams_delta_kp_device = {
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.resource = ams_delta_kp_resources,
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};
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static struct platform_device ams_delta_lcd_device = {
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static struct platform_device ams_delta_lcd_device __initdata = {
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.name = "lcd_ams_delta",
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.id = -1,
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};
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static struct platform_device ams_delta_led_device = {
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static struct platform_device ams_delta_led_device __initdata = {
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.name = "ams-delta-led",
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.id = -1
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};
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@ -259,7 +259,7 @@ static int ams_delta_camera_power(struct device *dev, int power)
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#define ams_delta_camera_power NULL
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#endif
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static struct soc_camera_link __initdata ams_delta_iclink = {
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static struct soc_camera_link ams_delta_iclink = {
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.bus_id = 0, /* OMAP1 SoC camera bus */
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.i2c_adapter_id = 1,
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.board_info = &ams_delta_camera_board_info[0],
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@ -267,7 +267,7 @@ static struct soc_camera_link __initdata ams_delta_iclink = {
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.power = ams_delta_camera_power,
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};
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static struct platform_device ams_delta_camera_device = {
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static struct platform_device ams_delta_camera_device __initdata = {
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.name = "soc-camera-pdrv",
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.id = 0,
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.dev = {
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|
|
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@ -287,11 +287,11 @@ static struct platform_device *devices[] __initdata = {
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&lcd_device,
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};
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static struct omap_lcd_config fsample_lcd_config __initdata = {
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static struct omap_lcd_config fsample_lcd_config = {
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.ctrl_name = "internal",
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};
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static struct omap_board_config_kernel fsample_config[] = {
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static struct omap_board_config_kernel fsample_config[] __initdata = {
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{ OMAP_TAG_LCD, &fsample_lcd_config },
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};
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|
|
|
@ -202,7 +202,7 @@ static int h2_nand_dev_ready(struct mtd_info *mtd)
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static const char *h2_part_probes[] = { "cmdlinepart", NULL };
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struct platform_nand_data h2_nand_platdata = {
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static struct platform_nand_data h2_nand_platdata = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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|
|
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@ -204,7 +204,7 @@ static int nand_dev_ready(struct mtd_info *mtd)
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|
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static const char *part_probes[] = { "cmdlinepart", NULL };
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struct platform_nand_data nand_platdata = {
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static struct platform_nand_data nand_platdata = {
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.chip = {
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.nr_chips = 1,
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.chip_offset = 0,
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|
|
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@ -331,7 +331,7 @@ static struct resource htcpld_resources[] = {
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},
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};
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struct htcpld_chip_platform_data htcpld_chips[] = {
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static struct htcpld_chip_platform_data htcpld_chips[] = {
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[0] = {
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.addr = 0x03,
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.reset = 0x04,
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@ -366,7 +366,7 @@ struct htcpld_chip_platform_data htcpld_chips[] = {
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},
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};
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struct htcpld_core_platform_data htcpld_pfdata = {
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static struct htcpld_core_platform_data htcpld_pfdata = {
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.int_reset_gpio_hi = HTCPLD_GPIO_INT_RESET_HI,
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.int_reset_gpio_lo = HTCPLD_GPIO_INT_RESET_LO,
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.i2c_adapter_id = 1,
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|
|
@ -365,7 +365,7 @@ static struct omap_mmc_platform_data mmc1_data = {
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static struct omap_mmc_platform_data *mmc_data[OMAP16XX_NR_MMC];
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void __init innovator_mmc_init(void)
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static void __init innovator_mmc_init(void)
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{
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mmc_data[0] = &mmc1_data;
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omap1_init_mmc(mmc_data, OMAP15XX_NR_MMC);
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|
@ -115,7 +115,7 @@ static struct mipid_platform_data nokia770_mipid_platform_data = {
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.shutdown = mipid_shutdown,
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};
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|
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static void mipid_dev_init(void)
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static void __init mipid_dev_init(void)
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{
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const struct omap_lcd_config *conf;
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@ -126,7 +126,7 @@ static void mipid_dev_init(void)
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}
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}
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static void ads7846_dev_init(void)
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static void __init ads7846_dev_init(void)
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{
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if (gpio_request(ADS7846_PENDOWN_GPIO, "ADS7846 pendown") < 0)
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printk(KERN_ERR "can't get ads7846 pen down GPIO\n");
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@ -170,7 +170,7 @@ static struct hwa742_platform_data nokia770_hwa742_platform_data = {
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.te_connected = 1,
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};
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static void hwa742_dev_init(void)
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static void __init hwa742_dev_init(void)
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{
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clk_add_alias("hwa_sys_ck", NULL, "bclk", NULL);
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omapfb_set_ctrl_platform_data(&nokia770_hwa742_platform_data);
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|
|
|
@ -230,19 +230,6 @@ static struct spi_board_info palmte_spi_info[] __initdata = {
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},
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};
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static void palmte_headphones_detect(void *data, int state)
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{
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if (state) {
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/* Headphones connected, disable speaker */
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gpio_set_value(PALMTE_SPEAKER_GPIO, 0);
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printk(KERN_INFO "PM: speaker off\n");
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} else {
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/* Headphones unplugged, re-enable speaker */
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gpio_set_value(PALMTE_SPEAKER_GPIO, 1);
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printk(KERN_INFO "PM: speaker on\n");
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}
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}
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static void __init palmte_misc_gpio_setup(void)
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{
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/* Set TSC2102 PINTDAV pin as input (used by TSC2102 driver) */
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|
|
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@ -26,10 +26,12 @@
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#include <linux/smc91x.h>
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#include <mach/hardware.h>
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#include <mach/system.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <plat/board-voiceblue.h>
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#include <plat/common.h>
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#include <mach/gpio.h>
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#include <plat/flash.h>
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@ -163,52 +165,6 @@ static void __init voiceblue_init_irq(void)
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omap_init_irq();
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}
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static void __init voiceblue_init(void)
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{
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/* mux pins for uarts */
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omap_cfg_reg(UART1_TX);
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omap_cfg_reg(UART1_RTS);
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omap_cfg_reg(UART2_TX);
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omap_cfg_reg(UART2_RTS);
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omap_cfg_reg(UART3_TX);
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omap_cfg_reg(UART3_RX);
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/* Watchdog */
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gpio_request(0, "Watchdog");
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/* smc91x reset */
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gpio_request(7, "SMC91x reset");
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gpio_direction_output(7, 1);
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udelay(2); /* wait at least 100ns */
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gpio_set_value(7, 0);
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mdelay(50); /* 50ms until PHY ready */
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/* smc91x interrupt pin */
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gpio_request(8, "SMC91x irq");
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/* 16C554 reset*/
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gpio_request(6, "16C554 reset");
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gpio_direction_output(6, 0);
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/* 16C554 interrupt pins */
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gpio_request(12, "16C554 irq");
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gpio_request(13, "16C554 irq");
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gpio_request(14, "16C554 irq");
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gpio_request(15, "16C554 irq");
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set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
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set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
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set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
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set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
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platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
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omap_board_config = voiceblue_config;
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omap_board_config_size = ARRAY_SIZE(voiceblue_config);
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omap_serial_init();
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omap1_usb_init(&voiceblue_usb_config);
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omap_register_i2c_bus(1, 100, NULL, 0);
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|
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/* There is a good chance board is going up, so enable power LED
|
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* (it is connected through invertor) */
|
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omap_writeb(0x00, OMAP_LPG1_LCR);
|
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omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */
|
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}
|
||||
|
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static void __init voiceblue_map_io(void)
|
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{
|
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omap1_map_common_io();
|
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|
@ -275,8 +231,17 @@ void voiceblue_wdt_ping(void)
|
|||
gpio_set_value(0, wdt_gpio_state);
|
||||
}
|
||||
|
||||
void voiceblue_reset(void)
|
||||
static void voiceblue_reset(char mode, const char *cmd)
|
||||
{
|
||||
/*
|
||||
* Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
|
||||
* "Global Software Reset Affects Traffic Controller Frequency".
|
||||
*/
|
||||
if (cpu_is_omap5912()) {
|
||||
omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL);
|
||||
omap_writew(0x8, ARM_RSTCT1);
|
||||
}
|
||||
|
||||
set_bit(MACHINE_REBOOT, &machine_state);
|
||||
voiceblue_wdt_enable();
|
||||
while (1) ;
|
||||
|
@ -286,6 +251,54 @@ EXPORT_SYMBOL(voiceblue_wdt_enable);
|
|||
EXPORT_SYMBOL(voiceblue_wdt_disable);
|
||||
EXPORT_SYMBOL(voiceblue_wdt_ping);
|
||||
|
||||
static void __init voiceblue_init(void)
|
||||
{
|
||||
/* mux pins for uarts */
|
||||
omap_cfg_reg(UART1_TX);
|
||||
omap_cfg_reg(UART1_RTS);
|
||||
omap_cfg_reg(UART2_TX);
|
||||
omap_cfg_reg(UART2_RTS);
|
||||
omap_cfg_reg(UART3_TX);
|
||||
omap_cfg_reg(UART3_RX);
|
||||
|
||||
/* Watchdog */
|
||||
gpio_request(0, "Watchdog");
|
||||
/* smc91x reset */
|
||||
gpio_request(7, "SMC91x reset");
|
||||
gpio_direction_output(7, 1);
|
||||
udelay(2); /* wait at least 100ns */
|
||||
gpio_set_value(7, 0);
|
||||
mdelay(50); /* 50ms until PHY ready */
|
||||
/* smc91x interrupt pin */
|
||||
gpio_request(8, "SMC91x irq");
|
||||
/* 16C554 reset*/
|
||||
gpio_request(6, "16C554 reset");
|
||||
gpio_direction_output(6, 0);
|
||||
/* 16C554 interrupt pins */
|
||||
gpio_request(12, "16C554 irq");
|
||||
gpio_request(13, "16C554 irq");
|
||||
gpio_request(14, "16C554 irq");
|
||||
gpio_request(15, "16C554 irq");
|
||||
set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING);
|
||||
set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING);
|
||||
set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING);
|
||||
set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING);
|
||||
|
||||
platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices));
|
||||
omap_board_config = voiceblue_config;
|
||||
omap_board_config_size = ARRAY_SIZE(voiceblue_config);
|
||||
omap_serial_init();
|
||||
omap1_usb_init(&voiceblue_usb_config);
|
||||
omap_register_i2c_bus(1, 100, NULL, 0);
|
||||
|
||||
/* There is a good chance board is going up, so enable power LED
|
||||
* (it is connected through invertor) */
|
||||
omap_writeb(0x00, OMAP_LPG1_LCR);
|
||||
omap_writeb(0x00, OMAP_LPG1_PMR); /* Disable clock */
|
||||
|
||||
arch_reset = voiceblue_reset;
|
||||
}
|
||||
|
||||
MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
|
||||
/* Maintainer: Ladislav Michl <michl@2n.cz> */
|
||||
.boot_params = 0x10000100,
|
||||
|
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* OMAP1 reset support
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/system.h>
|
||||
#include <plat/prcm.h>
|
||||
|
||||
void omap1_arch_reset(char mode, const char *cmd)
|
||||
{
|
||||
/*
|
||||
* Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
|
||||
* "Global Software Reset Affects Traffic Controller Frequency".
|
||||
*/
|
||||
if (cpu_is_omap5912()) {
|
||||
omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL);
|
||||
omap_writew(0x8, ARM_RSTCT1);
|
||||
}
|
||||
|
||||
omap_writew(1, ARM_RSTCT1);
|
||||
}
|
||||
|
||||
void (*arch_reset)(char, const char *) = omap1_arch_reset;
|
|
@ -53,25 +53,30 @@ config ARCH_OMAP4
|
|||
comment "OMAP Core Type"
|
||||
depends on ARCH_OMAP2
|
||||
|
||||
config ARCH_OMAP2420
|
||||
config SOC_OMAP2420
|
||||
bool "OMAP2420 support"
|
||||
depends on ARCH_OMAP2
|
||||
default y
|
||||
select OMAP_DM_TIMER
|
||||
select ARCH_OMAP_OTG
|
||||
|
||||
config ARCH_OMAP2430
|
||||
config SOC_OMAP2430
|
||||
bool "OMAP2430 support"
|
||||
depends on ARCH_OMAP2
|
||||
default y
|
||||
select ARCH_OMAP_OTG
|
||||
|
||||
config ARCH_OMAP3430
|
||||
config SOC_OMAP3430
|
||||
bool "OMAP3430 support"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select ARCH_OMAP_OTG
|
||||
|
||||
config SOC_OMAPTI816X
|
||||
bool "TI816X support"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
|
||||
config OMAP_PACKAGE_ZAF
|
||||
bool
|
||||
|
||||
|
@ -106,25 +111,25 @@ config MACH_OMAP_GENERIC
|
|||
|
||||
config MACH_OMAP2_TUSB6010
|
||||
bool
|
||||
depends on ARCH_OMAP2 && ARCH_OMAP2420
|
||||
depends on ARCH_OMAP2 && SOC_OMAP2420
|
||||
default y if MACH_NOKIA_N8X0
|
||||
|
||||
config MACH_OMAP_H4
|
||||
bool "OMAP 2420 H4 board"
|
||||
depends on ARCH_OMAP2420
|
||||
depends on SOC_OMAP2420
|
||||
default y
|
||||
select OMAP_PACKAGE_ZAF
|
||||
select OMAP_DEBUG_DEVICES
|
||||
|
||||
config MACH_OMAP_APOLLON
|
||||
bool "OMAP 2420 Apollon board"
|
||||
depends on ARCH_OMAP2420
|
||||
depends on SOC_OMAP2420
|
||||
default y
|
||||
select OMAP_PACKAGE_ZAC
|
||||
|
||||
config MACH_OMAP_2430SDP
|
||||
bool "OMAP 2430 SDP board"
|
||||
depends on ARCH_OMAP2430
|
||||
depends on SOC_OMAP2430
|
||||
default y
|
||||
select OMAP_PACKAGE_ZAC
|
||||
|
||||
|
@ -219,7 +224,7 @@ config MACH_NOKIA_N810_WIMAX
|
|||
|
||||
config MACH_NOKIA_N8X0
|
||||
bool "Nokia N800/N810"
|
||||
depends on ARCH_OMAP2420
|
||||
depends on SOC_OMAP2420
|
||||
default y
|
||||
select OMAP_PACKAGE_ZAC
|
||||
select MACH_NOKIA_N800
|
||||
|
@ -294,6 +299,11 @@ config MACH_OMAP_3630SDP
|
|||
default y
|
||||
select OMAP_PACKAGE_CBP
|
||||
|
||||
config MACH_TI8168EVM
|
||||
bool "TI8168 Evaluation Module"
|
||||
depends on SOC_OMAPTI816X
|
||||
default y
|
||||
|
||||
config MACH_OMAP_4430SDP
|
||||
bool "OMAP 4430 SDP board"
|
||||
default y
|
||||
|
|
|
@ -31,8 +31,8 @@ AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
|
|||
AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a$(plus_sec)
|
||||
|
||||
# Functions loaded to SRAM
|
||||
obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o
|
||||
obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += sram242x.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += sram243x.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += sram34xx.o
|
||||
|
||||
AFLAGS_sram242x.o :=-Wa,-march=armv6
|
||||
|
@ -40,8 +40,8 @@ AFLAGS_sram243x.o :=-Wa,-march=armv6
|
|||
AFLAGS_sram34xx.o :=-Wa,-march=armv7-a
|
||||
|
||||
# Pin multiplexing
|
||||
obj-$(CONFIG_ARCH_OMAP2420) += mux2420.o
|
||||
obj-$(CONFIG_ARCH_OMAP2430) += mux2430.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += mux2420.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += mux2430.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o
|
||||
obj-$(CONFIG_ARCH_OMAP4) += mux44xx.o
|
||||
|
||||
|
@ -113,8 +113,8 @@ obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o \
|
|||
clkt2xxx_dpllcore.o \
|
||||
clkt2xxx_virt_prcm_set.o \
|
||||
clkt2xxx_apll.o clkt2xxx_osc.o
|
||||
obj-$(CONFIG_ARCH_OMAP2420) += clock2420_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP2430) += clock2430.o clock2430_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += clock2420_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += clock2430.o clock2430_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o \
|
||||
clock34xx.o clkt34xx_dpll3m2.o \
|
||||
clock3517.o clock36xx.o \
|
||||
|
@ -123,12 +123,12 @@ obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) clock44xx_data.o \
|
|||
dpll3xxx.o
|
||||
|
||||
# OMAP2 clock rate set data (old "OPP" data)
|
||||
obj-$(CONFIG_ARCH_OMAP2420) += opp2420_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP2430) += opp2430_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o
|
||||
|
||||
# hwmod data
|
||||
obj-$(CONFIG_ARCH_OMAP2420) += omap_hwmod_2420_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP2430) += omap_hwmod_2430_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
|
||||
|
||||
|
@ -224,6 +224,7 @@ obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
|
|||
|
||||
obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o \
|
||||
hsmmc.o
|
||||
obj-$(CONFIG_MACH_TI8168EVM) += board-ti8168evm.o
|
||||
# Platform specific device init code
|
||||
usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o
|
||||
obj-y += $(usbfs-m) $(usbfs-y)
|
||||
|
|
|
@ -139,13 +139,12 @@ static struct omap_board_config_kernel sdp2430_config[] __initdata = {
|
|||
{OMAP_TAG_LCD, &sdp2430_lcd_config},
|
||||
};
|
||||
|
||||
static void __init omap_2430sdp_init_irq(void)
|
||||
static void __init omap_2430sdp_init_early(void)
|
||||
{
|
||||
omap_board_config = sdp2430_config;
|
||||
omap_board_config_size = ARRAY_SIZE(sdp2430_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
|
||||
|
@ -253,9 +252,10 @@ static void __init omap_2430sdp_map_io(void)
|
|||
MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
|
||||
/* Maintainer: Syed Khasim - Texas Instruments Inc */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap_2430sdp_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_2430sdp_init_irq,
|
||||
.map_io = omap_2430sdp_map_io,
|
||||
.init_early = omap_2430sdp_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap_2430sdp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -327,14 +327,13 @@ static struct platform_device *sdp3430_devices[] __initdata = {
|
|||
static struct omap_board_config_kernel sdp3430_config[] __initdata = {
|
||||
};
|
||||
|
||||
static void __init omap_3430sdp_init_irq(void)
|
||||
static void __init omap_3430sdp_init_early(void)
|
||||
{
|
||||
omap_board_config = sdp3430_config;
|
||||
omap_board_config_size = ARRAY_SIZE(sdp3430_config);
|
||||
omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static int sdp3430_batt_table[] = {
|
||||
|
@ -822,9 +821,10 @@ static void __init omap_3430sdp_init(void)
|
|||
MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
|
||||
/* Maintainer: Syed Khasim - Texas Instruments Inc */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_3430sdp_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_3430sdp_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap_3430sdp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -69,14 +69,13 @@ static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
|
|||
static struct omap_board_config_kernel sdp_config[] __initdata = {
|
||||
};
|
||||
|
||||
static void __init omap_sdp_init_irq(void)
|
||||
static void __init omap_sdp_init_early(void)
|
||||
{
|
||||
omap_board_config = sdp_config;
|
||||
omap_board_config_size = ARRAY_SIZE(sdp_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params,
|
||||
h8mbx00u0mer0em_sdrc_params);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
|
@ -216,9 +215,10 @@ static void __init omap_sdp_init(void)
|
|||
|
||||
MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_sdp_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_sdp_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap_sdp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -239,7 +239,7 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {
|
|||
{ OMAP_TAG_LCD, &sdp4430_lcd_config },
|
||||
};
|
||||
|
||||
static void __init omap_4430sdp_init_irq(void)
|
||||
static void __init omap_4430sdp_init_early(void)
|
||||
{
|
||||
omap_board_config = sdp4430_config;
|
||||
omap_board_config_size = ARRAY_SIZE(sdp4430_config);
|
||||
|
@ -248,7 +248,6 @@ static void __init omap_4430sdp_init_irq(void)
|
|||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(1);
|
||||
#endif
|
||||
gic_init_irq();
|
||||
}
|
||||
|
||||
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
|
||||
|
@ -605,9 +604,10 @@ static void __init omap_4430sdp_map_io(void)
|
|||
MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
|
||||
/* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap_4430sdp_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_4430sdp_init_irq,
|
||||
.map_io = omap_4430sdp_map_io,
|
||||
.init_early = omap_4430sdp_init_early,
|
||||
.init_irq = gic_init_irq,
|
||||
.init_machine = omap_4430sdp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -49,14 +49,13 @@ static struct omap_board_mux board_mux[] __initdata = {
|
|||
#define board_mux NULL
|
||||
#endif
|
||||
|
||||
static void __init am3517_crane_init_irq(void)
|
||||
static void __init am3517_crane_init_early(void)
|
||||
{
|
||||
omap_board_config = am3517_crane_config;
|
||||
omap_board_config_size = ARRAY_SIZE(am3517_crane_config);
|
||||
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
|
||||
|
@ -108,9 +107,10 @@ static void __init am3517_crane_init(void)
|
|||
|
||||
MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = am3517_crane_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = am3517_crane_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = am3517_crane_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -396,13 +396,12 @@ static struct platform_device *am3517_evm_devices[] __initdata = {
|
|||
&am3517_evm_dss_device,
|
||||
};
|
||||
|
||||
static void __init am3517_evm_init_irq(void)
|
||||
static void __init am3517_evm_init_early(void)
|
||||
{
|
||||
omap_board_config = am3517_evm_config;
|
||||
omap_board_config_size = ARRAY_SIZE(am3517_evm_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_musb_board_data musb_board_data = {
|
||||
|
@ -521,9 +520,10 @@ static void __init am3517_evm_init(void)
|
|||
|
||||
MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = am3517_evm_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = am3517_evm_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = am3517_evm_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -274,13 +274,12 @@ static struct omap_board_config_kernel apollon_config[] __initdata = {
|
|||
{ OMAP_TAG_LCD, &apollon_lcd_config },
|
||||
};
|
||||
|
||||
static void __init omap_apollon_init_irq(void)
|
||||
static void __init omap_apollon_init_early(void)
|
||||
{
|
||||
omap_board_config = apollon_config;
|
||||
omap_board_config_size = ARRAY_SIZE(apollon_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static void __init apollon_led_init(void)
|
||||
|
@ -355,9 +354,10 @@ static void __init omap_apollon_map_io(void)
|
|||
MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
|
||||
/* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap_apollon_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_apollon_init_irq,
|
||||
.map_io = omap_apollon_map_io,
|
||||
.init_early = omap_apollon_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap_apollon_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -683,7 +683,7 @@ static void __init cm_t35_init_i2c(void)
|
|||
static struct omap_board_config_kernel cm_t35_config[] __initdata = {
|
||||
};
|
||||
|
||||
static void __init cm_t35_init_irq(void)
|
||||
static void __init cm_t35_init_early(void)
|
||||
{
|
||||
omap_board_config = cm_t35_config;
|
||||
omap_board_config_size = ARRAY_SIZE(cm_t35_config);
|
||||
|
@ -691,7 +691,6 @@ static void __init cm_t35_init_irq(void)
|
|||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
|
||||
mt46h32m32lf6_sdrc_params);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_board_mux board_mux[] __initdata = {
|
||||
|
@ -815,9 +814,10 @@ static void __init cm_t35_init(void)
|
|||
|
||||
MACHINE_START(CM_T35, "Compulab CM-T35")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = cm_t35_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = cm_t35_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = cm_t35_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -254,14 +254,13 @@ static inline void cm_t3517_init_nand(void) {}
|
|||
static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
|
||||
};
|
||||
|
||||
static void __init cm_t3517_init_irq(void)
|
||||
static void __init cm_t3517_init_early(void)
|
||||
{
|
||||
omap_board_config = cm_t3517_config;
|
||||
omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
|
||||
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_board_mux board_mux[] __initdata = {
|
||||
|
@ -303,9 +302,10 @@ static void __init cm_t3517_init(void)
|
|||
|
||||
MACHINE_START(CM_T3517, "Compulab CM-T3517")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = cm_t3517_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = cm_t3517_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = cm_t3517_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -456,11 +456,15 @@ static struct platform_device keys_gpio = {
|
|||
};
|
||||
|
||||
|
||||
static void __init devkit8000_init_irq(void)
|
||||
static void __init devkit8000_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
|
||||
mt46h32m32lf6_sdrc_params);
|
||||
}
|
||||
|
||||
static void __init devkit8000_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
|
@ -813,8 +817,9 @@ static void __init devkit8000_init(void)
|
|||
|
||||
MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = devkit8000_init_early,
|
||||
.init_irq = devkit8000_init_irq,
|
||||
.init_machine = devkit8000_init,
|
||||
.timer = &omap_timer,
|
||||
|
|
|
@ -33,13 +33,12 @@
|
|||
static struct omap_board_config_kernel generic_config[] = {
|
||||
};
|
||||
|
||||
static void __init omap_generic_init_irq(void)
|
||||
static void __init omap_generic_init_early(void)
|
||||
{
|
||||
omap_board_config = generic_config;
|
||||
omap_board_config_size = ARRAY_SIZE(generic_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static void __init omap_generic_init(void)
|
||||
|
@ -68,9 +67,10 @@ static void __init omap_generic_map_io(void)
|
|||
MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
|
||||
/* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap_generic_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_generic_init_irq,
|
||||
.map_io = omap_generic_map_io,
|
||||
.init_early = omap_generic_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -290,12 +290,16 @@ static struct omap_board_config_kernel h4_config[] __initdata = {
|
|||
{ OMAP_TAG_LCD, &h4_lcd_config },
|
||||
};
|
||||
|
||||
static void __init omap_h4_init_irq(void)
|
||||
static void __init omap_h4_init_early(void)
|
||||
{
|
||||
omap_board_config = h4_config;
|
||||
omap_board_config_size = ARRAY_SIZE(h4_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
}
|
||||
|
||||
static void __init omap_h4_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
h4_init_flash();
|
||||
}
|
||||
|
@ -378,8 +382,9 @@ static void __init omap_h4_map_io(void)
|
|||
MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
|
||||
/* Maintainer: Paul Mundt <paul.mundt@nokia.com> */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap_h4_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap_h4_map_io,
|
||||
.init_early = omap_h4_init_early,
|
||||
.init_irq = omap_h4_init_irq,
|
||||
.init_machine = omap_h4_init,
|
||||
.timer = &omap_timer,
|
||||
|
|
|
@ -525,12 +525,11 @@ static struct platform_device *igep2_devices[] __initdata = {
|
|||
&igep2_vwlan_device,
|
||||
};
|
||||
|
||||
static void __init igep2_init_irq(void)
|
||||
static void __init igep2_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(m65kxxxxam_sdrc_params,
|
||||
m65kxxxxam_sdrc_params);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct twl4030_codec_audio_data igep2_audio_data = {
|
||||
|
@ -716,9 +715,10 @@ static void __init igep2_init(void)
|
|||
|
||||
MACHINE_START(IGEP0020, "IGEP v2 board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = igep2_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = igep2_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = igep2_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -331,12 +331,11 @@ static struct platform_device *igep3_devices[] __initdata = {
|
|||
&igep3_vwlan_device,
|
||||
};
|
||||
|
||||
static void __init igep3_init_irq(void)
|
||||
static void __init igep3_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(m65kxxxxam_sdrc_params,
|
||||
m65kxxxxam_sdrc_params);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct twl4030_platform_data igep3_twl4030_pdata = {
|
||||
|
@ -452,7 +451,8 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
|
|||
.boot_params = 0x80000100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_irq = igep3_init_irq,
|
||||
.init_early = igep3_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = igep3_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -288,13 +288,12 @@ static struct omap_board_config_kernel ldp_config[] __initdata = {
|
|||
{ OMAP_TAG_LCD, &ldp_lcd_config },
|
||||
};
|
||||
|
||||
static void __init omap_ldp_init_irq(void)
|
||||
static void __init omap_ldp_init_early(void)
|
||||
{
|
||||
omap_board_config = ldp_config;
|
||||
omap_board_config_size = ARRAY_SIZE(ldp_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct twl4030_usb_data ldp_usb_data = {
|
||||
|
@ -443,9 +442,10 @@ static void __init omap_ldp_init(void)
|
|||
|
||||
MACHINE_START(OMAP_LDP, "OMAP LDP board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_ldp_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_ldp_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap_ldp_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -628,11 +628,10 @@ static void __init n8x0_map_io(void)
|
|||
omap242x_map_common_io();
|
||||
}
|
||||
|
||||
static void __init n8x0_init_irq(void)
|
||||
static void __init n8x0_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
|
@ -703,27 +702,30 @@ static void __init n8x0_init_machine(void)
|
|||
|
||||
MACHINE_START(NOKIA_N800, "Nokia N800")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = n8x0_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = n8x0_init_irq,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(NOKIA_N810, "Nokia N810")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = n8x0_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = n8x0_init_irq,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = n8x0_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = n8x0_init_irq,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -536,11 +536,15 @@ static struct platform_device keys_gpio = {
|
|||
},
|
||||
};
|
||||
|
||||
static void __init omap3_beagle_init_irq(void)
|
||||
static void __init omap3_beagle_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
|
||||
mt46h32m32lf6_sdrc_params);
|
||||
}
|
||||
|
||||
static void __init omap3_beagle_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
|
@ -638,8 +642,9 @@ static void __init omap3_beagle_init(void)
|
|||
MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
|
||||
/* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3_beagle_init_early,
|
||||
.init_irq = omap3_beagle_init_irq,
|
||||
.init_machine = omap3_beagle_init,
|
||||
.timer = &omap_timer,
|
||||
|
|
|
@ -625,13 +625,12 @@ static struct spi_board_info omap3evm_spi_board_info[] = {
|
|||
static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
|
||||
};
|
||||
|
||||
static void __init omap3_evm_init_irq(void)
|
||||
static void __init omap3_evm_init_early(void)
|
||||
{
|
||||
omap_board_config = omap3_evm_config;
|
||||
omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct platform_device *omap3_evm_devices[] __initdata = {
|
||||
|
@ -720,9 +719,10 @@ static void __init omap3_evm_init(void)
|
|||
MACHINE_START(OMAP3EVM, "OMAP3 EVM")
|
||||
/* Maintainer: Syed Mohammed Khasim - Texas Instruments */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap3_evm_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3_evm_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap3_evm_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -195,11 +195,10 @@ static inline void __init board_smsc911x_init(void)
|
|||
gpmc_smsc911x_init(&board_smsc911x_data);
|
||||
}
|
||||
|
||||
static void __init omap3logic_init_irq(void)
|
||||
static void __init omap3logic_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
|
@ -225,7 +224,8 @@ static void __init omap3logic_init(void)
|
|||
MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.init_irq = omap3logic_init_irq,
|
||||
.init_early = omap3logic_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap3logic_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
@ -233,7 +233,8 @@ MACHINE_END
|
|||
MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.init_irq = omap3logic_init_irq,
|
||||
.init_early = omap3logic_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap3logic_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -634,12 +634,11 @@ static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
|
|||
}
|
||||
};
|
||||
|
||||
static void __init omap3pandora_init_irq(void)
|
||||
static void __init omap3pandora_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
|
||||
mt46h32m32lf6_sdrc_params);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static void __init pandora_wl1251_init(void)
|
||||
|
@ -727,9 +726,10 @@ static void __init omap3pandora_init(void)
|
|||
|
||||
MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap3pandora_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3pandora_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap3pandora_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -591,12 +591,16 @@ static struct spi_board_info omap3stalker_spi_board_info[] = {
|
|||
static struct omap_board_config_kernel omap3_stalker_config[] __initdata = {
|
||||
};
|
||||
|
||||
static void __init omap3_stalker_init_irq(void)
|
||||
static void __init omap3_stalker_init_early(void)
|
||||
{
|
||||
omap_board_config = omap3_stalker_config;
|
||||
omap_board_config_size = ARRAY_SIZE(omap3_stalker_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL);
|
||||
}
|
||||
|
||||
static void __init omap3_stalker_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
|
@ -666,6 +670,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
|
|||
/* Maintainer: Jason Lam -lzg@ema-tech.com */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3_stalker_init_early,
|
||||
.init_irq = omap3_stalker_init_irq,
|
||||
.init_machine = omap3_stalker_init,
|
||||
.timer = &omap_timer,
|
||||
|
|
|
@ -415,7 +415,7 @@ static struct omap_board_mux board_mux[] __initdata = {
|
|||
};
|
||||
#endif
|
||||
|
||||
static void __init omap3_touchbook_init_irq(void)
|
||||
static void __init omap3_touchbook_init_early(void)
|
||||
{
|
||||
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
|
||||
omap_board_config = omap3_touchbook_config;
|
||||
|
@ -423,6 +423,10 @@ static void __init omap3_touchbook_init_irq(void)
|
|||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
|
||||
mt46h32m32lf6_sdrc_params);
|
||||
}
|
||||
|
||||
static void __init omap3_touchbook_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
|
@ -538,8 +542,9 @@ static void __init omap3_touchbook_init(void)
|
|||
MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
|
||||
/* Maintainer: Gregoire Gentil - http://www.alwaysinnovating.com */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3_touchbook_init_early,
|
||||
.init_irq = omap3_touchbook_init_irq,
|
||||
.init_machine = omap3_touchbook_init,
|
||||
.timer = &omap_timer,
|
||||
|
|
|
@ -76,11 +76,10 @@ static struct platform_device *panda_devices[] __initdata = {
|
|||
&leds_gpio,
|
||||
};
|
||||
|
||||
static void __init omap4_panda_init_irq(void)
|
||||
static void __init omap4_panda_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
gic_init_irq();
|
||||
}
|
||||
|
||||
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
|
||||
|
@ -424,7 +423,8 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
|
|||
.boot_params = 0x80000100,
|
||||
.reserve = omap_reserve,
|
||||
.map_io = omap4_panda_map_io,
|
||||
.init_irq = omap4_panda_init_irq,
|
||||
.init_early = omap4_panda_init_early,
|
||||
.init_irq = gic_init_irq,
|
||||
.init_machine = omap4_panda_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -409,14 +409,13 @@ static struct omap_board_config_kernel overo_config[] __initdata = {
|
|||
{ OMAP_TAG_LCD, &overo_lcd_config },
|
||||
};
|
||||
|
||||
static void __init overo_init_irq(void)
|
||||
static void __init overo_init_early(void)
|
||||
{
|
||||
omap_board_config = overo_config;
|
||||
omap_board_config_size = ARRAY_SIZE(overo_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
|
||||
mt46h32m32lf6_sdrc_params);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static struct platform_device *overo_devices[] __initdata = {
|
||||
|
@ -501,9 +500,10 @@ static void __init overo_init(void)
|
|||
|
||||
MACHINE_START(OVERO, "Gumstix Overo")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = overo_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = overo_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = overo_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -138,14 +138,13 @@ static void __init rm680_peripherals_init(void)
|
|||
omap2_hsmmc_init(mmc);
|
||||
}
|
||||
|
||||
static void __init rm680_init_irq(void)
|
||||
static void __init rm680_init_early(void)
|
||||
{
|
||||
struct omap_sdrc_params *sdrc_params;
|
||||
|
||||
omap2_init_common_infrastructure();
|
||||
sdrc_params = nokia_get_sdram_timings();
|
||||
omap2_init_common_devices(sdrc_params, sdrc_params);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
|
@ -176,9 +175,10 @@ static void __init rm680_map_io(void)
|
|||
|
||||
MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = rm680_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = rm680_init_irq,
|
||||
.map_io = rm680_map_io,
|
||||
.init_early = rm680_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = rm680_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -98,7 +98,7 @@ static struct omap_board_config_kernel rx51_config[] = {
|
|||
{ OMAP_TAG_LCD, &rx51_lcd_config },
|
||||
};
|
||||
|
||||
static void __init rx51_init_irq(void)
|
||||
static void __init rx51_init_early(void)
|
||||
{
|
||||
struct omap_sdrc_params *sdrc_params;
|
||||
|
||||
|
@ -108,7 +108,6 @@ static void __init rx51_init_irq(void)
|
|||
omap2_init_common_infrastructure();
|
||||
sdrc_params = nokia_get_sdram_timings();
|
||||
omap2_init_common_devices(sdrc_params, sdrc_params);
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
extern void __init rx51_peripherals_init(void);
|
||||
|
@ -149,9 +148,10 @@ static void __init rx51_map_io(void)
|
|||
MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
|
||||
/* Maintainer: Lauri Leukkunen <lauri.leukkunen@nokia.com> */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = rx51_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = rx51_init_irq,
|
||||
.map_io = rx51_map_io,
|
||||
.init_early = rx51_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = rx51_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -0,0 +1,62 @@
|
|||
/*
|
||||
* Code for TI8168 EVM.
|
||||
*
|
||||
* Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
|
||||
#include <plat/irqs.h>
|
||||
#include <plat/board.h>
|
||||
#include <plat/common.h>
|
||||
|
||||
static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
|
||||
};
|
||||
|
||||
static void __init ti8168_init_early(void)
|
||||
{
|
||||
omap_board_config = ti8168_evm_config;
|
||||
omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
}
|
||||
|
||||
static void __init ti8168_evm_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static void __init ti8168_evm_init(void)
|
||||
{
|
||||
omap_serial_init();
|
||||
}
|
||||
|
||||
static void __init ti8168_evm_map_io(void)
|
||||
{
|
||||
omap2_set_globals_ti816x();
|
||||
omapti816x_map_common_io();
|
||||
}
|
||||
|
||||
MACHINE_START(TI8168EVM, "ti8168evm")
|
||||
/* Maintainer: Texas Instruments */
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = ti8168_evm_map_io,
|
||||
.init_early = ti8168_init_early,
|
||||
.init_irq = ti8168_evm_init_irq,
|
||||
.timer = &omap_timer,
|
||||
.init_machine = ti8168_evm_init,
|
||||
MACHINE_END
|
|
@ -33,7 +33,7 @@
|
|||
|
||||
#define ZOOM3_EHCI_RESET_GPIO 64
|
||||
|
||||
static void __init omap_zoom_init_irq(void)
|
||||
static void __init omap_zoom_init_early(void)
|
||||
{
|
||||
omap2_init_common_infrastructure();
|
||||
if (machine_is_omap_zoom2())
|
||||
|
@ -42,8 +42,6 @@ static void __init omap_zoom_init_irq(void)
|
|||
else if (machine_is_omap_zoom3())
|
||||
omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params,
|
||||
h8mbx00u0mer0em_sdrc_params);
|
||||
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OMAP_MUX
|
||||
|
@ -135,18 +133,20 @@ static void __init omap_zoom_init(void)
|
|||
|
||||
MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_zoom_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_zoom_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.reserve = omap_reserve,
|
||||
.init_irq = omap_zoom_init_irq,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_zoom_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
.timer = &omap_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -20,13 +20,13 @@ u32 omap2xxx_get_apll_clkin(void);
|
|||
u32 omap2xxx_get_sysclkdiv(void);
|
||||
void omap2xxx_clk_prepare_for_reboot(void);
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
int omap2420_clk_init(void);
|
||||
#else
|
||||
#define omap2420_clk_init() 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
int omap2430_clk_init(void);
|
||||
#else
|
||||
#define omap2430_clk_init() 0
|
||||
|
|
|
@ -3471,6 +3471,9 @@ int __init omap3xxx_clk_init(void)
|
|||
} else if (cpu_is_omap3630()) {
|
||||
cpu_mask = (RATE_IN_34XX | RATE_IN_36XX);
|
||||
cpu_clkflg = CK_36XX;
|
||||
} else if (cpu_is_ti816x()) {
|
||||
cpu_mask = RATE_IN_TI816X;
|
||||
cpu_clkflg = CK_TI816X;
|
||||
} else if (cpu_is_omap34xx()) {
|
||||
if (omap_rev() == OMAP3430_REV_ES1_0) {
|
||||
cpu_mask = RATE_IN_3430ES1;
|
||||
|
@ -3550,7 +3553,7 @@ int __init omap3xxx_clk_init(void)
|
|||
/*
|
||||
* Lock DPLL5 and put it in autoidle.
|
||||
*/
|
||||
if (omap_rev() >= OMAP3430_REV_ES2_0)
|
||||
if (!cpu_is_ti816x() && (omap_rev() >= OMAP3430_REV_ES2_0))
|
||||
omap3_clk_lock_dpll5();
|
||||
|
||||
/* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
|
||||
|
|
|
@ -171,7 +171,7 @@ static struct clkdm_dep core_24xx_wkdeps[] = {
|
|||
|
||||
/* 2430-specific possible wakeup dependencies */
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
|
||||
/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */
|
||||
static struct clkdm_dep mdm_2430_wkdeps[] = {
|
||||
|
@ -194,7 +194,7 @@ static struct clkdm_dep mdm_2430_wkdeps[] = {
|
|||
{ NULL },
|
||||
};
|
||||
|
||||
#endif /* CONFIG_ARCH_OMAP2430 */
|
||||
#endif /* CONFIG_SOC_OMAP2430 */
|
||||
|
||||
|
||||
/* OMAP3-specific possible dependencies */
|
||||
|
@ -450,7 +450,7 @@ static struct clockdomain cm_clkdm = {
|
|||
* 2420-only clockdomains
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2420)
|
||||
#if defined(CONFIG_SOC_OMAP2420)
|
||||
|
||||
static struct clockdomain mpu_2420_clkdm = {
|
||||
.name = "mpu_clkdm",
|
||||
|
@ -514,14 +514,14 @@ static struct clockdomain dss_2420_clkdm = {
|
|||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
|
||||
};
|
||||
|
||||
#endif /* CONFIG_ARCH_OMAP2420 */
|
||||
#endif /* CONFIG_SOC_OMAP2420 */
|
||||
|
||||
|
||||
/*
|
||||
* 2430-only clockdomains
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430)
|
||||
#if defined(CONFIG_SOC_OMAP2430)
|
||||
|
||||
static struct clockdomain mpu_2430_clkdm = {
|
||||
.name = "mpu_clkdm",
|
||||
|
@ -600,7 +600,7 @@ static struct clockdomain dss_2430_clkdm = {
|
|||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
|
||||
};
|
||||
|
||||
#endif /* CONFIG_ARCH_OMAP2430 */
|
||||
#endif /* CONFIG_SOC_OMAP2430 */
|
||||
|
||||
|
||||
/*
|
||||
|
@ -811,7 +811,7 @@ static struct clockdomain *clockdomains_omap2[] __initdata = {
|
|||
&cm_clkdm,
|
||||
&prm_clkdm,
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
&mpu_2420_clkdm,
|
||||
&iva1_2420_clkdm,
|
||||
&dsp_2420_clkdm,
|
||||
|
@ -821,7 +821,7 @@ static struct clockdomain *clockdomains_omap2[] __initdata = {
|
|||
&dss_2420_clkdm,
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
&mpu_2430_clkdm,
|
||||
&mdm_clkdm,
|
||||
&dsp_2430_clkdm,
|
||||
|
|
|
@ -40,7 +40,7 @@ static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
|
|||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2420)
|
||||
#if defined(CONFIG_SOC_OMAP2420)
|
||||
|
||||
static struct omap_globals omap242x_globals = {
|
||||
.class = OMAP242X_CLASS,
|
||||
|
@ -61,7 +61,7 @@ void __init omap2_set_globals_242x(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430)
|
||||
#if defined(CONFIG_SOC_OMAP2430)
|
||||
|
||||
static struct omap_globals omap243x_globals = {
|
||||
.class = OMAP243X_CLASS,
|
||||
|
@ -108,6 +108,27 @@ void __init omap3_map_io(void)
|
|||
omap2_set_globals_3xxx();
|
||||
omap34xx_map_common_io();
|
||||
}
|
||||
|
||||
/*
|
||||
* Adjust TAP register base such that omap3_check_revision accesses the correct
|
||||
* TI816X register for checking device ID (it adds 0x204 to tap base while
|
||||
* TI816X DEVICE ID register is at offset 0x600 from control base).
|
||||
*/
|
||||
#define TI816X_TAP_BASE (TI816X_CTRL_BASE + \
|
||||
TI816X_CONTROL_DEVICE_ID - 0x204)
|
||||
|
||||
static struct omap_globals ti816x_globals = {
|
||||
.class = OMAP343X_CLASS,
|
||||
.tap = OMAP2_L4_IO_ADDRESS(TI816X_TAP_BASE),
|
||||
.ctrl = TI816X_CTRL_BASE,
|
||||
.prm = TI816X_PRCM_BASE,
|
||||
.cm = TI816X_PRCM_BASE,
|
||||
};
|
||||
|
||||
void __init omap2_set_globals_ti816x(void)
|
||||
{
|
||||
__omap2_set_globals(&ti816x_globals);
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP4)
|
||||
|
|
|
@ -52,6 +52,9 @@
|
|||
#define OMAP343X_CONTROL_PADCONFS_WKUP 0xa00
|
||||
#define OMAP343X_CONTROL_GENERAL_WKUP 0xa60
|
||||
|
||||
/* TI816X spefic control submodules */
|
||||
#define TI816X_CONTROL_DEVCONF 0x600
|
||||
|
||||
/* Control register offsets - read/write with omap_ctrl_{read,write}{bwl}() */
|
||||
|
||||
#define OMAP2_CONTROL_SYSCONFIG (OMAP2_CONTROL_INTERFACE + 0x10)
|
||||
|
@ -241,6 +244,9 @@
|
|||
#define OMAP3_PADCONF_SAD2D_MSTANDBY 0x250
|
||||
#define OMAP3_PADCONF_SAD2D_IDLEACK 0x254
|
||||
|
||||
/* TI816X CONTROL_DEVCONF register offsets */
|
||||
#define TI816X_CONTROL_DEVICE_ID (TI816X_CONTROL_DEVCONF + 0x000)
|
||||
|
||||
/*
|
||||
* REVISIT: This list of registers is not comprehensive - there are more
|
||||
* that should be added.
|
||||
|
|
|
@ -333,7 +333,7 @@ static struct platform_device omap2_mcspi2 = {
|
|||
},
|
||||
};
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
|
||||
defined(CONFIG_ARCH_OMAP4)
|
||||
static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
|
||||
.num_cs = 2,
|
||||
|
@ -400,7 +400,7 @@ static inline void omap4_mcspi_fixup(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
|
||||
defined(CONFIG_ARCH_OMAP4)
|
||||
static inline void omap2_mcspi3_init(void)
|
||||
{
|
||||
|
@ -895,7 +895,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
|
|||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
|
||||
#define OMAP_HDQ_BASE 0x480B2000
|
||||
#endif
|
||||
static struct resource omap_hdq_resources[] = {
|
||||
|
|
|
@ -191,12 +191,19 @@ static void __init omap3_check_features(void)
|
|||
if (!cpu_is_omap3505() && !cpu_is_omap3517())
|
||||
omap3_features |= OMAP3_HAS_IO_WAKEUP;
|
||||
|
||||
omap3_features |= OMAP3_HAS_SDRC;
|
||||
|
||||
/*
|
||||
* TODO: Get additional info (where applicable)
|
||||
* e.g. Size of L2 cache.
|
||||
*/
|
||||
}
|
||||
|
||||
static void __init ti816x_check_features(void)
|
||||
{
|
||||
omap3_features = OMAP3_HAS_NEON;
|
||||
}
|
||||
|
||||
static void __init omap3_check_revision(void)
|
||||
{
|
||||
u32 cpuid, idcode;
|
||||
|
@ -287,6 +294,20 @@ static void __init omap3_check_revision(void)
|
|||
omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
|
||||
}
|
||||
break;
|
||||
case 0xb81e:
|
||||
omap_chip.oc = CHIP_IS_TI816X;
|
||||
|
||||
switch (rev) {
|
||||
case 0:
|
||||
omap_revision = TI8168_REV_ES1_0;
|
||||
break;
|
||||
case 1:
|
||||
omap_revision = TI8168_REV_ES1_1;
|
||||
break;
|
||||
default:
|
||||
omap_revision = TI8168_REV_ES1_1;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
/* Unknown default to latest silicon rev as default*/
|
||||
omap_revision = OMAP3630_REV_ES1_2;
|
||||
|
@ -372,6 +393,8 @@ static void __init omap3_cpuinfo(void)
|
|||
/* Already set in omap3_check_revision() */
|
||||
strcpy(cpu_name, "AM3505");
|
||||
}
|
||||
} else if (cpu_is_ti816x()) {
|
||||
strcpy(cpu_name, "TI816X");
|
||||
} else if (omap3_has_iva() && omap3_has_sgx()) {
|
||||
/* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
|
||||
strcpy(cpu_name, "OMAP3430/3530");
|
||||
|
@ -386,7 +409,7 @@ static void __init omap3_cpuinfo(void)
|
|||
strcpy(cpu_name, "OMAP3503");
|
||||
}
|
||||
|
||||
if (cpu_is_omap3630()) {
|
||||
if (cpu_is_omap3630() || cpu_is_ti816x()) {
|
||||
switch (rev) {
|
||||
case OMAP_REVBITS_00:
|
||||
strcpy(cpu_rev, "1.0");
|
||||
|
@ -462,7 +485,13 @@ void __init omap2_check_revision(void)
|
|||
omap24xx_check_revision();
|
||||
} else if (cpu_is_omap34xx()) {
|
||||
omap3_check_revision();
|
||||
omap3_check_features();
|
||||
|
||||
/* TI816X doesn't have feature register */
|
||||
if (!cpu_is_ti816x())
|
||||
omap3_check_features();
|
||||
else
|
||||
ti816x_check_features();
|
||||
|
||||
omap3_cpuinfo();
|
||||
return;
|
||||
} else if (cpu_is_omap44xx()) {
|
||||
|
|
|
@ -69,6 +69,12 @@ omap_uart_lsr: .word 0
|
|||
beq 34f @ configure OMAP3UART4
|
||||
cmp \rp, #OMAP4UART4 @ only on 44xx
|
||||
beq 44f @ configure OMAP4UART4
|
||||
cmp \rp, #TI816XUART1 @ ti816x UART offsets different
|
||||
beq 81f @ configure UART1
|
||||
cmp \rp, #TI816XUART2 @ ti816x UART offsets different
|
||||
beq 82f @ configure UART2
|
||||
cmp \rp, #TI816XUART3 @ ti816x UART offsets different
|
||||
beq 83f @ configure UART3
|
||||
cmp \rp, #ZOOM_UART @ only on zoom2/3
|
||||
beq 95f @ configure ZOOM_UART
|
||||
|
||||
|
@ -91,6 +97,12 @@ omap_uart_lsr: .word 0
|
|||
b 98f
|
||||
44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE)
|
||||
b 98f
|
||||
81: mov \rp, #UART_OFFSET(TI816X_UART1_BASE)
|
||||
b 98f
|
||||
82: mov \rp, #UART_OFFSET(TI816X_UART2_BASE)
|
||||
b 98f
|
||||
83: mov \rp, #UART_OFFSET(TI816X_UART3_BASE)
|
||||
b 98f
|
||||
95: ldr \rp, =ZOOM_UART_BASE
|
||||
mrc p15, 0, \rv, c1, c0
|
||||
tst \rv, #1 @ MMU enabled?
|
||||
|
|
|
@ -61,6 +61,14 @@
|
|||
bne 9998f
|
||||
ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
|
||||
cmp \irqnr, #0x0
|
||||
bne 9998f
|
||||
|
||||
/*
|
||||
* ti816x has additional IRQ pending register. Checking this
|
||||
* register on omap2 & omap3 has no effect (read as 0).
|
||||
*/
|
||||
ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
|
||||
cmp \irqnr, #0x0
|
||||
9998:
|
||||
ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
|
||||
and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
|
||||
|
@ -133,6 +141,11 @@
|
|||
bne 9999f
|
||||
ldr \irqnr, [\base, #0xd8] /* IRQ pending reg 3 */
|
||||
cmp \irqnr, #0x0
|
||||
#ifdef CONFIG_SOC_OMAPTI816X
|
||||
bne 9999f
|
||||
ldr \irqnr, [\base, #0xf8] /* IRQ pending reg 4 */
|
||||
cmp \irqnr, #0x0
|
||||
#endif
|
||||
9999:
|
||||
ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
|
||||
and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
|
||||
|
|
|
@ -66,7 +66,7 @@ static struct map_desc omap24xx_io_desc[] __initdata = {
|
|||
},
|
||||
};
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
static struct map_desc omap242x_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = DSP_MEM_2420_VIRT,
|
||||
|
@ -90,7 +90,7 @@ static struct map_desc omap242x_io_desc[] __initdata = {
|
|||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
static struct map_desc omap243x_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = L4_WK_243X_VIRT,
|
||||
|
@ -175,6 +175,18 @@ static struct map_desc omap34xx_io_desc[] __initdata = {
|
|||
#endif
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_OMAPTI816X
|
||||
static struct map_desc omapti816x_io_desc[] __initdata = {
|
||||
{
|
||||
.virtual = L4_34XX_VIRT,
|
||||
.pfn = __phys_to_pfn(L4_34XX_PHYS),
|
||||
.length = L4_34XX_SIZE,
|
||||
.type = MT_DEVICE
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
static struct map_desc omap44xx_io_desc[] __initdata = {
|
||||
{
|
||||
|
@ -241,7 +253,7 @@ static void __init _omap2_map_common_io(void)
|
|||
omap_sram_init();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
void __init omap242x_map_common_io(void)
|
||||
{
|
||||
iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
|
||||
|
@ -250,7 +262,7 @@ void __init omap242x_map_common_io(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
void __init omap243x_map_common_io(void)
|
||||
{
|
||||
iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
|
||||
|
@ -267,6 +279,14 @@ void __init omap34xx_map_common_io(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_OMAPTI816X
|
||||
void __init omapti816x_map_common_io(void)
|
||||
{
|
||||
iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc));
|
||||
_omap2_map_common_io();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
void __init omap44xx_map_common_io(void)
|
||||
{
|
||||
|
@ -398,11 +418,7 @@ void __init omap2_init_common_infrastructure(void)
|
|||
void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
|
||||
struct omap_sdrc_params *sdrc_cs1)
|
||||
{
|
||||
omap_serial_early_init();
|
||||
|
||||
omap_hwmod_late_init();
|
||||
|
||||
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
|
||||
if (cpu_is_omap24xx() || omap3_has_sdrc()) {
|
||||
omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
|
||||
_omap2_init_reprogram_sdrc();
|
||||
}
|
||||
|
|
|
@ -61,8 +61,6 @@ struct omap3_intc_regs {
|
|||
u32 mir[INTCPS_NR_MIR_REGS];
|
||||
};
|
||||
|
||||
static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
|
||||
|
||||
/* INTC bank register get/set */
|
||||
|
||||
static void intc_bank_write_reg(u32 val, struct omap_irq_bank *bank, u16 reg)
|
||||
|
@ -110,7 +108,7 @@ static void omap_mask_irq(struct irq_data *d)
|
|||
unsigned int irq = d->irq;
|
||||
int offset = irq & (~(IRQ_BITS_PER_REG - 1));
|
||||
|
||||
if (cpu_is_omap34xx()) {
|
||||
if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
|
||||
int spurious = 0;
|
||||
|
||||
/*
|
||||
|
@ -205,6 +203,9 @@ void __init omap_init_irq(void)
|
|||
|
||||
BUG_ON(!base);
|
||||
|
||||
if (cpu_is_ti816x())
|
||||
bank->nr_irqs = 128;
|
||||
|
||||
/* Static mapping, never released */
|
||||
bank->base_reg = ioremap(base, SZ_4K);
|
||||
if (!bank->base_reg) {
|
||||
|
@ -229,6 +230,8 @@ void __init omap_init_irq(void)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
|
||||
|
||||
void omap_intc_save_context(void)
|
||||
{
|
||||
int ind = 0, i = 0;
|
||||
|
|
|
@ -310,7 +310,7 @@ struct omap_mbox mbox_dsp_info = {
|
|||
struct omap_mbox *omap3_mboxes[] = { &mbox_dsp_info, NULL };
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2420)
|
||||
#if defined(CONFIG_SOC_OMAP2420)
|
||||
/* IVA */
|
||||
static struct omap_mbox2_priv omap2_mbox_iva_priv = {
|
||||
.tx_fifo = {
|
||||
|
|
|
@ -104,7 +104,7 @@ EXPORT_SYMBOL(omap2_mcbsp_set_clks_src);
|
|||
|
||||
/* Platform data */
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
|
||||
{
|
||||
.phys_base = OMAP24XX_MCBSP1_BASE,
|
||||
|
@ -129,7 +129,7 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = {
|
|||
#define OMAP2420_MCBSP_REG_NUM 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = {
|
||||
{
|
||||
.phys_base = OMAP24XX_MCBSP1_BASE,
|
||||
|
|
|
@ -1467,12 +1467,10 @@ static int __init _register(struct omap_hwmod *oh)
|
|||
return -EEXIST;
|
||||
|
||||
ms_id = _find_mpu_port_index(oh);
|
||||
if (!IS_ERR_VALUE(ms_id)) {
|
||||
if (!IS_ERR_VALUE(ms_id))
|
||||
oh->_mpu_port_index = ms_id;
|
||||
oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
|
||||
} else {
|
||||
else
|
||||
oh->_int_flags |= _HWMOD_NO_MPU_PORT;
|
||||
}
|
||||
|
||||
list_add_tail(&oh->node, &omap_hwmod_list);
|
||||
|
||||
|
@ -1621,6 +1619,26 @@ int __init omap_hwmod_init(struct omap_hwmod **ohs)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* _populate_mpu_rt_base - populate the virtual address for a hwmod
|
||||
*
|
||||
* Must be called only from omap_hwmod_late_init so ioremap works properly.
|
||||
* Assumes the caller takes care of locking if needed.
|
||||
*
|
||||
*/
|
||||
static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
|
||||
{
|
||||
if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
|
||||
return 0;
|
||||
|
||||
oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
|
||||
if (!oh->_mpu_rt_va)
|
||||
pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
|
||||
__func__, oh->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* omap_hwmod_late_init - do some post-clock framework initialization
|
||||
*
|
||||
|
@ -1628,10 +1646,12 @@ int __init omap_hwmod_init(struct omap_hwmod **ohs)
|
|||
* to struct clk pointers for each registered omap_hwmod. Also calls
|
||||
* _setup() on each hwmod. Returns 0.
|
||||
*/
|
||||
int omap_hwmod_late_init(void)
|
||||
static int __init omap_hwmod_late_init(void)
|
||||
{
|
||||
int r;
|
||||
|
||||
r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
|
||||
|
||||
/* XXX check return value */
|
||||
r = omap_hwmod_for_each(_init_clocks, NULL);
|
||||
WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
|
||||
|
@ -1644,6 +1664,7 @@ int omap_hwmod_late_init(void)
|
|||
|
||||
return 0;
|
||||
}
|
||||
core_initcall(omap_hwmod_late_init);
|
||||
|
||||
/**
|
||||
* omap_hwmod_enable - enable an omap_hwmod
|
||||
|
|
|
@ -418,7 +418,7 @@ struct prcm_config {
|
|||
|
||||
extern const struct prcm_config omap2420_rate_table[];
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
extern const struct prcm_config omap2430_rate_table[];
|
||||
#else
|
||||
#define omap2430_rate_table NULL
|
||||
|
|
|
@ -78,7 +78,7 @@ static struct powerdomain core_24xx_pwrdm = {
|
|||
* 2430-specific powerdomains
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
|
||||
/* XXX 2430 KILLDOMAINWKUP bit? No current users apparently */
|
||||
|
||||
|
@ -97,7 +97,7 @@ static struct powerdomain mdm_pwrdm = {
|
|||
},
|
||||
};
|
||||
|
||||
#endif /* CONFIG_ARCH_OMAP2430 */
|
||||
#endif /* CONFIG_SOC_OMAP2430 */
|
||||
|
||||
/* As powerdomains are added or removed above, this list must also be changed */
|
||||
static struct powerdomain *powerdomains_omap2xxx[] __initdata = {
|
||||
|
@ -111,7 +111,7 @@ static struct powerdomain *powerdomains_omap2xxx[] __initdata = {
|
|||
&core_24xx_pwrdm,
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
&mdm_pwrdm,
|
||||
#endif
|
||||
NULL
|
||||
|
|
|
@ -24,6 +24,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/delay.h>
|
||||
|
||||
#include <mach/system.h>
|
||||
#include <plat/common.h>
|
||||
#include <plat/prcm.h>
|
||||
#include <plat/irqs.h>
|
||||
|
@ -57,7 +58,7 @@ u32 omap_prcm_get_reset_sources(void)
|
|||
EXPORT_SYMBOL(omap_prcm_get_reset_sources);
|
||||
|
||||
/* Resets clock rates and reboots the system. Only called from system.h */
|
||||
void omap_prcm_arch_reset(char mode, const char *cmd)
|
||||
static void omap_prcm_arch_reset(char mode, const char *cmd)
|
||||
{
|
||||
s16 prcm_offs = 0;
|
||||
|
||||
|
@ -108,6 +109,8 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
|
|||
omap2_prm_read_mod_reg(prcm_offs, OMAP2_RM_RSTCTRL); /* OCP barrier */
|
||||
}
|
||||
|
||||
void (*arch_reset)(char, const char *) = omap_prcm_arch_reset;
|
||||
|
||||
/**
|
||||
* omap2_cm_wait_idlest - wait for IDLEST bit to indicate module readiness
|
||||
* @reg: physical address of module IDLEST register
|
||||
|
|
|
@ -486,7 +486,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
|
|||
mod_timer(&uart->timer, jiffies + uart->timeout);
|
||||
omap_uart_smart_idle_enable(uart, 0);
|
||||
|
||||
if (cpu_is_omap34xx()) {
|
||||
if (cpu_is_omap34xx() && !cpu_is_ti816x()) {
|
||||
u32 mod = (uart->num > 1) ? OMAP3430_PER_MOD : CORE_MOD;
|
||||
u32 wk_mask = 0;
|
||||
u32 padconf = 0;
|
||||
|
@ -655,7 +655,7 @@ static void serial_out_override(struct uart_port *up, int offset, int value)
|
|||
}
|
||||
#endif
|
||||
|
||||
void __init omap_serial_early_init(void)
|
||||
static int __init omap_serial_early_init(void)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
|
@ -672,7 +672,7 @@ void __init omap_serial_early_init(void)
|
|||
|
||||
uart = kzalloc(sizeof(struct omap_uart_state), GFP_KERNEL);
|
||||
if (WARN_ON(!uart))
|
||||
return;
|
||||
return -ENODEV;
|
||||
|
||||
uart->oh = oh;
|
||||
uart->num = i++;
|
||||
|
@ -691,7 +691,10 @@ void __init omap_serial_early_init(void)
|
|||
*/
|
||||
uart->oh->flags |= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET;
|
||||
} while (1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
core_initcall(omap_serial_early_init);
|
||||
|
||||
/**
|
||||
* omap_serial_init_port() - initialize single serial port
|
||||
|
@ -759,13 +762,13 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
|
|||
p->private_data = uart;
|
||||
|
||||
/*
|
||||
* omap44xx: Never read empty UART fifo
|
||||
* omap44xx, ti816x: Never read empty UART fifo
|
||||
* omap3xxx: Never read empty UART fifo on UARTs
|
||||
* with IP rev >=0x52
|
||||
*/
|
||||
uart->regshift = p->regshift;
|
||||
uart->membase = p->membase;
|
||||
if (cpu_is_omap44xx())
|
||||
if (cpu_is_omap44xx() || cpu_is_ti816x())
|
||||
uart->errata |= UART_ERRATA_FIFO_FULL_ABORT;
|
||||
else if ((serial_read_reg(uart, UART_OMAP_MVER) & 0xFF)
|
||||
>= UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV)
|
||||
|
@ -847,7 +850,7 @@ void __init omap_serial_init_port(struct omap_board_data *bdata)
|
|||
}
|
||||
|
||||
/* Enable the MDR1 errata for OMAP3 */
|
||||
if (cpu_is_omap34xx())
|
||||
if (cpu_is_omap34xx() && !cpu_is_ti816x())
|
||||
uart->errata |= UART_ERRATA_i202_MDR1_ACCESS;
|
||||
}
|
||||
|
||||
|
|
|
@ -24,10 +24,11 @@
|
|||
|
||||
#define NO_LENGTH_CHECK 0xffffffff
|
||||
|
||||
struct omap_board_config_kernel *omap_board_config;
|
||||
struct omap_board_config_kernel *omap_board_config __initdata;
|
||||
int omap_board_config_size;
|
||||
|
||||
static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
|
||||
static const void *__init get_config(u16 tag, size_t len,
|
||||
int skip, size_t *len_out)
|
||||
{
|
||||
struct omap_board_config_kernel *kinfo = NULL;
|
||||
int i;
|
||||
|
@ -49,17 +50,15 @@ static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
|
|||
return kinfo->data;
|
||||
}
|
||||
|
||||
const void *__omap_get_config(u16 tag, size_t len, int nr)
|
||||
const void *__init __omap_get_config(u16 tag, size_t len, int nr)
|
||||
{
|
||||
return get_config(tag, len, nr, NULL);
|
||||
}
|
||||
EXPORT_SYMBOL(__omap_get_config);
|
||||
|
||||
const void *omap_get_var_config(u16 tag, size_t *len)
|
||||
const void *__init omap_get_var_config(u16 tag, size_t *len)
|
||||
{
|
||||
return get_config(tag, NO_LENGTH_CHECK, 0, len);
|
||||
}
|
||||
EXPORT_SYMBOL(omap_get_var_config);
|
||||
|
||||
void __init omap_reserve(void)
|
||||
{
|
||||
|
|
|
@ -54,7 +54,7 @@ static cycle_t notrace omap16xx_32k_read(struct clocksource *cs)
|
|||
#define omap16xx_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
static cycle_t notrace omap2420_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
|
@ -63,7 +63,7 @@ static cycle_t notrace omap2420_32k_read(struct clocksource *cs)
|
|||
#define omap2420_32k_read NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
static cycle_t notrace omap2430_32k_read(struct clocksource *cs)
|
||||
{
|
||||
return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10) - offset_32k;
|
||||
|
|
|
@ -134,7 +134,7 @@ static inline void omap_enable_channel_irq(int lch);
|
|||
|
||||
#ifdef CONFIG_ARCH_OMAP15XX
|
||||
/* Returns 1 if the DMA module is in OMAP1510-compatible mode, 0 otherwise */
|
||||
int omap_dma_in_1510_mode(void)
|
||||
static int omap_dma_in_1510_mode(void)
|
||||
{
|
||||
return enable_1510_mode;
|
||||
}
|
||||
|
|
|
@ -112,6 +112,7 @@ static inline int omap1_i2c_add_bus(int bus_id)
|
|||
}
|
||||
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
/*
|
||||
* XXX This function is a temporary compatibility wrapper - only
|
||||
* needed until the I2C driver can be converted to call
|
||||
|
@ -130,7 +131,6 @@ static struct omap_device_pm_latency omap_i2c_latency[] = {
|
|||
},
|
||||
};
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
static inline int omap2_i2c_add_bus(int bus_id)
|
||||
{
|
||||
int l;
|
||||
|
|
|
@ -151,14 +151,14 @@ struct omap_board_config_kernel {
|
|||
const void *data;
|
||||
};
|
||||
|
||||
extern const void *__omap_get_config(u16 tag, size_t len, int nr);
|
||||
extern const void *__init __omap_get_config(u16 tag, size_t len, int nr);
|
||||
|
||||
#define omap_get_config(tag, type) \
|
||||
((const type *) __omap_get_config((tag), sizeof(type), 0))
|
||||
#define omap_get_nr_config(tag, type, nr) \
|
||||
((const type *) __omap_get_config((tag), sizeof(type), (nr)))
|
||||
|
||||
extern const void *omap_get_var_config(u16 tag, size_t *len);
|
||||
extern const void *__init omap_get_var_config(u16 tag, size_t *len);
|
||||
|
||||
extern struct omap_board_config_kernel *omap_board_config;
|
||||
extern int omap_board_config_size;
|
||||
|
|
|
@ -38,6 +38,7 @@ struct omap_clk {
|
|||
#define CK_3517 (1 << 9)
|
||||
#define CK_36XX (1 << 10) /* 36xx/37xx-specific clocks */
|
||||
#define CK_443X (1 << 11)
|
||||
#define CK_TI816X (1 << 12)
|
||||
|
||||
|
||||
#define CK_34XX (CK_3430ES1 | CK_3430ES2PLUS)
|
||||
|
|
|
@ -53,6 +53,7 @@ struct clkops {
|
|||
#define RATE_IN_3430ES2PLUS (1 << 3) /* 3430 ES >= 2 rates only */
|
||||
#define RATE_IN_36XX (1 << 4)
|
||||
#define RATE_IN_4430 (1 << 5)
|
||||
#define RATE_IN_TI816X (1 << 6)
|
||||
|
||||
#define RATE_IN_24XX (RATE_IN_242X | RATE_IN_243X)
|
||||
#define RATE_IN_34XX (RATE_IN_3430ES1 | RATE_IN_3430ES2PLUS)
|
||||
|
|
|
@ -66,6 +66,7 @@ void omap2_set_globals_242x(void);
|
|||
void omap2_set_globals_243x(void);
|
||||
void omap2_set_globals_3xxx(void);
|
||||
void omap2_set_globals_443x(void);
|
||||
void omap2_set_globals_ti816x(void);
|
||||
|
||||
/* These get called from omap2_set_globals_xxxx(), do not call these */
|
||||
void omap2_set_globals_tap(struct omap_globals *);
|
||||
|
|
|
@ -105,6 +105,12 @@ static inline int is_omap ##subclass (void) \
|
|||
return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
|
||||
}
|
||||
|
||||
#define IS_TI_SUBCLASS(subclass, id) \
|
||||
static inline int is_ti ##subclass (void) \
|
||||
{ \
|
||||
return (GET_OMAP_SUBCLASS == (id)) ? 1 : 0; \
|
||||
}
|
||||
|
||||
IS_OMAP_CLASS(7xx, 0x07)
|
||||
IS_OMAP_CLASS(15xx, 0x15)
|
||||
IS_OMAP_CLASS(16xx, 0x16)
|
||||
|
@ -118,6 +124,8 @@ IS_OMAP_SUBCLASS(343x, 0x343)
|
|||
IS_OMAP_SUBCLASS(363x, 0x363)
|
||||
IS_OMAP_SUBCLASS(443x, 0x443)
|
||||
|
||||
IS_TI_SUBCLASS(816x, 0x816)
|
||||
|
||||
#define cpu_is_omap7xx() 0
|
||||
#define cpu_is_omap15xx() 0
|
||||
#define cpu_is_omap16xx() 0
|
||||
|
@ -126,6 +134,7 @@ IS_OMAP_SUBCLASS(443x, 0x443)
|
|||
#define cpu_is_omap243x() 0
|
||||
#define cpu_is_omap34xx() 0
|
||||
#define cpu_is_omap343x() 0
|
||||
#define cpu_is_ti816x() 0
|
||||
#define cpu_is_omap44xx() 0
|
||||
#define cpu_is_omap443x() 0
|
||||
|
||||
|
@ -170,11 +179,11 @@ IS_OMAP_SUBCLASS(443x, 0x443)
|
|||
# undef cpu_is_omap24xx
|
||||
# define cpu_is_omap24xx() is_omap24xx()
|
||||
# endif
|
||||
# if defined (CONFIG_ARCH_OMAP2420)
|
||||
# if defined (CONFIG_SOC_OMAP2420)
|
||||
# undef cpu_is_omap242x
|
||||
# define cpu_is_omap242x() is_omap242x()
|
||||
# endif
|
||||
# if defined (CONFIG_ARCH_OMAP2430)
|
||||
# if defined (CONFIG_SOC_OMAP2430)
|
||||
# undef cpu_is_omap243x
|
||||
# define cpu_is_omap243x() is_omap243x()
|
||||
# endif
|
||||
|
@ -189,11 +198,11 @@ IS_OMAP_SUBCLASS(443x, 0x443)
|
|||
# undef cpu_is_omap24xx
|
||||
# define cpu_is_omap24xx() 1
|
||||
# endif
|
||||
# if defined(CONFIG_ARCH_OMAP2420)
|
||||
# if defined(CONFIG_SOC_OMAP2420)
|
||||
# undef cpu_is_omap242x
|
||||
# define cpu_is_omap242x() 1
|
||||
# endif
|
||||
# if defined(CONFIG_ARCH_OMAP2430)
|
||||
# if defined(CONFIG_SOC_OMAP2430)
|
||||
# undef cpu_is_omap243x
|
||||
# define cpu_is_omap243x() 1
|
||||
# endif
|
||||
|
@ -201,7 +210,7 @@ IS_OMAP_SUBCLASS(443x, 0x443)
|
|||
# undef cpu_is_omap34xx
|
||||
# define cpu_is_omap34xx() 1
|
||||
# endif
|
||||
# if defined(CONFIG_ARCH_OMAP3430)
|
||||
# if defined(CONFIG_SOC_OMAP3430)
|
||||
# undef cpu_is_omap343x
|
||||
# define cpu_is_omap343x() 1
|
||||
# endif
|
||||
|
@ -330,6 +339,7 @@ IS_OMAP_TYPE(3517, 0x3517)
|
|||
# undef cpu_is_omap3530
|
||||
# undef cpu_is_omap3505
|
||||
# undef cpu_is_omap3517
|
||||
# undef cpu_is_ti816x
|
||||
# define cpu_is_omap3430() is_omap3430()
|
||||
# define cpu_is_omap3503() (cpu_is_omap3430() && \
|
||||
(!omap3_has_iva()) && \
|
||||
|
@ -345,6 +355,7 @@ IS_OMAP_TYPE(3517, 0x3517)
|
|||
# define cpu_is_omap3517() is_omap3517()
|
||||
# undef cpu_is_omap3630
|
||||
# define cpu_is_omap3630() is_omap363x()
|
||||
# define cpu_is_ti816x() is_ti816x()
|
||||
#endif
|
||||
|
||||
# if defined(CONFIG_ARCH_OMAP4)
|
||||
|
@ -389,6 +400,10 @@ IS_OMAP_TYPE(3517, 0x3517)
|
|||
#define OMAP3505_REV(v) (OMAP35XX_CLASS | (0x3505 << 16) | (v << 8))
|
||||
#define OMAP3517_REV(v) (OMAP35XX_CLASS | (0x3517 << 16) | (v << 8))
|
||||
|
||||
#define TI816X_CLASS 0x81600034
|
||||
#define TI8168_REV_ES1_0 TI816X_CLASS
|
||||
#define TI8168_REV_ES1_1 (TI816X_CLASS | (OMAP_REVBITS_01 << 8))
|
||||
|
||||
#define OMAP443X_CLASS 0x44300044
|
||||
#define OMAP4430_REV_ES1_0 OMAP443X_CLASS
|
||||
#define OMAP4430_REV_ES2_0 0x44301044
|
||||
|
@ -419,6 +434,7 @@ IS_OMAP_TYPE(3517, 0x3517)
|
|||
#define CHIP_IS_OMAP3630ES1_1 (1 << 9)
|
||||
#define CHIP_IS_OMAP3630ES1_2 (1 << 10)
|
||||
#define CHIP_IS_OMAP4430ES2 (1 << 11)
|
||||
#define CHIP_IS_TI816X (1 << 14)
|
||||
|
||||
#define CHIP_IS_OMAP24XX (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
|
||||
|
||||
|
@ -455,6 +471,7 @@ extern u32 omap3_features;
|
|||
#define OMAP3_HAS_ISP BIT(4)
|
||||
#define OMAP3_HAS_192MHZ_CLK BIT(5)
|
||||
#define OMAP3_HAS_IO_WAKEUP BIT(6)
|
||||
#define OMAP3_HAS_SDRC BIT(7)
|
||||
|
||||
#define OMAP3_HAS_FEATURE(feat,flag) \
|
||||
static inline unsigned int omap3_has_ ##feat(void) \
|
||||
|
@ -469,5 +486,6 @@ OMAP3_HAS_FEATURE(neon, NEON)
|
|||
OMAP3_HAS_FEATURE(isp, ISP)
|
||||
OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK)
|
||||
OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP)
|
||||
OMAP3_HAS_FEATURE(sdrc, SDRC)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -30,18 +30,18 @@ extern void omap1510_fpga_init_irq(void);
|
|||
* ---------------------------------------------------------------------------
|
||||
*/
|
||||
/* maps in the FPGA registers and the ETHR registers */
|
||||
#define H2P2_DBG_FPGA_BASE IOMEM(0xE8000000) /* VA */
|
||||
#define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */
|
||||
#define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
|
||||
#define H2P2_DBG_FPGA_START 0x04000000 /* PA */
|
||||
|
||||
#define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300)
|
||||
#define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
|
||||
#define H2P2_DBG_FPGA_BOARD_REV (H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
|
||||
#define H2P2_DBG_FPGA_GPIO (H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
|
||||
#define H2P2_DBG_FPGA_LEDS (H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */
|
||||
#define H2P2_DBG_FPGA_MISC_INPUTS (H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */
|
||||
#define H2P2_DBG_FPGA_LAN_STATUS (H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
|
||||
#define H2P2_DBG_FPGA_LAN_RESET (H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
|
||||
#define H2P2_DBG_FPGA_FPGA_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */
|
||||
#define H2P2_DBG_FPGA_BOARD_REV IOMEM(H2P2_DBG_FPGA_BASE + 0x12) /* Board Revision */
|
||||
#define H2P2_DBG_FPGA_GPIO IOMEM(H2P2_DBG_FPGA_BASE + 0x14) /* GPIO outputs */
|
||||
#define H2P2_DBG_FPGA_LEDS IOMEM(H2P2_DBG_FPGA_BASE + 0x16) /* LEDs outputs */
|
||||
#define H2P2_DBG_FPGA_MISC_INPUTS IOMEM(H2P2_DBG_FPGA_BASE + 0x18) /* Misc inputs */
|
||||
#define H2P2_DBG_FPGA_LAN_STATUS IOMEM(H2P2_DBG_FPGA_BASE + 0x1A) /* LAN Status line */
|
||||
#define H2P2_DBG_FPGA_LAN_RESET IOMEM(H2P2_DBG_FPGA_BASE + 0x1C) /* LAN Reset line */
|
||||
|
||||
/* NOTE: most boards don't have a static mapping for the FPGA ... */
|
||||
struct h2p2_dbg_fpga {
|
||||
|
@ -81,55 +81,55 @@ struct h2p2_dbg_fpga {
|
|||
* OMAP-1510 FPGA
|
||||
* ---------------------------------------------------------------------------
|
||||
*/
|
||||
#define OMAP1510_FPGA_BASE IOMEM(0xE8000000) /* VA */
|
||||
#define OMAP1510_FPGA_BASE 0xE8000000 /* VA */
|
||||
#define OMAP1510_FPGA_SIZE SZ_4K
|
||||
#define OMAP1510_FPGA_START 0x08000000 /* PA */
|
||||
|
||||
/* Revision */
|
||||
#define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0)
|
||||
#define OMAP1510_FPGA_REV_HIGH (OMAP1510_FPGA_BASE + 0x1)
|
||||
#define OMAP1510_FPGA_REV_LOW IOMEM(OMAP1510_FPGA_BASE + 0x0)
|
||||
#define OMAP1510_FPGA_REV_HIGH IOMEM(OMAP1510_FPGA_BASE + 0x1)
|
||||
|
||||
#define OMAP1510_FPGA_LCD_PANEL_CONTROL (OMAP1510_FPGA_BASE + 0x2)
|
||||
#define OMAP1510_FPGA_LED_DIGIT (OMAP1510_FPGA_BASE + 0x3)
|
||||
#define INNOVATOR_FPGA_HID_SPI (OMAP1510_FPGA_BASE + 0x4)
|
||||
#define OMAP1510_FPGA_POWER (OMAP1510_FPGA_BASE + 0x5)
|
||||
#define OMAP1510_FPGA_LCD_PANEL_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x2)
|
||||
#define OMAP1510_FPGA_LED_DIGIT IOMEM(OMAP1510_FPGA_BASE + 0x3)
|
||||
#define INNOVATOR_FPGA_HID_SPI IOMEM(OMAP1510_FPGA_BASE + 0x4)
|
||||
#define OMAP1510_FPGA_POWER IOMEM(OMAP1510_FPGA_BASE + 0x5)
|
||||
|
||||
/* Interrupt status */
|
||||
#define OMAP1510_FPGA_ISR_LO (OMAP1510_FPGA_BASE + 0x6)
|
||||
#define OMAP1510_FPGA_ISR_HI (OMAP1510_FPGA_BASE + 0x7)
|
||||
#define OMAP1510_FPGA_ISR_LO IOMEM(OMAP1510_FPGA_BASE + 0x6)
|
||||
#define OMAP1510_FPGA_ISR_HI IOMEM(OMAP1510_FPGA_BASE + 0x7)
|
||||
|
||||
/* Interrupt mask */
|
||||
#define OMAP1510_FPGA_IMR_LO (OMAP1510_FPGA_BASE + 0x8)
|
||||
#define OMAP1510_FPGA_IMR_HI (OMAP1510_FPGA_BASE + 0x9)
|
||||
#define OMAP1510_FPGA_IMR_LO IOMEM(OMAP1510_FPGA_BASE + 0x8)
|
||||
#define OMAP1510_FPGA_IMR_HI IOMEM(OMAP1510_FPGA_BASE + 0x9)
|
||||
|
||||
/* Reset registers */
|
||||
#define OMAP1510_FPGA_HOST_RESET (OMAP1510_FPGA_BASE + 0xa)
|
||||
#define OMAP1510_FPGA_RST (OMAP1510_FPGA_BASE + 0xb)
|
||||
#define OMAP1510_FPGA_HOST_RESET IOMEM(OMAP1510_FPGA_BASE + 0xa)
|
||||
#define OMAP1510_FPGA_RST IOMEM(OMAP1510_FPGA_BASE + 0xb)
|
||||
|
||||
#define OMAP1510_FPGA_AUDIO (OMAP1510_FPGA_BASE + 0xc)
|
||||
#define OMAP1510_FPGA_DIP (OMAP1510_FPGA_BASE + 0xe)
|
||||
#define OMAP1510_FPGA_FPGA_IO (OMAP1510_FPGA_BASE + 0xf)
|
||||
#define OMAP1510_FPGA_UART1 (OMAP1510_FPGA_BASE + 0x14)
|
||||
#define OMAP1510_FPGA_UART2 (OMAP1510_FPGA_BASE + 0x15)
|
||||
#define OMAP1510_FPGA_OMAP1510_STATUS (OMAP1510_FPGA_BASE + 0x16)
|
||||
#define OMAP1510_FPGA_BOARD_REV (OMAP1510_FPGA_BASE + 0x18)
|
||||
#define OMAP1510P1_PPT_DATA (OMAP1510_FPGA_BASE + 0x100)
|
||||
#define OMAP1510P1_PPT_STATUS (OMAP1510_FPGA_BASE + 0x101)
|
||||
#define OMAP1510P1_PPT_CONTROL (OMAP1510_FPGA_BASE + 0x102)
|
||||
#define OMAP1510_FPGA_AUDIO IOMEM(OMAP1510_FPGA_BASE + 0xc)
|
||||
#define OMAP1510_FPGA_DIP IOMEM(OMAP1510_FPGA_BASE + 0xe)
|
||||
#define OMAP1510_FPGA_FPGA_IO IOMEM(OMAP1510_FPGA_BASE + 0xf)
|
||||
#define OMAP1510_FPGA_UART1 IOMEM(OMAP1510_FPGA_BASE + 0x14)
|
||||
#define OMAP1510_FPGA_UART2 IOMEM(OMAP1510_FPGA_BASE + 0x15)
|
||||
#define OMAP1510_FPGA_OMAP1510_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x16)
|
||||
#define OMAP1510_FPGA_BOARD_REV IOMEM(OMAP1510_FPGA_BASE + 0x18)
|
||||
#define OMAP1510P1_PPT_DATA IOMEM(OMAP1510_FPGA_BASE + 0x100)
|
||||
#define OMAP1510P1_PPT_STATUS IOMEM(OMAP1510_FPGA_BASE + 0x101)
|
||||
#define OMAP1510P1_PPT_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x102)
|
||||
|
||||
#define OMAP1510_FPGA_TOUCHSCREEN (OMAP1510_FPGA_BASE + 0x204)
|
||||
#define OMAP1510_FPGA_TOUCHSCREEN IOMEM(OMAP1510_FPGA_BASE + 0x204)
|
||||
|
||||
#define INNOVATOR_FPGA_INFO (OMAP1510_FPGA_BASE + 0x205)
|
||||
#define INNOVATOR_FPGA_LCD_BRIGHT_LO (OMAP1510_FPGA_BASE + 0x206)
|
||||
#define INNOVATOR_FPGA_LCD_BRIGHT_HI (OMAP1510_FPGA_BASE + 0x207)
|
||||
#define INNOVATOR_FPGA_LED_GRN_LO (OMAP1510_FPGA_BASE + 0x208)
|
||||
#define INNOVATOR_FPGA_LED_GRN_HI (OMAP1510_FPGA_BASE + 0x209)
|
||||
#define INNOVATOR_FPGA_LED_RED_LO (OMAP1510_FPGA_BASE + 0x20a)
|
||||
#define INNOVATOR_FPGA_LED_RED_HI (OMAP1510_FPGA_BASE + 0x20b)
|
||||
#define INNOVATOR_FPGA_CAM_USB_CONTROL (OMAP1510_FPGA_BASE + 0x20c)
|
||||
#define INNOVATOR_FPGA_EXP_CONTROL (OMAP1510_FPGA_BASE + 0x20d)
|
||||
#define INNOVATOR_FPGA_ISR2 (OMAP1510_FPGA_BASE + 0x20e)
|
||||
#define INNOVATOR_FPGA_IMR2 (OMAP1510_FPGA_BASE + 0x210)
|
||||
#define INNOVATOR_FPGA_INFO IOMEM(OMAP1510_FPGA_BASE + 0x205)
|
||||
#define INNOVATOR_FPGA_LCD_BRIGHT_LO IOMEM(OMAP1510_FPGA_BASE + 0x206)
|
||||
#define INNOVATOR_FPGA_LCD_BRIGHT_HI IOMEM(OMAP1510_FPGA_BASE + 0x207)
|
||||
#define INNOVATOR_FPGA_LED_GRN_LO IOMEM(OMAP1510_FPGA_BASE + 0x208)
|
||||
#define INNOVATOR_FPGA_LED_GRN_HI IOMEM(OMAP1510_FPGA_BASE + 0x209)
|
||||
#define INNOVATOR_FPGA_LED_RED_LO IOMEM(OMAP1510_FPGA_BASE + 0x20a)
|
||||
#define INNOVATOR_FPGA_LED_RED_HI IOMEM(OMAP1510_FPGA_BASE + 0x20b)
|
||||
#define INNOVATOR_FPGA_CAM_USB_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20c)
|
||||
#define INNOVATOR_FPGA_EXP_CONTROL IOMEM(OMAP1510_FPGA_BASE + 0x20d)
|
||||
#define INNOVATOR_FPGA_ISR2 IOMEM(OMAP1510_FPGA_BASE + 0x20e)
|
||||
#define INNOVATOR_FPGA_IMR2 IOMEM(OMAP1510_FPGA_BASE + 0x210)
|
||||
|
||||
#define OMAP1510_FPGA_ETHR_START (OMAP1510_FPGA_START + 0x300)
|
||||
|
||||
|
|
|
@ -286,5 +286,6 @@
|
|||
#include <plat/omap24xx.h>
|
||||
#include <plat/omap34xx.h>
|
||||
#include <plat/omap44xx.h>
|
||||
#include <plat/ti816x.h>
|
||||
|
||||
#endif /* __ASM_ARCH_OMAP_HARDWARE_H */
|
||||
|
|
|
@ -259,7 +259,7 @@ struct omap_sdrc_params;
|
|||
extern void omap1_map_common_io(void);
|
||||
extern void omap1_init_common_hw(void);
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
extern void omap242x_map_common_io(void);
|
||||
#else
|
||||
static inline void omap242x_map_common_io(void)
|
||||
|
@ -267,7 +267,7 @@ static inline void omap242x_map_common_io(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
extern void omap243x_map_common_io(void);
|
||||
#else
|
||||
static inline void omap243x_map_common_io(void)
|
||||
|
@ -283,6 +283,14 @@ static inline void omap34xx_map_common_io(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_OMAPTI816X
|
||||
extern void omapti816x_map_common_io(void);
|
||||
#else
|
||||
static inline void omapti816x_map_common_io(void)
|
||||
{
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP4
|
||||
extern void omap44xx_map_common_io(void);
|
||||
#else
|
||||
|
|
|
@ -106,13 +106,6 @@ static struct platform_device omap_mcbsp##port_nr = { \
|
|||
#define OMAP_MCBSP_REG_XCCR 0x00
|
||||
#define OMAP_MCBSP_REG_RCCR 0x00
|
||||
|
||||
#define AUDIO_MCBSP_DATAWRITE (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1)
|
||||
#define AUDIO_MCBSP_DATAREAD (OMAP1510_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1)
|
||||
|
||||
#define AUDIO_MCBSP OMAP_MCBSP1
|
||||
#define AUDIO_DMA_TX OMAP_DMA_MCBSP1_TX
|
||||
#define AUDIO_DMA_RX OMAP_DMA_MCBSP1_RX
|
||||
|
||||
#else
|
||||
|
||||
#define OMAP_MCBSP_REG_DRR2 0x00
|
||||
|
@ -168,13 +161,6 @@ static struct platform_device omap_mcbsp##port_nr = { \
|
|||
#define OMAP_ST_REG_SFIRCR 0x28
|
||||
#define OMAP_ST_REG_SSELCR 0x2C
|
||||
|
||||
#define AUDIO_MCBSP_DATAWRITE (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR1)
|
||||
#define AUDIO_MCBSP_DATAREAD (OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1)
|
||||
|
||||
#define AUDIO_MCBSP OMAP_MCBSP2
|
||||
#define AUDIO_DMA_TX OMAP24XX_DMA_MCBSP2_TX
|
||||
#define AUDIO_DMA_RX OMAP24XX_DMA_MCBSP2_RX
|
||||
|
||||
#endif
|
||||
|
||||
/************************** McBSP SPCR1 bit definitions ***********************/
|
||||
|
|
|
@ -66,7 +66,7 @@
|
|||
# error "OMAP1 and OMAP2PLUS can't be selected at the same time"
|
||||
# endif
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
# ifdef OMAP_NAME
|
||||
# undef MULTI_OMAP2
|
||||
# define MULTI_OMAP2
|
||||
|
@ -74,7 +74,7 @@
|
|||
# define OMAP_NAME omap2420
|
||||
# endif
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
# ifdef OMAP_NAME
|
||||
# undef MULTI_OMAP2
|
||||
# define MULTI_OMAP2
|
||||
|
|
|
@ -539,7 +539,6 @@ int omap_hwmod_init(struct omap_hwmod **ohs);
|
|||
struct omap_hwmod *omap_hwmod_lookup(const char *name);
|
||||
int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
|
||||
void *data);
|
||||
int omap_hwmod_late_init(void);
|
||||
|
||||
int omap_hwmod_enable(struct omap_hwmod *oh);
|
||||
int _omap_hwmod_enable(struct omap_hwmod *oh);
|
||||
|
|
|
@ -28,7 +28,6 @@
|
|||
#define __ASM_ARM_ARCH_OMAP_PRCM_H
|
||||
|
||||
u32 omap_prcm_get_reset_sources(void);
|
||||
void omap_prcm_arch_reset(char mode, const char *cmd);
|
||||
int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest,
|
||||
const char *name);
|
||||
|
||||
|
|
|
@ -51,6 +51,11 @@
|
|||
#define OMAP4_UART3_BASE 0x48020000
|
||||
#define OMAP4_UART4_BASE 0x4806e000
|
||||
|
||||
/* TI816X serial ports */
|
||||
#define TI816X_UART1_BASE 0x48020000
|
||||
#define TI816X_UART2_BASE 0x48022000
|
||||
#define TI816X_UART3_BASE 0x48024000
|
||||
|
||||
/* External port on Zoom2/3 */
|
||||
#define ZOOM_UART_BASE 0x10000000
|
||||
#define ZOOM_UART_VIRT 0xfa400000
|
||||
|
@ -81,6 +86,9 @@
|
|||
#define OMAP4UART2 OMAP2UART2
|
||||
#define OMAP4UART3 43
|
||||
#define OMAP4UART4 44
|
||||
#define TI816XUART1 81
|
||||
#define TI816XUART2 82
|
||||
#define TI816XUART3 83
|
||||
#define ZOOM_UART 95 /* Only on zoom2/3 */
|
||||
|
||||
/* This is only used by 8250.c for omap1510 */
|
||||
|
@ -96,7 +104,6 @@
|
|||
|
||||
struct omap_board_data;
|
||||
|
||||
extern void __init omap_serial_early_init(void);
|
||||
extern void omap_serial_init(void);
|
||||
extern void omap_serial_init_port(struct omap_board_data *bdata);
|
||||
extern int omap_uart_can_sleep(void);
|
||||
|
|
|
@ -4,48 +4,14 @@
|
|||
*/
|
||||
#ifndef __ASM_ARCH_SYSTEM_H
|
||||
#define __ASM_ARCH_SYSTEM_H
|
||||
#include <linux/clk.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <plat/prcm.h>
|
||||
|
||||
#ifndef CONFIG_MACH_VOICEBLUE
|
||||
#define voiceblue_reset() do {} while (0)
|
||||
#else
|
||||
extern void voiceblue_reset(void);
|
||||
#endif
|
||||
#include <asm/proc-fns.h>
|
||||
|
||||
static inline void arch_idle(void)
|
||||
{
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
static inline void omap1_arch_reset(char mode, const char *cmd)
|
||||
{
|
||||
/*
|
||||
* Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
|
||||
* "Global Software Reset Affects Traffic Controller Frequency".
|
||||
*/
|
||||
if (cpu_is_omap5912()) {
|
||||
omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4),
|
||||
DPLL_CTL);
|
||||
omap_writew(0x8, ARM_RSTCT1);
|
||||
}
|
||||
|
||||
if (machine_is_voiceblue())
|
||||
voiceblue_reset();
|
||||
else
|
||||
omap_writew(1, ARM_RSTCT1);
|
||||
}
|
||||
|
||||
static inline void arch_reset(char mode, const char *cmd)
|
||||
{
|
||||
if (!cpu_class_is_omap2())
|
||||
omap1_arch_reset(mode, cmd);
|
||||
else
|
||||
omap_prcm_arch_reset(mode, cmd);
|
||||
}
|
||||
extern void (*arch_reset)(char, const char *);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* This file contains the address data for various TI816X modules.
|
||||
*
|
||||
* Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation version 2.
|
||||
*
|
||||
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
|
||||
* kind, whether express or implied; without even the implied warranty
|
||||
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_TI816X_H
|
||||
#define __ASM_ARCH_TI816X_H
|
||||
|
||||
#define L4_SLOW_TI816X_BASE 0x48000000
|
||||
|
||||
#define TI816X_SCM_BASE 0x48140000
|
||||
#define TI816X_CTRL_BASE TI816X_SCM_BASE
|
||||
#define TI816X_PRCM_BASE 0x48180000
|
||||
|
||||
#define TI816X_ARM_INTC_BASE 0x48200000
|
||||
|
||||
#endif /* __ASM_ARCH_TI816X_H */
|
|
@ -93,6 +93,10 @@ static inline void flush(void)
|
|||
#define DEBUG_LL_ZOOM(mach) \
|
||||
_DEBUG_LL_ENTRY(mach, ZOOM_UART_BASE, ZOOM_PORT_SHIFT, ZOOM_UART)
|
||||
|
||||
#define DEBUG_LL_TI816X(p, mach) \
|
||||
_DEBUG_LL_ENTRY(mach, TI816X_UART##p##_BASE, OMAP_PORT_SHIFT, \
|
||||
TI816XUART##p)
|
||||
|
||||
static inline void __arch_decomp_setup(unsigned long arch_id)
|
||||
{
|
||||
int port = 0;
|
||||
|
@ -166,6 +170,9 @@ static inline void __arch_decomp_setup(unsigned long arch_id)
|
|||
DEBUG_LL_ZOOM(omap_zoom2);
|
||||
DEBUG_LL_ZOOM(omap_zoom3);
|
||||
|
||||
/* TI8168 base boards using UART3 */
|
||||
DEBUG_LL_TI816X(3, ti8168evm);
|
||||
|
||||
} while (0);
|
||||
}
|
||||
|
||||
|
|
|
@ -85,7 +85,10 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
|
|||
}
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
if (cpu_is_omap34xx()) {
|
||||
if (cpu_is_ti816x()) {
|
||||
if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
|
||||
return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
|
||||
} else if (cpu_is_omap34xx()) {
|
||||
if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
|
||||
return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
|
||||
if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
|
||||
|
|
|
@ -312,7 +312,7 @@ u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2420
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
static int __init omap242x_sram_init(void)
|
||||
{
|
||||
_omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
|
||||
|
@ -333,7 +333,7 @@ static inline int omap242x_sram_init(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP2430
|
||||
#ifdef CONFIG_SOC_OMAP2430
|
||||
static int __init omap243x_sram_init(void)
|
||||
{
|
||||
_omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
|
||||
|
|
|
@ -225,7 +225,7 @@ config MMC_OMAP
|
|||
|
||||
config MMC_OMAP_HS
|
||||
tristate "TI OMAP High Speed Multimedia Card Interface support"
|
||||
depends on ARCH_OMAP2430 || ARCH_OMAP3 || ARCH_OMAP4
|
||||
depends on SOC_OMAP2430 || ARCH_OMAP3 || ARCH_OMAP4
|
||||
help
|
||||
This selects the TI OMAP High Speed Multimedia card Interface.
|
||||
If you have an OMAP2430 or OMAP3 board or OMAP4 board with a
|
||||
|
|
|
@ -1111,7 +1111,7 @@ static u8 __initdata spi2_txdma_id[] = {
|
|||
OMAP24XX_DMA_SPI2_TX1,
|
||||
};
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \
|
||||
|| defined(CONFIG_ARCH_OMAP4)
|
||||
static u8 __initdata spi3_rxdma_id[] = {
|
||||
OMAP24XX_DMA_SPI3_RX0,
|
||||
|
@ -1154,7 +1154,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev)
|
|||
txdma_id = spi2_txdma_id;
|
||||
num_chipselect = 2;
|
||||
break;
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \
|
||||
|| defined(CONFIG_ARCH_OMAP4)
|
||||
case 3:
|
||||
rxdma_id = spi3_rxdma_id;
|
||||
|
|
|
@ -1530,7 +1530,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
|
|||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430) || \
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) || \
|
||||
defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_U8500) || \
|
||||
defined(CONFIG_ARCH_U5500)
|
||||
|
||||
|
|
|
@ -212,8 +212,8 @@ enum musb_g_ep0_state {
|
|||
* directly with the "flat" model, or after setting up an index register.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
|
||||
|| defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) \
|
||||
#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
|
||||
|| defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
|
||||
|| defined(CONFIG_ARCH_OMAP4)
|
||||
/* REVISIT indexed access seemed to
|
||||
* misbehave (on DaVinci) for at least peripheral IN ...
|
||||
|
@ -358,7 +358,7 @@ struct musb_csr_regs {
|
|||
|
||||
struct musb_context_registers {
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
|
||||
defined(CONFIG_ARCH_OMAP4)
|
||||
u32 otg_sysconfig, otg_forcestandby;
|
||||
#endif
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
|
||||
#include "omap2430.h"
|
||||
#endif
|
||||
|
||||
|
|
|
@ -1510,7 +1510,7 @@ isp1301_start_hnp(struct otg_transceiver *dev)
|
|||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
||||
static int __init
|
||||
static int __devinit
|
||||
isp1301_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
|
||||
{
|
||||
int status;
|
||||
|
|
|
@ -60,7 +60,7 @@ config W1_MASTER_GPIO
|
|||
|
||||
config HDQ_MASTER_OMAP
|
||||
tristate "OMAP HDQ driver"
|
||||
depends on ARCH_OMAP2430 || ARCH_OMAP3
|
||||
depends on SOC_OMAP2430 || ARCH_OMAP3
|
||||
help
|
||||
Say Y here if you want support for the 1-wire or HDQ Interface
|
||||
on an OMAP processor.
|
||||
|
|
|
@ -92,7 +92,7 @@ static const unsigned long omap1_mcbsp_port[][2] = {};
|
|||
static const int omap24xx_dma_reqs[][2] = {
|
||||
{ OMAP24XX_DMA_MCBSP1_TX, OMAP24XX_DMA_MCBSP1_RX },
|
||||
{ OMAP24XX_DMA_MCBSP2_TX, OMAP24XX_DMA_MCBSP2_RX },
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
|
||||
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
|
||||
{ OMAP24XX_DMA_MCBSP3_TX, OMAP24XX_DMA_MCBSP3_RX },
|
||||
{ OMAP24XX_DMA_MCBSP4_TX, OMAP24XX_DMA_MCBSP4_RX },
|
||||
{ OMAP24XX_DMA_MCBSP5_TX, OMAP24XX_DMA_MCBSP5_RX },
|
||||
|
@ -113,7 +113,7 @@ static const int omap44xx_dma_reqs[][2] = {
|
|||
static const int omap44xx_dma_reqs[][2] = {};
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2420)
|
||||
#if defined(CONFIG_SOC_OMAP2420)
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||||
static const unsigned long omap2420_mcbsp_port[][2] = {
|
||||
{ OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1,
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OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 },
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||||
|
@ -124,7 +124,7 @@ static const unsigned long omap2420_mcbsp_port[][2] = {
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static const unsigned long omap2420_mcbsp_port[][2] = {};
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||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2430)
|
||||
#if defined(CONFIG_SOC_OMAP2430)
|
||||
static const unsigned long omap2430_mcbsp_port[][2] = {
|
||||
{ OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR,
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||||
OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR },
|
||||
|
|
|
@ -43,7 +43,7 @@ enum omap_mcbsp_div {
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|||
OMAP_MCBSP_CLKGDV, /* Sample rate generator divider */
|
||||
};
|
||||
|
||||
#if defined(CONFIG_ARCH_OMAP2420)
|
||||
#if defined(CONFIG_SOC_OMAP2420)
|
||||
#define NUM_LINKS 2
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
|
||||
|
@ -54,7 +54,7 @@ enum omap_mcbsp_div {
|
|||
#undef NUM_LINKS
|
||||
#define NUM_LINKS 4
|
||||
#endif
|
||||
#if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
|
||||
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_SOC_OMAP2430)
|
||||
#undef NUM_LINKS
|
||||
#define NUM_LINKS 5
|
||||
#endif
|
||||
|
|
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