drm/amdgpu: move the context from the IBs into the job
We only have one context for all IBs. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -743,7 +743,6 @@ struct amdgpu_ib {
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struct amdgpu_user_fence *user;
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unsigned vm_id;
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uint64_t vm_pd_addr;
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uint64_t ctx;
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uint32_t gds_base, gds_size;
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uint32_t gws_base, gws_size;
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uint32_t oa_base, oa_size;
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@ -1262,6 +1261,7 @@ struct amdgpu_job {
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struct fence *fence; /* the hw fence */
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uint32_t num_ibs;
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void *owner;
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uint64_t ctx;
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struct amdgpu_user_fence uf;
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};
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#define to_amdgpu_job(sched_job) \
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@ -741,7 +741,6 @@ static int amdgpu_cs_ib_fill(struct amdgpu_device *adev,
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ib->length_dw = chunk_ib->ib_bytes / 4;
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ib->flags = chunk_ib->flags;
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ib->ctx = parser->ctx->rings[ring->idx].entity.fence_context;
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j++;
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}
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@ -840,6 +839,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
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union drm_amdgpu_cs *cs)
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{
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struct amdgpu_ring *ring = p->job->ring;
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struct amd_sched_entity *entity = &p->ctx->rings[ring->idx].entity;
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struct fence *fence;
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struct amdgpu_job *job;
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int r;
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@ -848,8 +848,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
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p->job = NULL;
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r = amd_sched_job_init(&job->base, &ring->sched,
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&p->ctx->rings[ring->idx].entity,
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amdgpu_job_timeout_func,
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entity, amdgpu_job_timeout_func,
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amdgpu_job_free_func,
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p->filp, &fence);
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if (r) {
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@ -858,6 +857,7 @@ static int amdgpu_cs_submit(struct amdgpu_cs_parser *p,
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}
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job->owner = p->filp;
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job->ctx = entity->fence_context;
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p->fence = fence_get(fence);
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cs->out.handle = amdgpu_ctx_add_fence(p->ctx, ring, fence);
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job->ibs[job->num_ibs - 1].sequence = cs->out.handle;
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@ -121,18 +121,26 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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{
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struct amdgpu_device *adev = ring->adev;
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struct amdgpu_ib *ib = &ibs[0];
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struct fence *hwf;
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struct amdgpu_vm *vm = NULL;
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unsigned i, patch_offset = ~0;
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bool skip_preamble, need_ctx_switch;
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unsigned patch_offset = ~0;
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struct amdgpu_vm *vm;
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struct fence *hwf;
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uint64_t ctx;
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unsigned i;
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int r = 0;
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if (num_ibs == 0)
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return -EINVAL;
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if (job) /* for domain0 job like ring test, ibs->job is not assigned */
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/* ring tests don't use a job */
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if (job) {
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vm = job->vm;
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ctx = job->ctx;
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} else {
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vm = NULL;
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ctx = 0;
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}
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if (!ring->ready) {
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dev_err(adev->dev, "couldn't schedule ib\n");
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@ -170,8 +178,8 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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/* always set cond_exec_polling to CONTINUE */
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*ring->cond_exe_cpu_addr = 1;
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skip_preamble = ring->current_ctx == ib->ctx;
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need_ctx_switch = ring->current_ctx != ib->ctx;
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skip_preamble = ring->current_ctx == ctx;
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need_ctx_switch = ring->current_ctx != ctx;
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for (i = 0; i < num_ibs; ++i) {
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ib = &ibs[i];
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@ -209,7 +217,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
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if (patch_offset != ~0 && ring->funcs->patch_cond_exec)
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amdgpu_ring_patch_cond_exec(ring, patch_offset);
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ring->current_ctx = ibs->ctx;
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ring->current_ctx = ctx;
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amdgpu_ring_commit(ring);
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return 0;
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}
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@ -122,14 +122,13 @@ int amdgpu_job_submit(struct amdgpu_job *job, struct amdgpu_ring *ring,
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return -EINVAL;
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r = amd_sched_job_init(&job->base, &ring->sched,
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entity,
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amdgpu_job_timeout_func,
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amdgpu_job_free_func,
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owner, &fence);
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entity, amdgpu_job_timeout_func,
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amdgpu_job_free_func, owner, &fence);
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if (r)
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return r;
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job->owner = owner;
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job->ctx = entity->fence_context;
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*f = fence_get(fence);
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amd_sched_entity_push_job(&job->base);
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