Merge branch 'parisc-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parisc update from Helge Deller: "This patchset adds Huge Page and HUGETLBFS support for parisc" Honestly, the hugepage support should have gone through in the merge window, and is not really an rc-time fix. But it only touches arch/parisc, and I cannot find it in myself to care. If one of the three parisc users notices a breakage, I will point at Helge and make rude farting noises. * 'parisc-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: Map kernel text and data on huge pages parisc: Add Huge Page and HUGETLBFS support parisc: Use long branch to do_syscall_trace_exit parisc: Increase initial kernel mapping to 32MB on 64bit kernel parisc: Initialize the fault vector earlier in the boot process. parisc: Add defines for Huge page support parisc: Drop unused MADV_xxxK_PAGES flags from asm/mman.h parisc: Drop definition of start_thread_som for HP-UX SOM binaries parisc: Fix wrong comment regarding first pmd entry flags
This commit is contained in:
Коммит
94521b2fd2
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@ -108,6 +108,9 @@ config PGTABLE_LEVELS
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default 3 if 64BIT && PARISC_PAGE_SIZE_4KB
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default 2
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config SYS_SUPPORTS_HUGETLBFS
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def_bool y if PA20
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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@ -0,0 +1,85 @@
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#ifndef _ASM_PARISC64_HUGETLB_H
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#define _ASM_PARISC64_HUGETLB_H
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#include <asm/page.h>
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#include <asm-generic/hugetlb.h>
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void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep, pte_t pte);
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pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
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pte_t *ptep);
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static inline int is_hugepage_only_range(struct mm_struct *mm,
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unsigned long addr,
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unsigned long len) {
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return 0;
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}
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/*
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* If the arch doesn't supply something else, assume that hugepage
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* size aligned regions are ok without further preparation.
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*/
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static inline int prepare_hugepage_range(struct file *file,
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unsigned long addr, unsigned long len)
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{
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if (len & ~HPAGE_MASK)
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return -EINVAL;
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if (addr & ~HPAGE_MASK)
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return -EINVAL;
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return 0;
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}
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static inline void hugetlb_free_pgd_range(struct mmu_gather *tlb,
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unsigned long addr, unsigned long end,
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unsigned long floor,
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unsigned long ceiling)
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{
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free_pgd_range(tlb, addr, end, floor, ceiling);
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}
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static inline void huge_ptep_clear_flush(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep)
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{
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}
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static inline int huge_pte_none(pte_t pte)
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{
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return pte_none(pte);
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}
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static inline pte_t huge_pte_wrprotect(pte_t pte)
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{
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return pte_wrprotect(pte);
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}
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static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
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unsigned long addr, pte_t *ptep)
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{
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pte_t old_pte = *ptep;
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set_huge_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
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}
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static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma,
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unsigned long addr, pte_t *ptep,
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pte_t pte, int dirty)
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{
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int changed = !pte_same(*ptep, pte);
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if (changed) {
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set_huge_pte_at(vma->vm_mm, addr, ptep, pte);
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flush_tlb_page(vma, addr);
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}
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return changed;
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}
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static inline pte_t huge_ptep_get(pte_t *ptep)
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{
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return *ptep;
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}
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static inline void arch_clear_hugepage_flags(struct page *page)
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{
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}
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#endif /* _ASM_PARISC64_HUGETLB_H */
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@ -145,11 +145,22 @@ extern int npmem_ranges;
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#endif /* CONFIG_DISCONTIGMEM */
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#ifdef CONFIG_HUGETLB_PAGE
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#define HPAGE_SHIFT 22 /* 4MB (is this fixed?) */
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#define HPAGE_SHIFT PMD_SHIFT /* fixed for transparent huge pages */
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#define HPAGE_SIZE ((1UL) << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE - 1))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
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#if defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
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# define REAL_HPAGE_SHIFT 20 /* 20 = 1MB */
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# define _HUGE_PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_1M
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#elif !defined(CONFIG_64BIT) && defined(CONFIG_PARISC_PAGE_SIZE_4KB)
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# define REAL_HPAGE_SHIFT 22 /* 22 = 4MB */
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# define _HUGE_PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4M
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#else
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# define REAL_HPAGE_SHIFT 24 /* 24 = 16MB */
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# define _HUGE_PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_16M
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#endif
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#endif /* CONFIG_HUGETLB_PAGE */
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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@ -35,7 +35,7 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
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PxD_FLAG_VALID |
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PxD_FLAG_ATTACHED)
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+ (__u32)(__pa((unsigned long)pgd) >> PxD_VALUE_SHIFT));
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/* The first pmd entry also is marked with _PAGE_GATEWAY as
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/* The first pmd entry also is marked with PxD_FLAG_ATTACHED as
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* a signal that this pmd may not be freed */
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__pgd_val_set(*pgd, PxD_FLAG_ATTACHED);
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#endif
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@ -83,7 +83,11 @@ static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr)
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printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, (unsigned long)pgd_val(e))
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/* This is the size of the initially mapped kernel memory */
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#define KERNEL_INITIAL_ORDER 24 /* 0 to 1<<24 = 16MB */
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#ifdef CONFIG_64BIT
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#define KERNEL_INITIAL_ORDER 25 /* 1<<25 = 32MB */
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#else
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#define KERNEL_INITIAL_ORDER 24 /* 1<<24 = 16MB */
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#endif
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#define KERNEL_INITIAL_SIZE (1 << KERNEL_INITIAL_ORDER)
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#if CONFIG_PGTABLE_LEVELS == 3
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@ -167,7 +171,7 @@ static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr)
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#define _PAGE_NO_CACHE_BIT 24 /* (0x080) Uncached Page (U bit) */
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#define _PAGE_ACCESSED_BIT 23 /* (0x100) Software: Page Accessed */
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#define _PAGE_PRESENT_BIT 22 /* (0x200) Software: translation valid */
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/* bit 21 was formerly the FLUSH bit but is now unused */
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#define _PAGE_HPAGE_BIT 21 /* (0x400) Software: Huge Page */
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#define _PAGE_USER_BIT 20 /* (0x800) Software: User accessible page */
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/* N.B. The bits are defined in terms of a 32 bit word above, so the */
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@ -194,6 +198,7 @@ static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr)
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#define _PAGE_NO_CACHE (1 << xlate_pabit(_PAGE_NO_CACHE_BIT))
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#define _PAGE_ACCESSED (1 << xlate_pabit(_PAGE_ACCESSED_BIT))
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#define _PAGE_PRESENT (1 << xlate_pabit(_PAGE_PRESENT_BIT))
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#define _PAGE_HUGE (1 << xlate_pabit(_PAGE_HPAGE_BIT))
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#define _PAGE_USER (1 << xlate_pabit(_PAGE_USER_BIT))
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#define _PAGE_TABLE (_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | _PAGE_DIRTY | _PAGE_ACCESSED)
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@ -217,7 +222,7 @@ static inline void purge_tlb_entries(struct mm_struct *mm, unsigned long addr)
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#define PxD_FLAG_VALID (1 << xlate_pabit(_PxD_VALID_BIT))
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#define PxD_FLAG_MASK (0xf)
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#define PxD_FLAG_SHIFT (4)
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#define PxD_VALUE_SHIFT (8) /* (PAGE_SHIFT-PxD_FLAG_SHIFT) */
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#define PxD_VALUE_SHIFT (PFN_PTE_SHIFT-PxD_FLAG_SHIFT)
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#ifndef __ASSEMBLY__
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@ -362,6 +367,18 @@ static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; ret
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static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_WRITE; return pte; }
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static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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/*
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* Huge pte definitions.
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*/
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#ifdef CONFIG_HUGETLB_PAGE
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#define pte_huge(pte) (pte_val(pte) & _PAGE_HUGE)
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#define pte_mkhuge(pte) (__pte(pte_val(pte) | _PAGE_HUGE))
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#else
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#define pte_huge(pte) (0)
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#define pte_mkhuge(pte) (pte)
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#endif
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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@ -410,8 +427,9 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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/* Find an entry in the second-level page table.. */
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#if CONFIG_PGTABLE_LEVELS == 3
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#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
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#define pmd_offset(dir,address) \
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((pmd_t *) pgd_page_vaddr(*(dir)) + (((address)>>PMD_SHIFT) & (PTRS_PER_PMD-1)))
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((pmd_t *) pgd_page_vaddr(*(dir)) + pmd_index(address))
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#else
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#define pmd_offset(dir,addr) ((pmd_t *) dir)
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#endif
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@ -192,33 +192,6 @@ void show_trace(struct task_struct *task, unsigned long *stack);
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*/
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typedef unsigned int elf_caddr_t;
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#define start_thread_som(regs, new_pc, new_sp) do { \
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unsigned long *sp = (unsigned long *)new_sp; \
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__u32 spaceid = (__u32)current->mm->context; \
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unsigned long pc = (unsigned long)new_pc; \
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/* offset pc for priv. level */ \
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pc |= 3; \
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\
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regs->iasq[0] = spaceid; \
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regs->iasq[1] = spaceid; \
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regs->iaoq[0] = pc; \
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regs->iaoq[1] = pc + 4; \
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regs->sr[2] = LINUX_GATEWAY_SPACE; \
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regs->sr[3] = 0xffff; \
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regs->sr[4] = spaceid; \
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regs->sr[5] = spaceid; \
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regs->sr[6] = spaceid; \
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regs->sr[7] = spaceid; \
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regs->gr[ 0] = USER_PSW; \
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regs->gr[30] = ((new_sp)+63)&~63; \
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regs->gr[31] = pc; \
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\
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get_user(regs->gr[26],&sp[0]); \
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get_user(regs->gr[25],&sp[-1]); \
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get_user(regs->gr[24],&sp[-2]); \
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get_user(regs->gr[23],&sp[-3]); \
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} while(0)
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/* The ELF abi wants things done a "wee bit" differently than
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* som does. Supporting this behavior here avoids
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* having our own version of create_elf_tables.
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@ -49,16 +49,6 @@
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#define MADV_DONTFORK 10 /* don't inherit across fork */
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#define MADV_DOFORK 11 /* do inherit across fork */
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/* The range 12-64 is reserved for page size specification. */
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#define MADV_4K_PAGES 12 /* Use 4K pages */
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#define MADV_16K_PAGES 14 /* Use 16K pages */
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#define MADV_64K_PAGES 16 /* Use 64K pages */
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#define MADV_256K_PAGES 18 /* Use 256K pages */
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#define MADV_1M_PAGES 20 /* Use 1 Megabyte pages */
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#define MADV_4M_PAGES 22 /* Use 4 Megabyte pages */
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#define MADV_16M_PAGES 24 /* Use 16 Megabyte pages */
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#define MADV_64M_PAGES 26 /* Use 64 Megabyte pages */
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#define MADV_MERGEABLE 65 /* KSM may merge identical pages */
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#define MADV_UNMERGEABLE 66 /* KSM may not merge identical pages */
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|
|
|
@ -289,6 +289,14 @@ int main(void)
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DEFINE(ASM_PTE_ENTRY_SIZE, PTE_ENTRY_SIZE);
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DEFINE(ASM_PFN_PTE_SHIFT, PFN_PTE_SHIFT);
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DEFINE(ASM_PT_INITIAL, PT_INITIAL);
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BLANK();
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/* HUGEPAGE_SIZE is only used in vmlinux.lds.S to align kernel text
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* and kernel data on physical huge pages */
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#ifdef CONFIG_HUGETLB_PAGE
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DEFINE(HUGEPAGE_SIZE, 1UL << REAL_HPAGE_SHIFT);
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#else
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DEFINE(HUGEPAGE_SIZE, PAGE_SIZE);
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#endif
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BLANK();
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DEFINE(EXCDATA_IP, offsetof(struct exception_data, fault_ip));
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DEFINE(EXCDATA_SPACE, offsetof(struct exception_data, fault_space));
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|
|
|
@ -502,21 +502,38 @@
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STREG \pte,0(\ptp)
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.endm
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/* We have (depending on the page size):
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* - 38 to 52-bit Physical Page Number
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* - 12 to 26-bit page offset
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*/
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/* bitshift difference between a PFN (based on kernel's PAGE_SIZE)
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* to a CPU TLB 4k PFN (4k => 12 bits to shift) */
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#define PAGE_ADD_SHIFT (PAGE_SHIFT-12)
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#define PAGE_ADD_SHIFT (PAGE_SHIFT-12)
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#define PAGE_ADD_HUGE_SHIFT (REAL_HPAGE_SHIFT-12)
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/* Drop prot bits and convert to page addr for iitlbt and idtlbt */
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.macro convert_for_tlb_insert20 pte
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.macro convert_for_tlb_insert20 pte,tmp
|
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#ifdef CONFIG_HUGETLB_PAGE
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copy \pte,\tmp
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extrd,u \tmp,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
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64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
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|
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depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_SHIFT,\pte
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extrd,u,*= \tmp,_PAGE_HPAGE_BIT+32,1,%r0
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depdi _HUGE_PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_HUGE_SHIFT,\pte
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#else /* Huge pages disabled */
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extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
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64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
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depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_SHIFT,\pte
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#endif
|
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.endm
|
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|
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/* Convert the pte and prot to tlb insertion values. How
|
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* this happens is quite subtle, read below */
|
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.macro make_insert_tlb spc,pte,prot
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.macro make_insert_tlb spc,pte,prot,tmp
|
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space_to_prot \spc \prot /* create prot id from space */
|
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/* The following is the real subtlety. This is depositing
|
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* T <-> _PAGE_REFTRAP
|
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|
@ -553,7 +570,7 @@
|
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depdi 1,12,1,\prot
|
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|
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/* Drop prot bits and convert to page addr for iitlbt and idtlbt */
|
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convert_for_tlb_insert20 \pte
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convert_for_tlb_insert20 \pte \tmp
|
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.endm
|
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|
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/* Identical macro to make_insert_tlb above, except it
|
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|
@ -646,17 +663,12 @@
|
|||
|
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|
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/*
|
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* Align fault_vector_20 on 4K boundary so that both
|
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* fault_vector_11 and fault_vector_20 are on the
|
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* same page. This is only necessary as long as we
|
||||
* write protect the kernel text, which we may stop
|
||||
* doing once we use large page translations to cover
|
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* the static part of the kernel address space.
|
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* Fault_vectors are architecturally required to be aligned on a 2K
|
||||
* boundary
|
||||
*/
|
||||
|
||||
.text
|
||||
|
||||
.align 4096
|
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.align 2048
|
||||
|
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ENTRY(fault_vector_20)
|
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/* First vector is invalid (0) */
|
||||
|
@ -1147,7 +1159,7 @@ dtlb_miss_20w:
|
|||
tlb_lock spc,ptp,pte,t0,t1,dtlb_check_alias_20w
|
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update_accessed ptp,pte,t0,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
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make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
idtlbt pte,prot
|
||||
|
||||
|
@ -1173,7 +1185,7 @@ nadtlb_miss_20w:
|
|||
tlb_lock spc,ptp,pte,t0,t1,nadtlb_check_alias_20w
|
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update_accessed ptp,pte,t0,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
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make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
idtlbt pte,prot
|
||||
|
||||
|
@ -1267,7 +1279,7 @@ dtlb_miss_20:
|
|||
tlb_lock spc,ptp,pte,t0,t1,dtlb_check_alias_20
|
||||
update_accessed ptp,pte,t0,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
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make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
f_extend pte,t1
|
||||
|
||||
|
@ -1295,7 +1307,7 @@ nadtlb_miss_20:
|
|||
tlb_lock spc,ptp,pte,t0,t1,nadtlb_check_alias_20
|
||||
update_accessed ptp,pte,t0,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
||||
make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
f_extend pte,t1
|
||||
|
||||
|
@ -1404,7 +1416,7 @@ itlb_miss_20w:
|
|||
tlb_lock spc,ptp,pte,t0,t1,itlb_fault
|
||||
update_accessed ptp,pte,t0,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
||||
make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
iitlbt pte,prot
|
||||
|
||||
|
@ -1428,7 +1440,7 @@ naitlb_miss_20w:
|
|||
tlb_lock spc,ptp,pte,t0,t1,naitlb_check_alias_20w
|
||||
update_accessed ptp,pte,t0,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
||||
make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
iitlbt pte,prot
|
||||
|
||||
|
@ -1514,7 +1526,7 @@ itlb_miss_20:
|
|||
tlb_lock spc,ptp,pte,t0,t1,itlb_fault
|
||||
update_accessed ptp,pte,t0,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
||||
make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
f_extend pte,t1
|
||||
|
||||
|
@ -1534,7 +1546,7 @@ naitlb_miss_20:
|
|||
tlb_lock spc,ptp,pte,t0,t1,naitlb_check_alias_20
|
||||
update_accessed ptp,pte,t0,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
||||
make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
f_extend pte,t1
|
||||
|
||||
|
@ -1566,7 +1578,7 @@ dbit_trap_20w:
|
|||
tlb_lock spc,ptp,pte,t0,t1,dbit_fault
|
||||
update_dirty ptp,pte,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
||||
make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
idtlbt pte,prot
|
||||
|
||||
|
@ -1610,7 +1622,7 @@ dbit_trap_20:
|
|||
tlb_lock spc,ptp,pte,t0,t1,dbit_fault
|
||||
update_dirty ptp,pte,t1
|
||||
|
||||
make_insert_tlb spc,pte,prot
|
||||
make_insert_tlb spc,pte,prot,t1
|
||||
|
||||
f_extend pte,t1
|
||||
|
||||
|
|
|
@ -69,7 +69,7 @@ $bss_loop:
|
|||
stw,ma %arg2,4(%r1)
|
||||
stw,ma %arg3,4(%r1)
|
||||
|
||||
/* Initialize startup VM. Just map first 8/16 MB of memory */
|
||||
/* Initialize startup VM. Just map first 16/32 MB of memory */
|
||||
load32 PA(swapper_pg_dir),%r4
|
||||
mtctl %r4,%cr24 /* Initialize kernel root pointer */
|
||||
mtctl %r4,%cr25 /* Initialize user root pointer */
|
||||
|
@ -107,7 +107,7 @@ $bss_loop:
|
|||
/* Now initialize the PTEs themselves. We use RWX for
|
||||
* everything ... it will get remapped correctly later */
|
||||
ldo 0+_PAGE_KERNEL_RWX(%r0),%r3 /* Hardwired 0 phys addr start */
|
||||
ldi (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
|
||||
load32 (1<<(KERNEL_INITIAL_ORDER-PAGE_SHIFT)),%r11 /* PFN count */
|
||||
load32 PA(pg0),%r1
|
||||
|
||||
$pgt_fill_loop:
|
||||
|
|
|
@ -130,7 +130,16 @@ void __init setup_arch(char **cmdline_p)
|
|||
printk(KERN_INFO "The 32-bit Kernel has started...\n");
|
||||
#endif
|
||||
|
||||
printk(KERN_INFO "Default page size is %dKB.\n", (int)(PAGE_SIZE / 1024));
|
||||
printk(KERN_INFO "Kernel default page size is %d KB. Huge pages ",
|
||||
(int)(PAGE_SIZE / 1024));
|
||||
#ifdef CONFIG_HUGETLB_PAGE
|
||||
printk(KERN_CONT "enabled with %d MB physical and %d MB virtual size",
|
||||
1 << (REAL_HPAGE_SHIFT - 20), 1 << (HPAGE_SHIFT - 20));
|
||||
#else
|
||||
printk(KERN_CONT "disabled");
|
||||
#endif
|
||||
printk(KERN_CONT ".\n");
|
||||
|
||||
|
||||
pdc_console_init();
|
||||
|
||||
|
@ -377,6 +386,7 @@ arch_initcall(parisc_init);
|
|||
void start_parisc(void)
|
||||
{
|
||||
extern void start_kernel(void);
|
||||
extern void early_trap_init(void);
|
||||
|
||||
int ret, cpunum;
|
||||
struct pdc_coproc_cfg coproc_cfg;
|
||||
|
@ -397,6 +407,8 @@ void start_parisc(void)
|
|||
panic("must have an fpu to boot linux");
|
||||
}
|
||||
|
||||
early_trap_init(); /* initialize checksum of fault_vector */
|
||||
|
||||
start_kernel();
|
||||
// not reached
|
||||
}
|
||||
|
|
|
@ -369,7 +369,7 @@ tracesys_exit:
|
|||
ldo -16(%r30),%r29 /* Reference param save area */
|
||||
#endif
|
||||
ldo TASK_REGS(%r1),%r26
|
||||
bl do_syscall_trace_exit,%r2
|
||||
BL do_syscall_trace_exit,%r2
|
||||
STREG %r28,TASK_PT_GR28(%r1) /* save return value now */
|
||||
ldo -THREAD_SZ_ALGN-FRAME_SIZE(%r30),%r1 /* get task ptr */
|
||||
LDREG TI_TASK(%r1), %r1
|
||||
|
@ -390,7 +390,7 @@ tracesys_sigexit:
|
|||
#ifdef CONFIG_64BIT
|
||||
ldo -16(%r30),%r29 /* Reference param save area */
|
||||
#endif
|
||||
bl do_syscall_trace_exit,%r2
|
||||
BL do_syscall_trace_exit,%r2
|
||||
ldo TASK_REGS(%r1),%r26
|
||||
|
||||
ldil L%syscall_exit_rfi,%r1
|
||||
|
|
|
@ -807,7 +807,7 @@ void notrace handle_interruption(int code, struct pt_regs *regs)
|
|||
}
|
||||
|
||||
|
||||
int __init check_ivt(void *iva)
|
||||
void __init initialize_ivt(const void *iva)
|
||||
{
|
||||
extern u32 os_hpmc_size;
|
||||
extern const u32 os_hpmc[];
|
||||
|
@ -818,8 +818,8 @@ int __init check_ivt(void *iva)
|
|||
u32 *hpmcp;
|
||||
u32 length;
|
||||
|
||||
if (strcmp((char *)iva, "cows can fly"))
|
||||
return -1;
|
||||
if (strcmp((const char *)iva, "cows can fly"))
|
||||
panic("IVT invalid");
|
||||
|
||||
ivap = (u32 *)iva;
|
||||
|
||||
|
@ -839,28 +839,23 @@ int __init check_ivt(void *iva)
|
|||
check += ivap[i];
|
||||
|
||||
ivap[5] = -check;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* early_trap_init() is called before we set up kernel mappings and
|
||||
* write-protect the kernel */
|
||||
void __init early_trap_init(void)
|
||||
{
|
||||
extern const void fault_vector_20;
|
||||
|
||||
#ifndef CONFIG_64BIT
|
||||
extern const void fault_vector_11;
|
||||
extern const void fault_vector_11;
|
||||
initialize_ivt(&fault_vector_11);
|
||||
#endif
|
||||
extern const void fault_vector_20;
|
||||
|
||||
initialize_ivt(&fault_vector_20);
|
||||
}
|
||||
|
||||
void __init trap_init(void)
|
||||
{
|
||||
void *iva;
|
||||
|
||||
if (boot_cpu_data.cpu_type >= pcxu)
|
||||
iva = (void *) &fault_vector_20;
|
||||
else
|
||||
#ifdef CONFIG_64BIT
|
||||
panic("Can't boot 64-bit OS on PA1.1 processor!");
|
||||
#else
|
||||
iva = (void *) &fault_vector_11;
|
||||
#endif
|
||||
|
||||
if (check_ivt(iva))
|
||||
panic("IVT invalid");
|
||||
}
|
||||
|
|
|
@ -60,7 +60,7 @@ SECTIONS
|
|||
EXIT_DATA
|
||||
}
|
||||
PERCPU_SECTION(8)
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
. = ALIGN(HUGEPAGE_SIZE);
|
||||
__init_end = .;
|
||||
/* freed after init ends here */
|
||||
|
||||
|
@ -116,7 +116,7 @@ SECTIONS
|
|||
* that we can properly leave these
|
||||
* as writable
|
||||
*/
|
||||
. = ALIGN(PAGE_SIZE);
|
||||
. = ALIGN(HUGEPAGE_SIZE);
|
||||
data_start = .;
|
||||
|
||||
EXCEPTION_TABLE(8)
|
||||
|
@ -135,8 +135,11 @@ SECTIONS
|
|||
_edata = .;
|
||||
|
||||
/* BSS */
|
||||
BSS_SECTION(PAGE_SIZE, PAGE_SIZE, 8)
|
||||
BSS_SECTION(PAGE_SIZE, PAGE_SIZE, PAGE_SIZE)
|
||||
|
||||
/* bootmap is allocated in setup_bootmem() directly behind bss. */
|
||||
|
||||
. = ALIGN(HUGEPAGE_SIZE);
|
||||
_end = . ;
|
||||
|
||||
STABS_DEBUG
|
||||
|
|
|
@ -3,3 +3,4 @@
|
|||
#
|
||||
|
||||
obj-y := init.o fault.o ioremap.o
|
||||
obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
|
||||
|
|
|
@ -0,0 +1,161 @@
|
|||
/*
|
||||
* PARISC64 Huge TLB page support.
|
||||
*
|
||||
* This parisc implementation is heavily based on the SPARC and x86 code.
|
||||
*
|
||||
* Copyright (C) 2015 Helge Deller <deller@gmx.de>
|
||||
*/
|
||||
|
||||
#include <linux/fs.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/hugetlb.h>
|
||||
#include <linux/pagemap.h>
|
||||
#include <linux/sysctl.h>
|
||||
|
||||
#include <asm/mman.h>
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/tlb.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/mmu_context.h>
|
||||
|
||||
|
||||
unsigned long
|
||||
hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
|
||||
unsigned long len, unsigned long pgoff, unsigned long flags)
|
||||
{
|
||||
struct hstate *h = hstate_file(file);
|
||||
|
||||
if (len & ~huge_page_mask(h))
|
||||
return -EINVAL;
|
||||
if (len > TASK_SIZE)
|
||||
return -ENOMEM;
|
||||
|
||||
if (flags & MAP_FIXED)
|
||||
if (prepare_hugepage_range(file, addr, len))
|
||||
return -EINVAL;
|
||||
|
||||
if (addr)
|
||||
addr = ALIGN(addr, huge_page_size(h));
|
||||
|
||||
/* we need to make sure the colouring is OK */
|
||||
return arch_get_unmapped_area(file, addr, len, pgoff, flags);
|
||||
}
|
||||
|
||||
|
||||
pte_t *huge_pte_alloc(struct mm_struct *mm,
|
||||
unsigned long addr, unsigned long sz)
|
||||
{
|
||||
pgd_t *pgd;
|
||||
pud_t *pud;
|
||||
pmd_t *pmd;
|
||||
pte_t *pte = NULL;
|
||||
|
||||
/* We must align the address, because our caller will run
|
||||
* set_huge_pte_at() on whatever we return, which writes out
|
||||
* all of the sub-ptes for the hugepage range. So we have
|
||||
* to give it the first such sub-pte.
|
||||
*/
|
||||
addr &= HPAGE_MASK;
|
||||
|
||||
pgd = pgd_offset(mm, addr);
|
||||
pud = pud_alloc(mm, pgd, addr);
|
||||
if (pud) {
|
||||
pmd = pmd_alloc(mm, pud, addr);
|
||||
if (pmd)
|
||||
pte = pte_alloc_map(mm, NULL, pmd, addr);
|
||||
}
|
||||
return pte;
|
||||
}
|
||||
|
||||
pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
|
||||
{
|
||||
pgd_t *pgd;
|
||||
pud_t *pud;
|
||||
pmd_t *pmd;
|
||||
pte_t *pte = NULL;
|
||||
|
||||
addr &= HPAGE_MASK;
|
||||
|
||||
pgd = pgd_offset(mm, addr);
|
||||
if (!pgd_none(*pgd)) {
|
||||
pud = pud_offset(pgd, addr);
|
||||
if (!pud_none(*pud)) {
|
||||
pmd = pmd_offset(pud, addr);
|
||||
if (!pmd_none(*pmd))
|
||||
pte = pte_offset_map(pmd, addr);
|
||||
}
|
||||
}
|
||||
return pte;
|
||||
}
|
||||
|
||||
/* Purge data and instruction TLB entries. Must be called holding
|
||||
* the pa_tlb_lock. The TLB purge instructions are slow on SMP
|
||||
* machines since the purge must be broadcast to all CPUs.
|
||||
*/
|
||||
static inline void purge_tlb_entries_huge(struct mm_struct *mm, unsigned long addr)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* We may use multiple physical huge pages (e.g. 2x1 MB) to emulate
|
||||
* Linux standard huge pages (e.g. 2 MB) */
|
||||
BUILD_BUG_ON(REAL_HPAGE_SHIFT > HPAGE_SHIFT);
|
||||
|
||||
addr &= HPAGE_MASK;
|
||||
addr |= _HUGE_PAGE_SIZE_ENCODING_DEFAULT;
|
||||
|
||||
for (i = 0; i < (1 << (HPAGE_SHIFT-REAL_HPAGE_SHIFT)); i++) {
|
||||
mtsp(mm->context, 1);
|
||||
pdtlb(addr);
|
||||
if (unlikely(split_tlb))
|
||||
pitlb(addr);
|
||||
addr += (1UL << REAL_HPAGE_SHIFT);
|
||||
}
|
||||
}
|
||||
|
||||
void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep, pte_t entry)
|
||||
{
|
||||
unsigned long addr_start;
|
||||
int i;
|
||||
|
||||
addr &= HPAGE_MASK;
|
||||
addr_start = addr;
|
||||
|
||||
for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
|
||||
/* Directly write pte entry. We could call set_pte_at(mm, addr, ptep, entry)
|
||||
* instead, but then we get double locking on pa_tlb_lock. */
|
||||
*ptep = entry;
|
||||
ptep++;
|
||||
|
||||
/* Drop the PAGE_SIZE/non-huge tlb entry */
|
||||
purge_tlb_entries(mm, addr);
|
||||
|
||||
addr += PAGE_SIZE;
|
||||
pte_val(entry) += PAGE_SIZE;
|
||||
}
|
||||
|
||||
purge_tlb_entries_huge(mm, addr_start);
|
||||
}
|
||||
|
||||
|
||||
pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
|
||||
pte_t *ptep)
|
||||
{
|
||||
pte_t entry;
|
||||
|
||||
entry = *ptep;
|
||||
set_huge_pte_at(mm, addr, ptep, __pte(0));
|
||||
|
||||
return entry;
|
||||
}
|
||||
|
||||
int pmd_huge(pmd_t pmd)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int pud_huge(pud_t pud)
|
||||
{
|
||||
return 0;
|
||||
}
|
|
@ -409,15 +409,11 @@ static void __init map_pages(unsigned long start_vaddr,
|
|||
unsigned long vaddr;
|
||||
unsigned long ro_start;
|
||||
unsigned long ro_end;
|
||||
unsigned long fv_addr;
|
||||
unsigned long gw_addr;
|
||||
extern const unsigned long fault_vector_20;
|
||||
extern void * const linux_gateway_page;
|
||||
unsigned long kernel_end;
|
||||
|
||||
ro_start = __pa((unsigned long)_text);
|
||||
ro_end = __pa((unsigned long)&data_start);
|
||||
fv_addr = __pa((unsigned long)&fault_vector_20) & PAGE_MASK;
|
||||
gw_addr = __pa((unsigned long)&linux_gateway_page) & PAGE_MASK;
|
||||
kernel_end = __pa((unsigned long)&_end);
|
||||
|
||||
end_paddr = start_paddr + size;
|
||||
|
||||
|
@ -475,24 +471,25 @@ static void __init map_pages(unsigned long start_vaddr,
|
|||
for (tmp2 = start_pte; tmp2 < PTRS_PER_PTE; tmp2++, pg_table++) {
|
||||
pte_t pte;
|
||||
|
||||
/*
|
||||
* Map the fault vector writable so we can
|
||||
* write the HPMC checksum.
|
||||
*/
|
||||
if (force)
|
||||
pte = __mk_pte(address, pgprot);
|
||||
else if (parisc_text_address(vaddr) &&
|
||||
address != fv_addr)
|
||||
else if (parisc_text_address(vaddr)) {
|
||||
pte = __mk_pte(address, PAGE_KERNEL_EXEC);
|
||||
if (address >= ro_start && address < kernel_end)
|
||||
pte = pte_mkhuge(pte);
|
||||
}
|
||||
else
|
||||
#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
|
||||
if (address >= ro_start && address < ro_end
|
||||
&& address != fv_addr
|
||||
&& address != gw_addr)
|
||||
pte = __mk_pte(address, PAGE_KERNEL_RO);
|
||||
else
|
||||
if (address >= ro_start && address < ro_end) {
|
||||
pte = __mk_pte(address, PAGE_KERNEL_EXEC);
|
||||
pte = pte_mkhuge(pte);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
pte = __mk_pte(address, pgprot);
|
||||
if (address >= ro_start && address < kernel_end)
|
||||
pte = pte_mkhuge(pte);
|
||||
}
|
||||
|
||||
if (address >= end_paddr) {
|
||||
if (force)
|
||||
|
@ -536,15 +533,12 @@ void free_initmem(void)
|
|||
|
||||
/* force the kernel to see the new TLB entries */
|
||||
__flush_tlb_range(0, init_begin, init_end);
|
||||
/* Attempt to catch anyone trying to execute code here
|
||||
* by filling the page with BRK insns.
|
||||
*/
|
||||
memset((void *)init_begin, 0x00, init_end - init_begin);
|
||||
|
||||
/* finally dump all the instructions which were cached, since the
|
||||
* pages are no-longer executable */
|
||||
flush_icache_range(init_begin, init_end);
|
||||
|
||||
free_initmem_default(-1);
|
||||
free_initmem_default(POISON_FREE_INITMEM);
|
||||
|
||||
/* set up a new led state on systems shipped LED State panel */
|
||||
pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE);
|
||||
|
@ -728,8 +722,8 @@ static void __init pagetable_init(void)
|
|||
unsigned long size;
|
||||
|
||||
start_paddr = pmem_ranges[range].start_pfn << PAGE_SHIFT;
|
||||
end_paddr = start_paddr + (pmem_ranges[range].pages << PAGE_SHIFT);
|
||||
size = pmem_ranges[range].pages << PAGE_SHIFT;
|
||||
end_paddr = start_paddr + size;
|
||||
|
||||
map_pages((unsigned long)__va(start_paddr), start_paddr,
|
||||
size, PAGE_KERNEL, 0);
|
||||
|
|
Загрузка…
Ссылка в новой задаче