ARM: dts: berlin: Add missing OPP properties for CPUs

The OPP properties, like "operating-points", should either be present
for all the CPUs of a cluster or none. If these are present only for a
subset of CPUs of a cluster then things will start falling apart as soon
as the CPUs are brought online in a different order. For example, this
will happen because the operating system looks for such properties in
the CPU node it is trying to bring up, so that it can create an OPP
table.

Add such missing properties.

Fix other missing properties (clocks, clock latency) as well to
make it all work.

Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Viresh Kumar 2018-07-20 18:11:50 +08:00 коммит произвёл Olof Johansson
Родитель 4d4ef9c422
Коммит 945d004788
2 изменённых файлов: 43 добавлений и 0 удалений

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@ -50,6 +50,16 @@
device_type = "cpu";
next-level-cache = <&l2>;
reg = <1>;
clocks = <&chip_clk CLKID_CPU>;
clock-latency = <100000>;
operating-points = <
/* kHz uV */
1200000 1200000
1000000 1200000
800000 1200000
600000 1200000
>;
};
};

Просмотреть файл

@ -45,6 +45,17 @@
device_type = "cpu";
next-level-cache = <&l2>;
reg = <1>;
clocks = <&chip_clk CLKID_CPU>;
clock-latency = <100000>;
/* Can be modified by the bootloader */
operating-points = <
/* kHz uV */
1200000 1200000
1000000 1200000
800000 1200000
600000 1200000
>;
};
cpu2: cpu@2 {
@ -52,6 +63,17 @@
device_type = "cpu";
next-level-cache = <&l2>;
reg = <2>;
clocks = <&chip_clk CLKID_CPU>;
clock-latency = <100000>;
/* Can be modified by the bootloader */
operating-points = <
/* kHz uV */
1200000 1200000
1000000 1200000
800000 1200000
600000 1200000
>;
};
cpu3: cpu@3 {
@ -59,6 +81,17 @@
device_type = "cpu";
next-level-cache = <&l2>;
reg = <3>;
clocks = <&chip_clk CLKID_CPU>;
clock-latency = <100000>;
/* Can be modified by the bootloader */
operating-points = <
/* kHz uV */
1200000 1200000
1000000 1200000
800000 1200000
600000 1200000
>;
};
};