[SERIAL] Convert fifosize to an unsigned int

Some UARTs have more than 255 bytes of FIFO, which can't be
represented by an unsigned char.  Change the kernel's internal
structure to be an unsigned int, but still export an unsigned char
via the TIOCGSERIAL ioctl.  If the TIOCSSERIAL ioctl provides a
fifo size of 0, assume this means "don't change" otherwise we'll
corrupt the larger fifo sizes.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2006-07-02 20:45:51 +01:00 коммит произвёл Russell King
Родитель 4faf4e0e7d
Коммит 947deee890
3 изменённых файлов: 7 добавлений и 5 удалений

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@ -728,8 +728,7 @@ mpc52xx_uart_probe(struct platform_device *dev)
spin_lock_init(&port->lock); spin_lock_init(&port->lock);
port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */ port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
port->fifosize = 255; /* Should be 512 ! But it can't be */ port->fifosize = 512;
/* stored in a unsigned char */
port->iotype = UPIO_MEM; port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF | port->flags = UPF_BOOT_AUTOCONF |
( uart_console(port) ? 0 : UPF_IOREMAP ); ( uart_console(port) ? 0 : UPF_IOREMAP );

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@ -691,7 +691,8 @@ static int uart_set_info(struct uart_state *state,
(new_serial.baud_base != port->uartclk / 16) || (new_serial.baud_base != port->uartclk / 16) ||
(close_delay != state->close_delay) || (close_delay != state->close_delay) ||
(closing_wait != state->closing_wait) || (closing_wait != state->closing_wait) ||
(new_serial.xmit_fifo_size != port->fifosize) || (new_serial.xmit_fifo_size &&
new_serial.xmit_fifo_size != port->fifosize) ||
(((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0)) (((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0))
goto exit; goto exit;
port->flags = ((port->flags & ~UPF_USR_MASK) | port->flags = ((port->flags & ~UPF_USR_MASK) |
@ -796,7 +797,8 @@ static int uart_set_info(struct uart_state *state,
port->custom_divisor = new_serial.custom_divisor; port->custom_divisor = new_serial.custom_divisor;
state->close_delay = close_delay; state->close_delay = close_delay;
state->closing_wait = closing_wait; state->closing_wait = closing_wait;
port->fifosize = new_serial.xmit_fifo_size; if (new_serial.xmit_fifo_size)
port->fifosize = new_serial.xmit_fifo_size;
if (state->info->tty) if (state->info->tty)
state->info->tty->low_latency = state->info->tty->low_latency =
(port->flags & UPF_LOW_LATENCY) ? 1 : 0; (port->flags & UPF_LOW_LATENCY) ? 1 : 0;

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@ -214,10 +214,11 @@ struct uart_port {
unsigned char __iomem *membase; /* read/write[bwl] */ unsigned char __iomem *membase; /* read/write[bwl] */
unsigned int irq; /* irq number */ unsigned int irq; /* irq number */
unsigned int uartclk; /* base uart clock */ unsigned int uartclk; /* base uart clock */
unsigned char fifosize; /* tx fifo size */ unsigned int fifosize; /* tx fifo size */
unsigned char x_char; /* xon/xoff char */ unsigned char x_char; /* xon/xoff char */
unsigned char regshift; /* reg offset shift */ unsigned char regshift; /* reg offset shift */
unsigned char iotype; /* io access style */ unsigned char iotype; /* io access style */
unsigned char unused1;
#define UPIO_PORT (0) #define UPIO_PORT (0)
#define UPIO_HUB6 (1) #define UPIO_HUB6 (1)