nios2 update for v4.3-rc1
- add defconfig and device tree for max 10 support - migrate to new 'set-state' interface for timer - fix unaligned handler - MAINTAINERS: update nios2 git repo -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJV7udCAAoJEFWoEK+e3syCM+MQAM4S4S9bFJwm/YxnYgG9nsgT KfNWfd11OH9/qoqM4lpZKlfzHy/TbH4d4YaBpxQqtbaXmBzmrMNW0+q8AyYLTRq4 YdXI+hifJz/WaBaJEvC0GvOtso0iUQlD7LWeBP9/tcqRJc0vGi8ewIHMBd9fPPCy I6WJ14rdsedq2YrX5wCpms/qHqrmankEzK6e8TPxN0kY+N1Nj7ob0b+lcgxJznEJ V0TGfXDAerSnmrf4xZOAaZZIlZIA5bD9HQkjw3XDQLgUuluqLau1bS4WIi/1Eos3 OBCB4F5mwedBmL9AqXeji8hQ+Q/WQd3JRH+PMaFnJtA1vGAF5MS2hcHErfd5D/KV fHR/8lj1Vfhx45TQYveJQga83y1mN1Sz7PKKGkpzUSFBY0N2RamhmB0BW5vfYCSs Cx/kKgFi9M+4f9cJi6YX/rz3SB+uYPMPitaXD4PTTCfa2TRf6Pu3WONtZISgTRJ4 w2twZ/tSwRodotZONSgblGJUaA0BlAgcNSZ7Vgt0nmTQyIaO2zQjsrT2/1VzibaD q4Bcexh0bX7O2/EH519vj5Xyk1KPcke4p/6gdDMflv9bsy6zWpKyH4lQe/3YN/tY sRVkdEBon9gnm8vZ1YetzptBJxfBNiQ3+XKsv/xWvDa+ZUBVuzKkq9Iooqn2dWIO 1RNZOgJLTg3dPfUfHw97 =Fi7d -----END PGP SIGNATURE----- Merge tag 'nios2-v4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2 Pull nios2 updates from Ley Foon Tan: - add defconfig and device tree for max 10 support - migrate to new 'set-state' interface for timer - fix unaligned handler - MAINTAINERS: update nios2 git repo * tag 'nios2-v4.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2: nios2: add Max10 defconfig nios2: Add Max10 device tree MAINTAINERS: update nios2 git repo nios2: remove unused statistic counters nios2: fixed variable imm16 to s16 nios2/time: Migrate to new 'set-state' interface
This commit is contained in:
Linus Torvalds
Коммит
949feacb8a
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@ -7377,7 +7377,7 @@ F: drivers/scsi/nsp32*
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NIOS2 ARCHITECTURE
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M: Ley Foon Tan <lftan@altera.com>
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L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers)
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T: git git://git.rocketboards.org/linux-socfpga-next.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/lftan/nios2.git
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S: Maintained
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F: arch/nios2/
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@ -0,0 +1,248 @@
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/*
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* Copyright (C) 2015 Altera Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
|
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/dts-v1/;
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/ {
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model = "Altera NiosII Max10";
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compatible = "altr,niosii-max10";
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#address-cells = <1>;
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#size-cells = <1>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu: cpu@0 {
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device_type = "cpu";
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compatible = "altr,nios2-1.1";
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reg = <0x00000000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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altr,exception-addr = <0xc8000120>;
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altr,fast-tlb-miss-addr = <0xc0000100>;
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altr,has-div = <1>;
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altr,has-initda = <1>;
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altr,has-mmu = <1>;
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altr,has-mul = <1>;
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altr,implementation = "fast";
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altr,pid-num-bits = <8>;
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altr,reset-addr = <0xd4000000>;
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altr,tlb-num-entries = <256>;
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altr,tlb-num-ways = <16>;
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altr,tlb-ptr-sz = <8>;
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clock-frequency = <75000000>;
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dcache-line-size = <32>;
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dcache-size = <32768>;
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icache-line-size = <32>;
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icache-size = <32768>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x08000000 0x08000000>,
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<0x00000000 0x00000400>;
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};
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sopc0: sopc@0 {
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device_type = "soc";
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "altr,avalon", "simple-bus";
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bus-frequency = <75000000>;
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jtag_uart: serial@18001530 {
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compatible = "altr,juart-1.0";
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reg = <0x18001530 0x00000008>;
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interrupt-parent = <&cpu>;
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interrupts = <7>;
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};
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a_16550_uart_0: serial@18001600 {
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compatible = "altr,16550-FIFO32", "ns16550a";
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reg = <0x18001600 0x00000200>;
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interrupt-parent = <&cpu>;
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interrupts = <1>;
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auto-flow-control = <1>;
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clock-frequency = <50000000>;
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fifo-size = <32>;
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reg-io-width = <4>;
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reg-shift = <2>;
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};
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sysid: sysid@18001528 {
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compatible = "altr,sysid-1.0";
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reg = <0x18001528 0x00000008>;
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id = <4207856382>;
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timestamp = <1431309290>;
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};
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rgmii_0_eth_tse_0: ethernet@400 {
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compatible = "altr,tse-msgdma-1.0", "altr,tse-1.0";
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reg = <0x00000400 0x00000400>,
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<0x00000820 0x00000020>,
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<0x00000800 0x00000020>,
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<0x000008c0 0x00000008>,
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<0x00000840 0x00000020>,
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<0x00000860 0x00000020>;
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reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc";
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interrupt-parent = <&cpu>;
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interrupts = <2 3>;
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interrupt-names = "rx_irq", "tx_irq";
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rx-fifo-depth = <8192>;
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tx-fifo-depth = <8192>;
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address-bits = <48>;
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max-frame-size = <1518>;
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local-mac-address = [00 00 00 00 00 00];
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altr,has-supplementary-unicast;
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altr,enable-sup-addr = <1>;
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altr,has-hash-multicast-filter;
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altr,enable-hash = <1>;
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phy-mode = "rgmii-id";
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phy-handle = <&phy0>;
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rgmii_0_eth_tse_0_mdio: mdio {
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compatible = "altr,tse-mdio";
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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device_type = "ethernet-phy";
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};
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};
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};
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enet_pll: clock@0 {
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compatible = "altr,pll-1.0";
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#clock-cells = <1>;
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enet_pll_c0: enet_pll_c0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <125000000>;
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clock-output-names = "enet_pll-c0";
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};
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enet_pll_c1: enet_pll_c1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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clock-output-names = "enet_pll-c1";
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};
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enet_pll_c2: enet_pll_c2 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <2500000>;
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clock-output-names = "enet_pll-c2";
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};
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};
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sys_pll: clock@1 {
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compatible = "altr,pll-1.0";
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#clock-cells = <1>;
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sys_pll_c0: sys_pll_c0 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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clock-output-names = "sys_pll-c0";
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};
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sys_pll_c1: sys_pll_c1 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "sys_pll-c1";
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};
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sys_pll_c2: sys_pll_c2 {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <75000000>;
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clock-output-names = "sys_pll-c2";
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};
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};
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sys_clk_timer: timer@18001440 {
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compatible = "altr,timer-1.0";
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reg = <0x18001440 0x00000020>;
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interrupt-parent = <&cpu>;
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interrupts = <0>;
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clock-frequency = <75000000>;
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};
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led_pio: gpio@180014d0 {
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compatible = "altr,pio-1.0";
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reg = <0x180014d0 0x00000010>;
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altr,gpio-bank-width = <4>;
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resetvalue = <15>;
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#gpio-cells = <2>;
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gpio-controller;
|
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};
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button_pio: gpio@180014c0 {
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compatible = "altr,pio-1.0";
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reg = <0x180014c0 0x00000010>;
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interrupt-parent = <&cpu>;
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interrupts = <6>;
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altr,gpio-bank-width = <3>;
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altr,interrupt-type = <2>;
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edge_type = <1>;
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level_trigger = <0>;
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resetvalue = <0>;
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#gpio-cells = <2>;
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gpio-controller;
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};
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sys_clk_timer_1: timer@880 {
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compatible = "altr,timer-1.0";
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reg = <0x00000880 0x00000020>;
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interrupt-parent = <&cpu>;
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interrupts = <5>;
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clock-frequency = <75000000>;
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};
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fpga_leds: leds {
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compatible = "gpio-leds";
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led_fpga0: fpga0 {
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label = "fpga_led0";
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gpios = <&led_pio 0 1>;
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};
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led_fpga1: fpga1 {
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label = "fpga_led1";
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gpios = <&led_pio 1 1>;
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};
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led_fpga2: fpga2 {
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label = "fpga_led2";
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gpios = <&led_pio 2 1>;
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};
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led_fpga3: fpga3 {
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label = "fpga_led3";
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gpios = <&led_pio 3 1>;
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};
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};
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};
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chosen {
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bootargs = "debug console=ttyS0,115200";
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};
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};
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@ -0,0 +1,81 @@
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CONFIG_SYSVIPC=y
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CONFIG_NO_HZ_IDLE=y
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CONFIG_BSD_PROCESS_ACCT=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_SYSCTL_SYSCALL=y
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# CONFIG_ELF_CORE is not set
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# CONFIG_EPOLL is not set
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# CONFIG_SIGNALFD is not set
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# CONFIG_TIMERFD is not set
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# CONFIG_EVENTFD is not set
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# CONFIG_SHMEM is not set
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# CONFIG_AIO is not set
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CONFIG_EMBEDDED=y
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CONFIG_SLAB=y
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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CONFIG_NIOS2_MEM_BASE=0x8000000
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CONFIG_NIOS2_HW_MUL_SUPPORT=y
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CONFIG_NIOS2_HW_DIV_SUPPORT=y
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CONFIG_CUSTOM_CACHE_SETTINGS=y
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CONFIG_NIOS2_DCACHE_SIZE=0x8000
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CONFIG_NIOS2_ICACHE_SIZE=0x8000
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# CONFIG_NIOS2_CMDLINE_IGNORE_DTB is not set
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_INET=y
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CONFIG_IP_MULTICAST=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_DHCP=y
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CONFIG_IP_PNP_BOOTP=y
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CONFIG_IP_PNP_RARP=y
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# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
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# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
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# CONFIG_INET_LRO is not set
|
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# CONFIG_IPV6 is not set
|
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# CONFIG_WIRELESS is not set
|
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CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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CONFIG_DEVTMPFS=y
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CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_FW_LOADER is not set
|
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CONFIG_MTD=y
|
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CONFIG_MTD_CMDLINE_PARTS=y
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CONFIG_MTD_BLOCK=y
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CONFIG_MTD_CFI=y
|
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CONFIG_MTD_CFI_INTELEXT=y
|
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CONFIG_MTD_CFI_AMDSTD=y
|
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CONFIG_BLK_DEV_LOOP=y
|
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CONFIG_NETDEVICES=y
|
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CONFIG_ALTERA_TSE=y
|
||||
CONFIG_MARVELL_PHY=y
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO_SERPORT is not set
|
||||
# CONFIG_VT is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIAL_ALTERA_JTAGUART=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_ALTERA=y
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
# CONFIG_DNOTIFY is not set
|
||||
# CONFIG_INOTIFY_USER is not set
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_SUNRPC_DEBUG=y
|
||||
CONFIG_DEBUG_INFO=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
|
@ -32,8 +32,6 @@
|
|||
#define INST_STW 0x15
|
||||
#define INST_LDW 0x17
|
||||
|
||||
static unsigned long ma_user, ma_kern, ma_skipped, ma_half, ma_word;
|
||||
|
||||
static unsigned int ma_usermode;
|
||||
#define UM_WARN 0x01
|
||||
#define UM_FIXUP 0x02
|
||||
|
|
@ -53,7 +51,6 @@ static int reg_offsets[32];
|
|||
static inline u32 get_reg_val(struct pt_regs *fp, int reg)
|
||||
{
|
||||
u8 *p = ((u8 *)fp) + reg_offsets[reg];
|
||||
|
||||
return *(u32 *)p;
|
||||
}
|
||||
|
||||
|
|
@ -71,14 +68,13 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
|
|||
u32 isn, addr, val;
|
||||
int in_kernel;
|
||||
u8 a, b, d0, d1, d2, d3;
|
||||
u16 imm16;
|
||||
s16 imm16;
|
||||
unsigned int fault;
|
||||
|
||||
/* back up one instruction */
|
||||
fp->ea -= 4;
|
||||
|
||||
if (fixup_exception(fp)) {
|
||||
ma_skipped++;
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -103,18 +99,11 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
|
|||
fault |= __get_user(d1, (u8 *)(addr+1));
|
||||
val = (d1 << 8) | d0;
|
||||
put_reg_val(fp, b, val);
|
||||
ma_half++;
|
||||
break;
|
||||
case INST_STH:
|
||||
val = get_reg_val(fp, b);
|
||||
d1 = val >> 8;
|
||||
d0 = val >> 0;
|
||||
|
||||
pr_debug("sth: ra=%d (%08x) rb=%d (%08x), imm16 %04x addr %08x val %08x\n",
|
||||
a, get_reg_val(fp, a),
|
||||
b, get_reg_val(fp, b),
|
||||
imm16, addr, val);
|
||||
|
||||
if (in_kernel) {
|
||||
*(u8 *)(addr+0) = d0;
|
||||
*(u8 *)(addr+1) = d1;
|
||||
|
|
@ -122,14 +111,12 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
|
|||
fault |= __put_user(d0, (u8 *)(addr+0));
|
||||
fault |= __put_user(d1, (u8 *)(addr+1));
|
||||
}
|
||||
ma_half++;
|
||||
break;
|
||||
case INST_LDH:
|
||||
fault |= __get_user(d0, (u8 *)(addr+0));
|
||||
fault |= __get_user(d1, (u8 *)(addr+1));
|
||||
val = (short)((d1 << 8) | d0);
|
||||
put_reg_val(fp, b, val);
|
||||
ma_half++;
|
||||
break;
|
||||
case INST_STW:
|
||||
val = get_reg_val(fp, b);
|
||||
|
|
@ -148,7 +135,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
|
|||
fault |= __put_user(d2, (u8 *)(addr+2));
|
||||
fault |= __put_user(d3, (u8 *)(addr+3));
|
||||
}
|
||||
ma_word++;
|
||||
break;
|
||||
case INST_LDW:
|
||||
fault |= __get_user(d0, (u8 *)(addr+0));
|
||||
|
|
@ -157,7 +143,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
|
|||
fault |= __get_user(d3, (u8 *)(addr+3));
|
||||
val = (d3 << 24) | (d2 << 16) | (d1 << 8) | d0;
|
||||
put_reg_val(fp, b, val);
|
||||
ma_word++;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -186,7 +171,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
|
|||
* note exception and skip bad instruction (return)
|
||||
*/
|
||||
if (in_kernel) {
|
||||
ma_kern++;
|
||||
fp->ea += 4;
|
||||
|
||||
if (ma_usermode & KM_WARN) {
|
||||
|
|
@ -200,8 +184,6 @@ asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause)
|
|||
return;
|
||||
}
|
||||
|
||||
ma_user++;
|
||||
|
||||
/*
|
||||
* user mode -
|
||||
* possibly warn,
|
||||
|
|
|
|||
|
|
@ -130,7 +130,7 @@ static void nios2_timer_stop(struct nios2_timer *timer)
|
|||
}
|
||||
|
||||
static void nios2_timer_config(struct nios2_timer *timer, unsigned long period,
|
||||
enum clock_event_mode mode)
|
||||
bool periodic)
|
||||
{
|
||||
u16 ctrl;
|
||||
|
||||
|
|
@ -148,7 +148,7 @@ static void nios2_timer_config(struct nios2_timer *timer, unsigned long period,
|
|||
timer_writew(timer, period >> 16, ALTERA_TIMER_PERIODH_REG);
|
||||
|
||||
ctrl |= ALTERA_TIMER_CONTROL_START_MSK | ALTERA_TIMER_CONTROL_ITO_MSK;
|
||||
if (mode == CLOCK_EVT_MODE_PERIODIC)
|
||||
if (periodic)
|
||||
ctrl |= ALTERA_TIMER_CONTROL_CONT_MSK;
|
||||
else
|
||||
ctrl &= ~ALTERA_TIMER_CONTROL_CONT_MSK;
|
||||
|
|
@ -160,32 +160,38 @@ static int nios2_timer_set_next_event(unsigned long delta,
|
|||
{
|
||||
struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
|
||||
|
||||
nios2_timer_config(&nios2_ced->timer, delta, evt->mode);
|
||||
nios2_timer_config(&nios2_ced->timer, delta, false);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void nios2_timer_set_mode(enum clock_event_mode mode,
|
||||
struct clock_event_device *evt)
|
||||
static int nios2_timer_shutdown(struct clock_event_device *evt)
|
||||
{
|
||||
struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
|
||||
struct nios2_timer *timer = &nios2_ced->timer;
|
||||
|
||||
nios2_timer_stop(timer);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nios2_timer_set_periodic(struct clock_event_device *evt)
|
||||
{
|
||||
unsigned long period;
|
||||
struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
|
||||
struct nios2_timer *timer = &nios2_ced->timer;
|
||||
|
||||
switch (mode) {
|
||||
case CLOCK_EVT_MODE_PERIODIC:
|
||||
period = DIV_ROUND_UP(timer->freq, HZ);
|
||||
nios2_timer_config(timer, period, CLOCK_EVT_MODE_PERIODIC);
|
||||
break;
|
||||
case CLOCK_EVT_MODE_ONESHOT:
|
||||
case CLOCK_EVT_MODE_UNUSED:
|
||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
nios2_timer_stop(timer);
|
||||
break;
|
||||
case CLOCK_EVT_MODE_RESUME:
|
||||
nios2_timer_start(timer);
|
||||
break;
|
||||
}
|
||||
period = DIV_ROUND_UP(timer->freq, HZ);
|
||||
nios2_timer_config(timer, period, true);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int nios2_timer_resume(struct clock_event_device *evt)
|
||||
{
|
||||
struct nios2_clockevent_dev *nios2_ced = to_nios2_clkevent(evt);
|
||||
struct nios2_timer *timer = &nios2_ced->timer;
|
||||
|
||||
nios2_timer_start(timer);
|
||||
return 0;
|
||||
}
|
||||
|
||||
irqreturn_t timer_interrupt(int irq, void *dev_id)
|
||||
|
|
@ -218,7 +224,10 @@ static struct nios2_clockevent_dev nios2_ce = {
|
|||
.rating = 250,
|
||||
.shift = 32,
|
||||
.set_next_event = nios2_timer_set_next_event,
|
||||
.set_mode = nios2_timer_set_mode,
|
||||
.set_state_shutdown = nios2_timer_shutdown,
|
||||
.set_state_periodic = nios2_timer_set_periodic,
|
||||
.set_state_oneshot = nios2_timer_shutdown,
|
||||
.tick_resume = nios2_timer_resume,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
|||
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