perf test attr: Update no event/metric expectations
Previously hard coded events/metrics were used, update for the use of
the TopdownL1 json metric group.
Reported-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Fixes: 94b1a603fc
("perf stat: Add TopdownL1 metric as a default if present")
Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Ian Rogers <irogers@google.com>
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Tested-by: Kan Liang <kan.liang@linux.intel.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Link: https://lore.kernel.org/r/20230517225707.2682235-1-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Родитель
1b5f159ce8
Коммит
951efb9976
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@ -16,7 +16,7 @@ pinned=0
|
|||
exclusive=0
|
||||
exclude_user=0
|
||||
exclude_kernel=0|1
|
||||
exclude_hv=0
|
||||
exclude_hv=0|1
|
||||
exclude_idle=0
|
||||
mmap=0
|
||||
comm=0
|
||||
|
|
|
@ -40,7 +40,6 @@ fd=6
|
|||
type=0
|
||||
config=7
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_BACKEND
|
||||
[event7:base-stat]
|
||||
fd=7
|
||||
|
@ -89,22 +88,11 @@ enable_on_exec=0
|
|||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-bad-spec (0x8100)
|
||||
# PERF_TYPE_RAW / topdown-fe-bound (0x8200)
|
||||
[event13:base-stat]
|
||||
fd=13
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33024
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-fe-bound (0x8200)
|
||||
[event14:base-stat]
|
||||
fd=14
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33280
|
||||
disabled=0
|
||||
enable_on_exec=0
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||||
|
@ -112,8 +100,8 @@ read_format=15
|
|||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-be-bound (0x8300)
|
||||
[event15:base-stat]
|
||||
fd=15
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||||
[event14:base-stat]
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||||
fd=14
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||||
group_fd=11
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||||
type=4
|
||||
config=33536
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||||
|
@ -122,46 +110,76 @@ enable_on_exec=0
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|||
read_format=15
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||||
optional=1
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||||
|
||||
# PERF_TYPE_RAW / topdown-heavy-ops (0x8400)
|
||||
# PERF_TYPE_RAW / topdown-bad-spec (0x8100)
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||||
[event15:base-stat]
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||||
fd=15
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||||
group_fd=11
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||||
type=4
|
||||
config=33024
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||||
disabled=0
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||||
enable_on_exec=0
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||||
read_format=15
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||||
optional=1
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||||
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||||
# PERF_TYPE_RAW / INT_MISC.UOP_DROPPING
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||||
[event16:base-stat]
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||||
fd=16
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||||
group_fd=11
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||||
type=4
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||||
config=33792
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||||
disabled=0
|
||||
enable_on_exec=0
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||||
read_format=15
|
||||
config=4109
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||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-br-mispredict (0x8500)
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||||
# PERF_TYPE_RAW / cpu/INT_MISC.RECOVERY_CYCLES,cmask=1,edge/
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||||
[event17:base-stat]
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||||
fd=17
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||||
group_fd=11
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||||
type=4
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||||
config=34048
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||||
disabled=0
|
||||
enable_on_exec=0
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||||
read_format=15
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||||
config=17039629
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||||
optional=1
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||||
|
||||
# PERF_TYPE_RAW / topdown-fetch-lat (0x8600)
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# PERF_TYPE_RAW / CPU_CLK_UNHALTED.THREAD
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[event18:base-stat]
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fd=18
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group_fd=11
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type=4
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||||
config=34304
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||||
disabled=0
|
||||
enable_on_exec=0
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||||
read_format=15
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||||
config=60
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||||
optional=1
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||||
|
||||
# PERF_TYPE_RAW / topdown-mem-bound (0x8700)
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||||
# PERF_TYPE_RAW / INT_MISC.RECOVERY_CYCLES_ANY
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||||
[event19:base-stat]
|
||||
fd=19
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||||
group_fd=11
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||||
type=4
|
||||
config=34560
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||||
disabled=0
|
||||
enable_on_exec=0
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||||
read_format=15
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||||
config=2097421
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||||
optional=1
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||||
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||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.REF_XCLK
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[event20:base-stat]
|
||||
fd=20
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||||
type=4
|
||||
config=316
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / IDQ_UOPS_NOT_DELIVERED.CORE
|
||||
[event21:base-stat]
|
||||
fd=21
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||||
type=4
|
||||
config=412
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE
|
||||
[event22:base-stat]
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||||
fd=22
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||||
type=4
|
||||
config=572
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||||
optional=1
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||||
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||||
# PERF_TYPE_RAW / UOPS_RETIRED.RETIRE_SLOTS
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||||
[event23:base-stat]
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||||
fd=23
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||||
type=4
|
||||
config=706
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||||
optional=1
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||||
|
||||
# PERF_TYPE_RAW / UOPS_ISSUED.ANY
|
||||
[event24:base-stat]
|
||||
fd=24
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||||
type=4
|
||||
config=270
|
||||
optional=1
|
||||
|
|
|
@ -90,22 +90,11 @@ enable_on_exec=0
|
|||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-bad-spec (0x8100)
|
||||
# PERF_TYPE_RAW / topdown-fe-bound (0x8200)
|
||||
[event13:base-stat]
|
||||
fd=13
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33024
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-fe-bound (0x8200)
|
||||
[event14:base-stat]
|
||||
fd=14
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||||
group_fd=11
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||||
type=4
|
||||
config=33280
|
||||
disabled=0
|
||||
enable_on_exec=0
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||||
|
@ -113,8 +102,8 @@ read_format=15
|
|||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-be-bound (0x8300)
|
||||
[event15:base-stat]
|
||||
fd=15
|
||||
[event14:base-stat]
|
||||
fd=14
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33536
|
||||
|
@ -123,56 +112,86 @@ enable_on_exec=0
|
|||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-heavy-ops (0x8400)
|
||||
# PERF_TYPE_RAW / topdown-bad-spec (0x8100)
|
||||
[event15:base-stat]
|
||||
fd=15
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33024
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / INT_MISC.UOP_DROPPING
|
||||
[event16:base-stat]
|
||||
fd=16
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33792
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=4109
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-br-mispredict (0x8500)
|
||||
# PERF_TYPE_RAW / cpu/INT_MISC.RECOVERY_CYCLES,cmask=1,edge/
|
||||
[event17:base-stat]
|
||||
fd=17
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34048
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=17039629
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-fetch-lat (0x8600)
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.THREAD
|
||||
[event18:base-stat]
|
||||
fd=18
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34304
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=60
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-mem-bound (0x8700)
|
||||
# PERF_TYPE_RAW / INT_MISC.RECOVERY_CYCLES_ANY
|
||||
[event19:base-stat]
|
||||
fd=19
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34560
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=2097421
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.REF_XCLK
|
||||
[event20:base-stat]
|
||||
fd=20
|
||||
type=4
|
||||
config=316
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / IDQ_UOPS_NOT_DELIVERED.CORE
|
||||
[event21:base-stat]
|
||||
fd=21
|
||||
type=4
|
||||
config=412
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE
|
||||
[event22:base-stat]
|
||||
fd=22
|
||||
type=4
|
||||
config=572
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / UOPS_RETIRED.RETIRE_SLOTS
|
||||
[event23:base-stat]
|
||||
fd=23
|
||||
type=4
|
||||
config=706
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / UOPS_ISSUED.ANY
|
||||
[event24:base-stat]
|
||||
fd=24
|
||||
type=4
|
||||
config=270
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_HW_CACHE /
|
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# PERF_COUNT_HW_CACHE_L1D << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event20:base-stat]
|
||||
fd=20
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||||
[event25:base-stat]
|
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fd=25
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||||
type=3
|
||||
config=0
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||||
optional=1
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||||
|
@ -181,8 +200,8 @@ optional=1
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|||
# PERF_COUNT_HW_CACHE_L1D << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event21:base-stat]
|
||||
fd=21
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||||
[event26:base-stat]
|
||||
fd=26
|
||||
type=3
|
||||
config=65536
|
||||
optional=1
|
||||
|
@ -191,8 +210,8 @@ optional=1
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|||
# PERF_COUNT_HW_CACHE_LL << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event22:base-stat]
|
||||
fd=22
|
||||
[event27:base-stat]
|
||||
fd=27
|
||||
type=3
|
||||
config=2
|
||||
optional=1
|
||||
|
@ -201,8 +220,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_LL << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event23:base-stat]
|
||||
fd=23
|
||||
[event28:base-stat]
|
||||
fd=28
|
||||
type=3
|
||||
config=65538
|
||||
optional=1
|
||||
|
|
|
@ -90,22 +90,11 @@ enable_on_exec=0
|
|||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-bad-spec (0x8100)
|
||||
# PERF_TYPE_RAW / topdown-fe-bound (0x8200)
|
||||
[event13:base-stat]
|
||||
fd=13
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33024
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-fe-bound (0x8200)
|
||||
[event14:base-stat]
|
||||
fd=14
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33280
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
|
@ -113,8 +102,8 @@ read_format=15
|
|||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-be-bound (0x8300)
|
||||
[event15:base-stat]
|
||||
fd=15
|
||||
[event14:base-stat]
|
||||
fd=14
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33536
|
||||
|
@ -123,56 +112,86 @@ enable_on_exec=0
|
|||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-heavy-ops (0x8400)
|
||||
# PERF_TYPE_RAW / topdown-bad-spec (0x8100)
|
||||
[event15:base-stat]
|
||||
fd=15
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33024
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / INT_MISC.UOP_DROPPING
|
||||
[event16:base-stat]
|
||||
fd=16
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33792
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=4109
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-br-mispredict (0x8500)
|
||||
# PERF_TYPE_RAW / cpu/INT_MISC.RECOVERY_CYCLES,cmask=1,edge/
|
||||
[event17:base-stat]
|
||||
fd=17
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34048
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=17039629
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-fetch-lat (0x8600)
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.THREAD
|
||||
[event18:base-stat]
|
||||
fd=18
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34304
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=60
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-mem-bound (0x8700)
|
||||
# PERF_TYPE_RAW / INT_MISC.RECOVERY_CYCLES_ANY
|
||||
[event19:base-stat]
|
||||
fd=19
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34560
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=2097421
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.REF_XCLK
|
||||
[event20:base-stat]
|
||||
fd=20
|
||||
type=4
|
||||
config=316
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / IDQ_UOPS_NOT_DELIVERED.CORE
|
||||
[event21:base-stat]
|
||||
fd=21
|
||||
type=4
|
||||
config=412
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE
|
||||
[event22:base-stat]
|
||||
fd=22
|
||||
type=4
|
||||
config=572
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / UOPS_RETIRED.RETIRE_SLOTS
|
||||
[event23:base-stat]
|
||||
fd=23
|
||||
type=4
|
||||
config=706
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / UOPS_ISSUED.ANY
|
||||
[event24:base-stat]
|
||||
fd=24
|
||||
type=4
|
||||
config=270
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_HW_CACHE /
|
||||
# PERF_COUNT_HW_CACHE_L1D << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event20:base-stat]
|
||||
fd=20
|
||||
[event25:base-stat]
|
||||
fd=25
|
||||
type=3
|
||||
config=0
|
||||
optional=1
|
||||
|
@ -181,8 +200,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_L1D << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event21:base-stat]
|
||||
fd=21
|
||||
[event26:base-stat]
|
||||
fd=26
|
||||
type=3
|
||||
config=65536
|
||||
optional=1
|
||||
|
@ -191,8 +210,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_LL << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event22:base-stat]
|
||||
fd=22
|
||||
[event27:base-stat]
|
||||
fd=27
|
||||
type=3
|
||||
config=2
|
||||
optional=1
|
||||
|
@ -201,8 +220,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_LL << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event23:base-stat]
|
||||
fd=23
|
||||
[event28:base-stat]
|
||||
fd=28
|
||||
type=3
|
||||
config=65538
|
||||
optional=1
|
||||
|
@ -211,8 +230,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_L1I << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event24:base-stat]
|
||||
fd=24
|
||||
[event29:base-stat]
|
||||
fd=29
|
||||
type=3
|
||||
config=1
|
||||
optional=1
|
||||
|
@ -221,8 +240,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_L1I << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event25:base-stat]
|
||||
fd=25
|
||||
[event30:base-stat]
|
||||
fd=30
|
||||
type=3
|
||||
config=65537
|
||||
optional=1
|
||||
|
@ -231,8 +250,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_DTLB << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event26:base-stat]
|
||||
fd=26
|
||||
[event31:base-stat]
|
||||
fd=31
|
||||
type=3
|
||||
config=3
|
||||
optional=1
|
||||
|
@ -241,8 +260,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_DTLB << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event27:base-stat]
|
||||
fd=27
|
||||
[event32:base-stat]
|
||||
fd=32
|
||||
type=3
|
||||
config=65539
|
||||
optional=1
|
||||
|
@ -251,8 +270,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_ITLB << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event28:base-stat]
|
||||
fd=28
|
||||
[event33:base-stat]
|
||||
fd=33
|
||||
type=3
|
||||
config=4
|
||||
optional=1
|
||||
|
@ -261,8 +280,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_ITLB << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event29:base-stat]
|
||||
fd=29
|
||||
[event34:base-stat]
|
||||
fd=34
|
||||
type=3
|
||||
config=65540
|
||||
optional=1
|
||||
|
|
|
@ -90,22 +90,11 @@ enable_on_exec=0
|
|||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-bad-spec (0x8100)
|
||||
# PERF_TYPE_RAW / topdown-fe-bound (0x8200)
|
||||
[event13:base-stat]
|
||||
fd=13
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33024
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-fe-bound (0x8200)
|
||||
[event14:base-stat]
|
||||
fd=14
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33280
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
|
@ -113,8 +102,8 @@ read_format=15
|
|||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-be-bound (0x8300)
|
||||
[event15:base-stat]
|
||||
fd=15
|
||||
[event14:base-stat]
|
||||
fd=14
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33536
|
||||
|
@ -123,56 +112,86 @@ enable_on_exec=0
|
|||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-heavy-ops (0x8400)
|
||||
# PERF_TYPE_RAW / topdown-bad-spec (0x8100)
|
||||
[event15:base-stat]
|
||||
fd=15
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33024
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / INT_MISC.UOP_DROPPING
|
||||
[event16:base-stat]
|
||||
fd=16
|
||||
group_fd=11
|
||||
type=4
|
||||
config=33792
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=4109
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-br-mispredict (0x8500)
|
||||
# PERF_TYPE_RAW / cpu/INT_MISC.RECOVERY_CYCLES,cmask=1,edge/
|
||||
[event17:base-stat]
|
||||
fd=17
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34048
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=17039629
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-fetch-lat (0x8600)
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.THREAD
|
||||
[event18:base-stat]
|
||||
fd=18
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34304
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=60
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / topdown-mem-bound (0x8700)
|
||||
# PERF_TYPE_RAW / INT_MISC.RECOVERY_CYCLES_ANY
|
||||
[event19:base-stat]
|
||||
fd=19
|
||||
group_fd=11
|
||||
type=4
|
||||
config=34560
|
||||
disabled=0
|
||||
enable_on_exec=0
|
||||
read_format=15
|
||||
config=2097421
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.REF_XCLK
|
||||
[event20:base-stat]
|
||||
fd=20
|
||||
type=4
|
||||
config=316
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / IDQ_UOPS_NOT_DELIVERED.CORE
|
||||
[event21:base-stat]
|
||||
fd=21
|
||||
type=4
|
||||
config=412
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / CPU_CLK_UNHALTED.ONE_THREAD_ACTIVE
|
||||
[event22:base-stat]
|
||||
fd=22
|
||||
type=4
|
||||
config=572
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / UOPS_RETIRED.RETIRE_SLOTS
|
||||
[event23:base-stat]
|
||||
fd=23
|
||||
type=4
|
||||
config=706
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_RAW / UOPS_ISSUED.ANY
|
||||
[event24:base-stat]
|
||||
fd=24
|
||||
type=4
|
||||
config=270
|
||||
optional=1
|
||||
|
||||
# PERF_TYPE_HW_CACHE /
|
||||
# PERF_COUNT_HW_CACHE_L1D << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event20:base-stat]
|
||||
fd=20
|
||||
[event25:base-stat]
|
||||
fd=25
|
||||
type=3
|
||||
config=0
|
||||
optional=1
|
||||
|
@ -181,8 +200,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_L1D << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event21:base-stat]
|
||||
fd=21
|
||||
[event26:base-stat]
|
||||
fd=26
|
||||
type=3
|
||||
config=65536
|
||||
optional=1
|
||||
|
@ -191,8 +210,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_LL << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event22:base-stat]
|
||||
fd=22
|
||||
[event27:base-stat]
|
||||
fd=27
|
||||
type=3
|
||||
config=2
|
||||
optional=1
|
||||
|
@ -201,8 +220,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_LL << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event23:base-stat]
|
||||
fd=23
|
||||
[event28:base-stat]
|
||||
fd=28
|
||||
type=3
|
||||
config=65538
|
||||
optional=1
|
||||
|
@ -211,8 +230,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_L1I << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event24:base-stat]
|
||||
fd=24
|
||||
[event29:base-stat]
|
||||
fd=29
|
||||
type=3
|
||||
config=1
|
||||
optional=1
|
||||
|
@ -221,8 +240,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_L1I << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event25:base-stat]
|
||||
fd=25
|
||||
[event30:base-stat]
|
||||
fd=30
|
||||
type=3
|
||||
config=65537
|
||||
optional=1
|
||||
|
@ -231,8 +250,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_DTLB << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event26:base-stat]
|
||||
fd=26
|
||||
[event31:base-stat]
|
||||
fd=31
|
||||
type=3
|
||||
config=3
|
||||
optional=1
|
||||
|
@ -241,8 +260,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_DTLB << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event27:base-stat]
|
||||
fd=27
|
||||
[event32:base-stat]
|
||||
fd=32
|
||||
type=3
|
||||
config=65539
|
||||
optional=1
|
||||
|
@ -251,8 +270,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_ITLB << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event28:base-stat]
|
||||
fd=28
|
||||
[event33:base-stat]
|
||||
fd=33
|
||||
type=3
|
||||
config=4
|
||||
optional=1
|
||||
|
@ -261,8 +280,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_ITLB << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event29:base-stat]
|
||||
fd=29
|
||||
[event34:base-stat]
|
||||
fd=34
|
||||
type=3
|
||||
config=65540
|
||||
optional=1
|
||||
|
@ -271,8 +290,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_L1D << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
|
||||
[event30:base-stat]
|
||||
fd=30
|
||||
[event35:base-stat]
|
||||
fd=35
|
||||
type=3
|
||||
config=512
|
||||
optional=1
|
||||
|
@ -281,8 +300,8 @@ optional=1
|
|||
# PERF_COUNT_HW_CACHE_L1D << 0 |
|
||||
# (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
|
||||
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
|
||||
[event31:base-stat]
|
||||
fd=31
|
||||
[event36:base-stat]
|
||||
fd=36
|
||||
type=3
|
||||
config=66048
|
||||
optional=1
|
||||
|
|
Загрузка…
Ссылка в новой задаче