rtw88: 8821c: add false alarm statistics
False alarm statistics can be used to adjust the RX gain. This helps the driver to adapt to different circumstances. Implement rtw_chip_ops::false_alarm_statistics() for 8821c. Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Tzu-En Huang <tehuang@realtek.com> Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org> Link: https://lore.kernel.org/r/20200616091625.26489-7-yhchuang@realtek.com
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@ -511,6 +511,58 @@ static void rtw8821c_set_tx_power_index(struct rtw_dev *rtwdev)
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}
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}
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static void rtw8821c_false_alarm_statistics(struct rtw_dev *rtwdev)
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{
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struct rtw_dm_info *dm_info = &rtwdev->dm_info;
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u32 cck_enable;
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u32 cck_fa_cnt;
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u32 ofdm_fa_cnt;
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u32 crc32_cnt;
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u32 cca32_cnt;
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cck_enable = rtw_read32(rtwdev, REG_RXPSEL) & BIT(28);
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cck_fa_cnt = rtw_read16(rtwdev, REG_FA_CCK);
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ofdm_fa_cnt = rtw_read16(rtwdev, REG_FA_OFDM);
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dm_info->cck_fa_cnt = cck_fa_cnt;
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dm_info->ofdm_fa_cnt = ofdm_fa_cnt;
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if (cck_enable)
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dm_info->total_fa_cnt += cck_fa_cnt;
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dm_info->total_fa_cnt = ofdm_fa_cnt;
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crc32_cnt = rtw_read32(rtwdev, REG_CRC_CCK);
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dm_info->cck_ok_cnt = FIELD_GET(GENMASK(15, 0), crc32_cnt);
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dm_info->cck_err_cnt = FIELD_GET(GENMASK(31, 16), crc32_cnt);
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crc32_cnt = rtw_read32(rtwdev, REG_CRC_OFDM);
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dm_info->ofdm_ok_cnt = FIELD_GET(GENMASK(15, 0), crc32_cnt);
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dm_info->ofdm_err_cnt = FIELD_GET(GENMASK(31, 16), crc32_cnt);
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crc32_cnt = rtw_read32(rtwdev, REG_CRC_HT);
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dm_info->ht_ok_cnt = FIELD_GET(GENMASK(15, 0), crc32_cnt);
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dm_info->ht_err_cnt = FIELD_GET(GENMASK(31, 16), crc32_cnt);
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crc32_cnt = rtw_read32(rtwdev, REG_CRC_VHT);
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dm_info->vht_ok_cnt = FIELD_GET(GENMASK(15, 0), crc32_cnt);
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dm_info->vht_err_cnt = FIELD_GET(GENMASK(31, 16), crc32_cnt);
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cca32_cnt = rtw_read32(rtwdev, REG_CCA_OFDM);
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dm_info->ofdm_cca_cnt = FIELD_GET(GENMASK(31, 16), cca32_cnt);
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dm_info->total_cca_cnt = dm_info->ofdm_cca_cnt;
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if (cck_enable) {
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cca32_cnt = rtw_read32(rtwdev, REG_CCA_CCK);
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dm_info->cck_cca_cnt = FIELD_GET(GENMASK(15, 0), cca32_cnt);
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dm_info->total_cca_cnt += dm_info->cck_cca_cnt;
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}
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rtw_write32_set(rtwdev, REG_FAS, BIT(17));
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rtw_write32_clr(rtwdev, REG_FAS, BIT(17));
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rtw_write32_clr(rtwdev, REG_RXDESC, BIT(15));
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rtw_write32_set(rtwdev, REG_RXDESC, BIT(15));
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rtw_write32_set(rtwdev, REG_CNTRST, BIT(0));
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rtw_write32_clr(rtwdev, REG_CNTRST, BIT(0));
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}
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static struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8821c[] = {
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{0x0086,
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RTW_PWR_CUT_ALL_MSK,
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@ -948,6 +1000,7 @@ static struct rtw_chip_ops rtw8821c_ops = {
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.set_antenna = NULL,
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.set_tx_power_index = rtw8821c_set_tx_power_index,
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.cfg_ldo25 = rtw8821c_cfg_ldo25,
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.false_alarm_statistics = rtw8821c_false_alarm_statistics,
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};
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struct rtw_chip_info rtw8821c_hw_spec = {
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@ -183,13 +183,16 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data)
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#define REG_ACBB0 0x948
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#define REG_ACBBRXFIR 0x94c
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#define REG_ACGG2TBL 0x958
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#define REG_FAS 0x9a4
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#define REG_RXSB 0xa00
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#define REG_ADCINI 0xa04
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#define REG_TXSF2 0xa24
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#define REG_TXSF6 0xa28
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#define REG_FA_CCK 0xa5c
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#define REG_RXDESC 0xa2c
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#define REG_ENTXCCK 0xa80
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#define REG_TXFILTER 0xaac
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#define REG_CNTRST 0xb58
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#define REG_AGCTR_A 0xc08
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#define REG_TXSCALE_A 0xc1c
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#define REG_TXDFIR 0xc20
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@ -201,6 +204,13 @@ _rtw_write32s_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data)
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#define REG_RFEINV 0xcbc
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#define REG_AGCTR_B 0xe08
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#define REG_RXIGI_B 0xe50
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#define REG_CRC_CCK 0xf04
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#define REG_CRC_OFDM 0xf14
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#define REG_CRC_HT 0xf10
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#define REG_CRC_VHT 0xf0c
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#define REG_CCA_OFDM 0xf08
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#define REG_FA_OFDM 0xf48
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#define REG_CCA_CCK 0xfcc
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#define REG_ANTWT 0x1904
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#define REG_IQKFAILMSK 0x1bf0
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