ASoC: da7210: Add 11025/22050/44100/88200 rate support
This driver USE PLL for 11025/22050/44100/88200 rate. To enable switching to bypass mode, PLL is always turned on. Special thanks to Phil Signed-off-by: Phil Edworthy <Phil.Edworthy@renesas.com> Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Kuninori Morimoto
Mark Brown
Родитель
9c9b125736
Коммит
960b3b4b4c
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@ -55,8 +55,14 @@
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#define DA7210_DAI_SRC_SEL 0x25
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#define DA7210_DAI_CFG1 0x26
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#define DA7210_DAI_CFG3 0x28
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#define DA7210_PLL_DIV1 0x29
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#define DA7210_PLL_DIV2 0x2A
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#define DA7210_PLL_DIV3 0x2B
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#define DA7210_PLL 0x2C
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#define DA7210_A_HID_UNLOCK 0x8A
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#define DA7210_A_TEST_UNLOCK 0x8B
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#define DA7210_A_PLL1 0x90
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#define DA7210_A_CP_MODE 0xA7
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/* STARTUP1 bit fields */
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#define DA7210_SC_MST_EN (1 << 0)
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@ -124,13 +130,17 @@
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/* PLL bit fields */
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#define DA7210_PLL_FS_MASK (0xF << 0)
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#define DA7210_PLL_FS_8000 (0x1 << 0)
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#define DA7210_PLL_FS_11025 (0x2 << 0)
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#define DA7210_PLL_FS_12000 (0x3 << 0)
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#define DA7210_PLL_FS_16000 (0x5 << 0)
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#define DA7210_PLL_FS_22050 (0x6 << 0)
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#define DA7210_PLL_FS_24000 (0x7 << 0)
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#define DA7210_PLL_FS_32000 (0x9 << 0)
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#define DA7210_PLL_FS_44100 (0xA << 0)
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#define DA7210_PLL_FS_48000 (0xB << 0)
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#define DA7210_PLL_FS_88200 (0xE << 0)
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#define DA7210_PLL_FS_96000 (0xF << 0)
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#define DA7210_PLL_EN (0x1 << 7)
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#define DA7210_VERSION "0.0.1"
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@ -249,7 +259,7 @@ static int da7210_hw_params(struct snd_pcm_substream *substream,
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struct snd_soc_codec *codec = socdev->card->codec;
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u32 dai_cfg1;
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u32 hpf_reg, hpf_mask, hpf_value;
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u32 fs;
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u32 fs, bypass;
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/* set DAI source to Left and Right ADC */
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da7210_write(codec, DA7210_DAI_SRC_SEL,
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@ -281,38 +291,76 @@ static int da7210_hw_params(struct snd_pcm_substream *substream,
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fs = DA7210_PLL_FS_8000;
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hpf_mask = DA7210_VOICE_F0_MASK | DA7210_VOICE_EN;
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hpf_value = DA7210_VOICE_F0_25 | DA7210_VOICE_EN;
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bypass = DA7210_PLL_BYP;
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break;
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case 11025:
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fs = DA7210_PLL_FS_11025;
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hpf_mask = DA7210_VOICE_F0_MASK | DA7210_VOICE_EN;
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hpf_value = DA7210_VOICE_F0_25 | DA7210_VOICE_EN;
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bypass = 0;
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break;
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case 12000:
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fs = DA7210_PLL_FS_12000;
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hpf_mask = DA7210_VOICE_F0_MASK | DA7210_VOICE_EN;
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hpf_value = DA7210_VOICE_F0_25 | DA7210_VOICE_EN;
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bypass = DA7210_PLL_BYP;
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break;
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case 16000:
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fs = DA7210_PLL_FS_16000;
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hpf_mask = DA7210_VOICE_F0_MASK | DA7210_VOICE_EN;
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hpf_value = DA7210_VOICE_F0_25 | DA7210_VOICE_EN;
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bypass = DA7210_PLL_BYP;
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break;
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case 22050:
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fs = DA7210_PLL_FS_22050;
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hpf_mask = DA7210_VOICE_EN;
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hpf_value = 0;
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bypass = 0;
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break;
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case 32000:
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fs = DA7210_PLL_FS_32000;
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hpf_mask = DA7210_VOICE_EN;
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hpf_value = 0;
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bypass = DA7210_PLL_BYP;
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break;
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case 44100:
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fs = DA7210_PLL_FS_44100;
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hpf_mask = DA7210_VOICE_EN;
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hpf_value = 0;
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bypass = 0;
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break;
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case 48000:
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fs = DA7210_PLL_FS_48000;
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hpf_mask = DA7210_VOICE_EN;
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hpf_value = 0;
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bypass = DA7210_PLL_BYP;
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break;
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case 88200:
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fs = DA7210_PLL_FS_88200;
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hpf_mask = DA7210_VOICE_EN;
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hpf_value = 0;
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bypass = 0;
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break;
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case 96000:
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fs = DA7210_PLL_FS_96000;
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hpf_mask = DA7210_VOICE_EN;
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hpf_value = 0;
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bypass = DA7210_PLL_BYP;
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break;
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default:
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return -EINVAL;
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}
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/* Disable active mode */
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snd_soc_update_bits(codec, DA7210_STARTUP1, DA7210_SC_MST_EN, 0);
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snd_soc_update_bits(codec, hpf_reg, hpf_mask, hpf_value);
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snd_soc_update_bits(codec, DA7210_PLL, DA7210_PLL_FS_MASK, fs);
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snd_soc_update_bits(codec, DA7210_PLL_DIV3, DA7210_PLL_BYP, bypass);
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/* Enable active mode */
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snd_soc_update_bits(codec, DA7210_STARTUP1,
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DA7210_SC_MST_EN, DA7210_SC_MST_EN);
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return 0;
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}
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@ -390,6 +438,7 @@ struct snd_soc_dai da7210_dai = {
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.formats = DA7210_FORMATS,
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},
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.ops = &da7210_dai_ops,
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.symmetric_rates = 1,
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};
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EXPORT_SYMBOL_GPL(da7210_dai);
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@ -444,8 +493,22 @@ static int da7210_init(struct da7210_priv *da7210)
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/* FIXME
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*
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* This driver use fixed value here
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* And below settings expects MCLK = 12.288MHz
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*
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* When you select different MCLK, please check...
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* DA7210_PLL_DIV1 val
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* DA7210_PLL_DIV2 val
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* DA7210_PLL_DIV3 val
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* DA7210_PLL_DIV3 :: DA7210_MCLK_RANGExxx
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*/
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/*
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* make sure that DA7210 use bypass mode before start up
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*/
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da7210_write(codec, DA7210_STARTUP1, 0);
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da7210_write(codec, DA7210_PLL_DIV3,
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DA7210_MCLK_RANGE_10_20_MHZ | DA7210_PLL_BYP);
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/*
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* ADC settings
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*/
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@ -482,9 +545,28 @@ static int da7210_init(struct da7210_priv *da7210)
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/* Diable PLL and bypass it */
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da7210_write(codec, DA7210_PLL, DA7210_PLL_FS_48000);
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/* Bypass PLL and set MCLK freq rang to 10-20MHz */
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da7210_write(codec, DA7210_PLL_DIV3,
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/*
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* If 48kHz sound came, it use bypass mode,
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* and when it is 44.1kHz, it use PLL.
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*
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* This time, this driver sets PLL always ON
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* and controls bypass/PLL mode by switching
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* DA7210_PLL_DIV3 :: DA7210_PLL_BYP bit.
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* see da7210_hw_params
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*/
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da7210_write(codec, DA7210_PLL_DIV1, 0xE5); /* MCLK = 12.288MHz */
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da7210_write(codec, DA7210_PLL_DIV2, 0x99);
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da7210_write(codec, DA7210_PLL_DIV3, 0x0A |
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DA7210_MCLK_RANGE_10_20_MHZ | DA7210_PLL_BYP);
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snd_soc_update_bits(codec, DA7210_PLL, DA7210_PLL_EN, DA7210_PLL_EN);
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/* As suggested by Dialog */
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da7210_write(codec, DA7210_A_HID_UNLOCK, 0x8B); /* unlock */
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da7210_write(codec, DA7210_A_TEST_UNLOCK, 0xB4);
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da7210_write(codec, DA7210_A_PLL1, 0x01);
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da7210_write(codec, DA7210_A_CP_MODE, 0x7C);
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da7210_write(codec, DA7210_A_HID_UNLOCK, 0x00); /* re-lock */
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da7210_write(codec, DA7210_A_TEST_UNLOCK, 0x00);
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/* Activate all enabled subsystem */
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da7210_write(codec, DA7210_STARTUP1, DA7210_SC_MST_EN);
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