watchdog: w83627hf: Auto-detect IO address and supported chips
Instead of requiring the user to provide an IO address per module parameter, auto-detect it as well as supported chips. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Guenter Roeck
Wim Van Sebroeck
Родитель
f72fa00f8a
Коммит
962c04f54e
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@ -892,13 +892,20 @@ config VIA_WDT
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Most people will say N.
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config W83627HF_WDT
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tristate "W83627HF/W83627DHG Watchdog Timer"
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tristate "Watchdog timer for W83627HF/W83627DHG and compatibles"
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depends on X86
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select WATCHDOG_CORE
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---help---
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This is the driver for the hardware watchdog on the W83627HF chipset
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as used in Advantech PC-9578 and Tyan S2721-533 motherboards
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(and likely others). The driver also supports the W83627DHG chip.
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This is the driver for the hardware watchdog on the following
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Super I/O chips.
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W83627DHG/DHG-P/EHF/EHG/F/G/HF/S/SF/THF/UHG/UG
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W83637HF
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W83667HG/HG-B
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W83687THF
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NCT6775
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NCT6776
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NCT6779
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This watchdog simply watches your kernel to make sure it doesn't
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freeze, and if it does, it reboots your computer after a certain
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amount of time.
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@ -44,10 +44,11 @@
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#define WATCHDOG_NAME "w83627hf/thf/hg/dhg WDT"
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#define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */
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/* You must set this - there is no sane way to probe for this board. */
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static int wdt_io = 0x2E;
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module_param(wdt_io, int, 0);
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MODULE_PARM_DESC(wdt_io, "w83627hf/thf WDT io port (default 0x2E)");
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static int wdt_io;
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enum chips { w83627hf, w83627s, w83637hf, w83627thf, w83687thf,
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w83627ehf, w83627dhg, w83627uhg, w83667hg, w83627dhg_p, w83667hg_b,
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nct6775, nct6776, nct6779 };
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static int timeout; /* in seconds */
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module_param(timeout, int, 0);
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@ -72,6 +73,21 @@ MODULE_PARM_DESC(nowayout,
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#define W83627HF_LD_WDT 0x08
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#define W83627HF_ID 0x52
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#define W83627S_ID 0x59
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#define W83637HF_ID 0x70
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#define W83627THF_ID 0x82
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#define W83687THF_ID 0x85
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#define W83627EHF_ID 0x88
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#define W83627DHG_ID 0xa0
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#define W83627UHG_ID 0xa2
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#define W83667HG_ID 0xa5
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#define W83627DHG_P_ID 0xb0
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#define W83667HG_B_ID 0xb3
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#define NCT6775_ID 0xb4
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#define NCT6776_ID 0xc3
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#define NCT6779_ID 0xc5
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static void superio_outb(int reg, int val)
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{
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outb(reg, WDT_EFER);
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@ -106,10 +122,7 @@ static void superio_exit(void)
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release_region(wdt_io, 2);
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}
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/* tyan motherboards seem to set F5 to 0x4C ?
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* So explicitly init to appropriate value. */
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static int w83627hf_init(struct watchdog_device *wdog)
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static int w83627hf_init(struct watchdog_device *wdog, enum chips chip)
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{
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int ret;
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unsigned char t;
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@ -119,20 +132,59 @@ static int w83627hf_init(struct watchdog_device *wdog)
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return ret;
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superio_select(W83627HF_LD_WDT);
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t = superio_inb(0x20); /* check chip version */
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if (t == 0x82) { /* W83627THF */
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t = (superio_inb(0x2b) & 0xf7);
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superio_outb(0x2b, t | 0x04); /* set GPIO3 to WDT0 */
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} else if (t == 0x88 || t == 0xa0) { /* W83627EHF / W83627DHG */
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t = superio_inb(0x2d);
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superio_outb(0x2d, t & ~0x01); /* set GPIO5 to WDT0 */
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}
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/* set CR30 bit 0 to activate GPIO2 */
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t = superio_inb(0x30);
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if (!(t & 0x01))
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superio_outb(0x30, t | 0x01);
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switch (chip) {
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case w83627hf:
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case w83627s:
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t = superio_inb(0x2B) & ~0x10;
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superio_outb(0x2B, t); /* set GPIO24 to WDT0 */
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break;
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case w83627thf:
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t = (superio_inb(0x2B) & ~0x08) | 0x04;
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superio_outb(0x2B, t); /* set GPIO3 to WDT0 */
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break;
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case w83627dhg:
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case w83627dhg_p:
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t = superio_inb(0x2D) & ~0x01; /* PIN77 -> WDT0# */
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superio_outb(0x2D, t); /* set GPIO5 to WDT0 */
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t = superio_inb(0xF5);
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t |= 0x02; /* enable the WDTO# output low pulse
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* to the KBRST# pin */
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superio_outb(0xF5, t);
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break;
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case w83637hf:
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break;
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case w83687thf:
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t = superio_inb(0x2C) & ~0x80; /* PIN47 -> WDT0# */
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superio_outb(0x2C, t);
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break;
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case w83627ehf:
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case w83627uhg:
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case w83667hg:
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case w83667hg_b:
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case nct6775:
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case nct6776:
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case nct6779:
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/*
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* These chips have a fixed WDTO# output pin (W83627UHG),
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* or support more than one WDTO# output pin.
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* Don't touch its configuration, and hope the BIOS
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* does the right thing.
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*/
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t = superio_inb(0xF5);
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t |= 0x02; /* enable the WDTO# output low pulse
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* to the KBRST# pin */
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superio_outb(0xF5, t);
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break;
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default:
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break;
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}
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t = superio_inb(0xF6);
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if (t != 0) {
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pr_info("Watchdog already running. Resetting timeout to %d sec\n",
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@ -142,8 +194,6 @@ static int w83627hf_init(struct watchdog_device *wdog)
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/* set second mode & disable keyboard turning off watchdog */
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t = superio_inb(0xF5) & ~0x0C;
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/* enable the WDTO# output low pulse to the KBRST# pin */
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t |= 0x02;
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superio_outb(0xF5, t);
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/* disable keyboard & mouse turning off watchdog */
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@ -249,16 +299,108 @@ static struct notifier_block wdt_notifier = {
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.notifier_call = wdt_notify_sys,
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};
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static int wdt_find(int addr)
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{
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u8 val;
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int ret;
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ret = superio_enter();
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if (ret)
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return ret;
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superio_select(W83627HF_LD_WDT);
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val = superio_inb(0x20);
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switch (val) {
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case W83627HF_ID:
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ret = w83627hf;
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break;
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case W83627S_ID:
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ret = w83627s;
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break;
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case W83637HF_ID:
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ret = w83637hf;
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break;
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case W83627THF_ID:
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ret = w83627thf;
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break;
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case W83687THF_ID:
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ret = w83687thf;
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break;
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case W83627EHF_ID:
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ret = w83627ehf;
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break;
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case W83627DHG_ID:
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ret = w83627dhg;
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break;
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case W83627DHG_P_ID:
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ret = w83627dhg_p;
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break;
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case W83627UHG_ID:
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ret = w83627uhg;
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break;
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case W83667HG_ID:
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ret = w83667hg;
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break;
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case W83667HG_B_ID:
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ret = w83667hg_b;
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break;
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case NCT6775_ID:
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ret = nct6775;
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break;
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case NCT6776_ID:
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ret = nct6776;
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break;
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case NCT6779_ID:
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ret = nct6779;
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break;
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case 0xff:
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ret = -ENODEV;
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break;
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default:
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ret = -ENODEV;
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pr_err("Unsupported chip ID: 0x%02x\n", val);
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break;
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}
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superio_exit();
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return ret;
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}
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static int __init wdt_init(void)
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{
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int ret;
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int chip;
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const char * const chip_name[] = {
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"W83627HF",
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"W83627S",
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"W83637HF",
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"W83627THF",
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"W83687THF",
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"W83627EHF",
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"W83627DHG",
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"W83627UHG",
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"W83667HG",
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"W83667DHG-P",
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"W83667HG-B",
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"NCT6775",
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"NCT6776",
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"NCT6779",
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};
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pr_info("WDT driver for the Winbond(TM) W83627HF/THF/HG/DHG Super I/O chip initialising\n");
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wdt_io = 0x2e;
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chip = wdt_find(0x2e);
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if (chip < 0) {
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wdt_io = 0x4e;
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chip = wdt_find(0x4e);
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if (chip < 0)
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return chip;
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}
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pr_info("WDT driver for %s Super I/O chip initialising\n",
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chip_name[chip]);
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watchdog_init_timeout(&wdt_dev, timeout, NULL);
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watchdog_set_nowayout(&wdt_dev, nowayout);
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ret = w83627hf_init(&wdt_dev);
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ret = w83627hf_init(&wdt_dev, chip);
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if (ret) {
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pr_err("failed to initialize watchdog (err=%d)\n", ret);
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return ret;
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