MN10300: SMP TLB flushing
Implement global TLB flushing for MN10300. This will be used by the AM34 which is SMP capable. Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com> Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com> Signed-off-by: David Howells <dhowells@redhat.com>
This commit is contained in:
Akira Takeuchi
David Howells
Родитель
dccbf4853a
Коммит
965ea4bbb9
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@ -36,6 +36,22 @@
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#define enter_lazy_tlb(mm, tsk) do {} while (0)
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static inline void cpu_ran_vm(int cpu, struct mm_struct *mm)
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{
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#ifdef CONFIG_SMP
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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#endif
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}
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static inline bool cpu_maybe_ran_vm(int cpu, struct mm_struct *mm)
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{
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#ifdef CONFIG_SMP
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return cpumask_test_and_set_cpu(cpu, mm_cpumask(mm));
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#else
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return true;
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#endif
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}
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#ifdef CONFIG_MN10300_TLB_USE_PIDR
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extern unsigned long mmu_context_cache[NR_CPUS];
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#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
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@ -127,7 +143,13 @@ static inline void activate_context(struct mm_struct *mm)
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (prev != next) {
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#ifdef CONFIG_SMP
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per_cpu(cpu_tlbstate, cpu).active_mm = next;
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#endif
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cpu_ran_vm(cpu, next);
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PTBR = (unsigned long) next->pgd;
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activate_context(next);
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}
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@ -11,6 +11,7 @@
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#ifndef _ASM_TLBFLUSH_H
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#define _ASM_TLBFLUSH_H
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#include <linux/mm.h>
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#include <asm/processor.h>
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struct tlb_state {
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@ -93,39 +94,61 @@ void local_flush_tlb_page(struct mm_struct *mm, unsigned long addr)
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* - flush_tlb_range(mm, start, end) flushes a range of pages
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* - flush_tlb_pgtables(mm, start, end) flushes a range of page tables
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*/
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#define flush_tlb_all() \
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do { \
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preempt_disable(); \
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local_flush_tlb_all(); \
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preempt_enable(); \
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} while (0)
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#ifdef CONFIG_SMP
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#define flush_tlb_mm(mm) \
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do { \
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preempt_disable(); \
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local_flush_tlb_all(); \
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preempt_enable(); \
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} while (0)
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#include <asm/smp.h>
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#define flush_tlb_range(vma, start, end) \
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do { \
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unsigned long __s __attribute__((unused)) = (start); \
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unsigned long __e __attribute__((unused)) = (end); \
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preempt_disable(); \
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local_flush_tlb_all(); \
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preempt_enable(); \
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} while (0)
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extern void flush_tlb_all(void);
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extern void flush_tlb_current_task(void);
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extern void flush_tlb_mm(struct mm_struct *);
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extern void flush_tlb_page(struct vm_area_struct *, unsigned long);
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#define flush_tlb() flush_tlb_current_task()
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static inline void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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flush_tlb_mm(vma->vm_mm);
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}
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#else /* CONFIG_SMP */
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static inline void flush_tlb_all(void)
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{
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preempt_disable();
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local_flush_tlb_all();
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preempt_enable();
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}
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static inline void flush_tlb_mm(struct mm_struct *mm)
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{
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preempt_disable();
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local_flush_tlb_all();
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preempt_enable();
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}
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static inline void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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preempt_disable();
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local_flush_tlb_all();
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preempt_enable();
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}
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#define flush_tlb_page(vma, addr) local_flush_tlb_page((vma)->vm_mm, addr)
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#define flush_tlb() flush_tlb_all()
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#define flush_tlb_kernel_range(start, end) \
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do { \
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unsigned long __s __attribute__((unused)) = (start); \
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unsigned long __e __attribute__((unused)) = (end); \
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flush_tlb_all(); \
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} while (0)
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#endif /* CONFIG_SMP */
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#define flush_tlb_pgtables(mm, start, end) do {} while (0)
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static inline void flush_tlb_kernel_range(unsigned long start,
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unsigned long end)
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{
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flush_tlb_all();
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}
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static inline void flush_tlb_pgtables(struct mm_struct *mm,
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unsigned long start, unsigned long end)
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{
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}
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#endif /* _ASM_TLBFLUSH_H */
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@ -18,3 +18,5 @@ cacheflush-$(CONFIG_MN10300_CACHE_DISABLED) := cache-disabled.o
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obj-y := \
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init.o fault.o pgtable.o extable.o tlb-mn10300.o mmu-context.o \
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misalignment.o dma-alloc.o $(cacheflush-y)
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obj-$(CONFIG_SMP) += tlb-smp.o
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@ -0,0 +1,214 @@
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/* SMP TLB support routines.
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*
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* Copyright (C) 2006-2008 Panasonic Corporation
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* All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/init.h>
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#include <linux/jiffies.h>
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#include <linux/cpumask.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/profile.h>
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#include <linux/smp.h>
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#include <asm/tlbflush.h>
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#include <asm/system.h>
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#include <asm/bitops.h>
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#include <asm/processor.h>
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#include <asm/bug.h>
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#include <asm/exceptions.h>
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#include <asm/hardirq.h>
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#include <asm/fpu.h>
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#include <asm/mmu_context.h>
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#include <asm/thread_info.h>
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#include <asm/cpu-regs.h>
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#include <asm/intctl-regs.h>
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/*
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* For flush TLB
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*/
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#define FLUSH_ALL 0xffffffff
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static cpumask_t flush_cpumask;
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static struct mm_struct *flush_mm;
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static unsigned long flush_va;
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static DEFINE_SPINLOCK(tlbstate_lock);
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DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
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&init_mm, 0
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};
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static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
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unsigned long va);
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static void do_flush_tlb_all(void *info);
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/**
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* smp_flush_tlb - Callback to invalidate the TLB.
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* @unused: Callback context (ignored).
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*/
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void smp_flush_tlb(void *unused)
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{
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unsigned long cpu_id;
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cpu_id = get_cpu();
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if (!cpu_isset(cpu_id, flush_cpumask))
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/* This was a BUG() but until someone can quote me the line
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* from the intel manual that guarantees an IPI to multiple
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* CPUs is retried _only_ on the erroring CPUs its staying as a
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* return
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*
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* BUG();
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*/
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goto out;
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if (flush_va == FLUSH_ALL)
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local_flush_tlb();
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else
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local_flush_tlb_page(flush_mm, flush_va);
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smp_mb__before_clear_bit();
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cpu_clear(cpu_id, flush_cpumask);
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smp_mb__after_clear_bit();
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out:
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put_cpu();
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}
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/**
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* flush_tlb_others - Tell the specified CPUs to invalidate their TLBs
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* @cpumask: The list of CPUs to target.
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* @mm: The VM context to flush from (if va!=FLUSH_ALL).
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* @va: Virtual address to flush or FLUSH_ALL to flush everything.
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*/
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static void flush_tlb_others(cpumask_t cpumask, struct mm_struct *mm,
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unsigned long va)
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{
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cpumask_t tmp;
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/* A couple of sanity checks (to be removed):
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* - mask must not be empty
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* - current CPU must not be in mask
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* - we do not send IPIs to as-yet unbooted CPUs.
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*/
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BUG_ON(!mm);
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BUG_ON(cpus_empty(cpumask));
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BUG_ON(cpu_isset(smp_processor_id(), cpumask));
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cpus_and(tmp, cpumask, cpu_online_map);
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BUG_ON(!cpus_equal(cpumask, tmp));
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/* I'm not happy about this global shared spinlock in the MM hot path,
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* but we'll see how contended it is.
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*
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* Temporarily this turns IRQs off, so that lockups are detected by the
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* NMI watchdog.
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*/
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spin_lock(&tlbstate_lock);
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flush_mm = mm;
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flush_va = va;
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#if NR_CPUS <= BITS_PER_LONG
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atomic_set_mask(cpumask.bits[0], &flush_cpumask.bits[0]);
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#else
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#error Not supported.
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#endif
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/* FIXME: if NR_CPUS>=3, change send_IPI_mask */
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smp_call_function(smp_flush_tlb, NULL, 1);
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while (!cpus_empty(flush_cpumask))
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/* Lockup detection does not belong here */
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smp_mb();
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flush_mm = NULL;
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flush_va = 0;
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spin_unlock(&tlbstate_lock);
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}
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/**
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* flush_tlb_mm - Invalidate TLB of specified VM context
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* @mm: The VM context to invalidate.
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*/
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void flush_tlb_mm(struct mm_struct *mm)
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{
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cpumask_t cpu_mask;
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preempt_disable();
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cpu_mask = mm->cpu_vm_mask;
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cpu_clear(smp_processor_id(), cpu_mask);
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local_flush_tlb();
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if (!cpus_empty(cpu_mask))
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flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
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preempt_enable();
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}
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/**
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* flush_tlb_current_task - Invalidate TLB of current task
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*/
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void flush_tlb_current_task(void)
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{
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struct mm_struct *mm = current->mm;
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cpumask_t cpu_mask;
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preempt_disable();
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cpu_mask = mm->cpu_vm_mask;
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cpu_clear(smp_processor_id(), cpu_mask);
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local_flush_tlb();
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if (!cpus_empty(cpu_mask))
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flush_tlb_others(cpu_mask, mm, FLUSH_ALL);
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preempt_enable();
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}
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/**
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* flush_tlb_page - Invalidate TLB of page
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* @vma: The VM context to invalidate the page for.
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* @va: The virtual address of the page to invalidate.
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*/
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long va)
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{
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struct mm_struct *mm = vma->vm_mm;
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cpumask_t cpu_mask;
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preempt_disable();
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cpu_mask = mm->cpu_vm_mask;
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cpu_clear(smp_processor_id(), cpu_mask);
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local_flush_tlb_page(mm, va);
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if (!cpus_empty(cpu_mask))
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flush_tlb_others(cpu_mask, mm, va);
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preempt_enable();
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}
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/**
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* do_flush_tlb_all - Callback to completely invalidate a TLB
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* @unused: Callback context (ignored).
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*/
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static void do_flush_tlb_all(void *unused)
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{
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local_flush_tlb_all();
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}
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/**
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* flush_tlb_all - Completely invalidate TLBs on all CPUs
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*/
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void flush_tlb_all(void)
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{
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on_each_cpu(do_flush_tlb_all, 0, 1);
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}
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