MIPS: dts: Change upper case to lower case
All the upper case in unit-address and hex constants are changed to lower case according to the DT conventions. Signed-off-by: Songjun Wu <songjun.wu@linux.intel.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Reviewed-by: Rob Herring <robh@kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/20768/ Cc: yixin.zhu@linux.intel.com Cc: chuanhua.lei@linux.intel.com Cc: hauke.mehrtens@intel.com Cc: devicetree@vger.kernel.org Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Philippe Ombredanne <pombredanne@nexb.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Kate Stewart <kstewart@linuxfoundation.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ralf Baechle <ralf@linux-mips.org>
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@ -10,12 +10,12 @@
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};
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};
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biu@1F800000 {
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biu@1f800000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,biu", "simple-bus";
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reg = <0x1F800000 0x800000>;
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ranges = <0x0 0x1F800000 0x7FFFFF>;
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reg = <0x1f800000 0x800000>;
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ranges = <0x0 0x1f800000 0x7fffff>;
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icu0: icu@80200 {
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#interrupt-cells = <1>;
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@ -24,18 +24,18 @@
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reg = <0x80200 0x120>;
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};
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watchdog@803F0 {
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watchdog@803f0 {
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compatible = "lantiq,wdt";
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reg = <0x803F0 0x10>;
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reg = <0x803f0 0x10>;
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};
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};
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sram@1F000000 {
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sram@1f000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,sram";
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reg = <0x1F000000 0x800000>;
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ranges = <0x0 0x1F000000 0x7FFFFF>;
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reg = <0x1f000000 0x800000>;
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ranges = <0x0 0x1f000000 0x7fffff>;
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eiu0: eiu@101000 {
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#interrupt-cells = <1>;
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@ -66,41 +66,41 @@
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,fpi", "simple-bus";
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ranges = <0x0 0x10000000 0xEEFFFFF>;
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reg = <0x10000000 0xEF00000>;
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ranges = <0x0 0x10000000 0xeefffff>;
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reg = <0x10000000 0xef00000>;
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gptu@E100A00 {
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gptu@e100a00 {
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compatible = "lantiq,gptu-xway";
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reg = <0xE100A00 0x100>;
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reg = <0xe100a00 0x100>;
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};
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serial@E100C00 {
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serial@e100c00 {
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compatible = "lantiq,asc";
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reg = <0xE100C00 0x400>;
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reg = <0xe100c00 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <112 113 114>;
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};
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dma0: dma@E104100 {
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dma0: dma@e104100 {
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compatible = "lantiq,dma-xway";
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reg = <0xE104100 0x800>;
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reg = <0xe104100 0x800>;
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};
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ebu0: ebu@E105300 {
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ebu0: ebu@e105300 {
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compatible = "lantiq,ebu-xway";
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reg = <0xE105300 0x100>;
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reg = <0xe105300 0x100>;
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};
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pci0: pci@E105400 {
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pci0: pci@e105400 {
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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compatible = "lantiq,pci-xway";
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bus-range = <0x0 0x0>;
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ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
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0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
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0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
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reg = <0x7000000 0x8000 /* config space */
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0xE105400 0x400>; /* pci bridge */
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0xe105400 0x400>; /* pci bridge */
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};
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};
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};
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@ -52,14 +52,14 @@
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};
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};
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gpio: pinmux@E100B10 {
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gpio: pinmux@e100b10 {
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compatible = "lantiq,danube-pinctrl";
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0xE100B10 0xA0>;
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reg = <0xe100b10 0xa0>;
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state_default: pinmux {
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stp {
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@ -82,26 +82,26 @@
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};
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};
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etop@E180000 {
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etop@e180000 {
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compatible = "lantiq,etop-xway";
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reg = <0xE180000 0x40000>;
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reg = <0xe180000 0x40000>;
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interrupt-parent = <&icu0>;
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interrupts = <73 78>;
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phy-mode = "rmii";
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mac-address = [ 00 11 22 33 44 55 ];
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};
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stp0: stp@E100BB0 {
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stp0: stp@e100bb0 {
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#gpio-cells = <2>;
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compatible = "lantiq,gpio-stp-xway";
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gpio-controller;
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reg = <0xE100BB0 0x40>;
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reg = <0xe100bb0 0x40>;
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lantiq,shadow = <0xfff>;
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lantiq,groups = <0x3>;
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};
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pci@E105400 {
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pci@e105400 {
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lantiq,bus-clock = <33333333>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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interrupt-map = <
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