Merge back cpufreq material for v4.18.
This commit is contained in:
Коммит
966071137c
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@ -23,6 +23,8 @@
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include "cpufreq-dt.h"
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/* Power management in North Bridge register set */
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#define ARMADA_37XX_NB_L0L1 0x18
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#define ARMADA_37XX_NB_L2L3 0x1C
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@ -56,6 +58,16 @@
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*/
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#define LOAD_LEVEL_NR 4
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struct armada37xx_cpufreq_state {
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struct regmap *regmap;
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u32 nb_l0l1;
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u32 nb_l2l3;
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u32 nb_dyn_mod;
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u32 nb_cpu_load;
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};
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static struct armada37xx_cpufreq_state *armada37xx_cpufreq_state;
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struct armada_37xx_dvfs {
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u32 cpu_freq_max;
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u8 divider[LOAD_LEVEL_NR];
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@ -136,7 +148,7 @@ static void __init armada37xx_cpufreq_dvfs_setup(struct regmap *base,
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clk_set_parent(clk, parent);
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}
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static void __init armada37xx_cpufreq_disable_dvfs(struct regmap *base)
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static void armada37xx_cpufreq_disable_dvfs(struct regmap *base)
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{
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unsigned int reg = ARMADA_37XX_NB_DYN_MOD,
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mask = ARMADA_37XX_NB_DFS_EN;
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@ -162,10 +174,47 @@ static void __init armada37xx_cpufreq_enable_dvfs(struct regmap *base)
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regmap_update_bits(base, reg, mask, mask);
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}
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static int armada37xx_cpufreq_suspend(struct cpufreq_policy *policy)
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{
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struct armada37xx_cpufreq_state *state = armada37xx_cpufreq_state;
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regmap_read(state->regmap, ARMADA_37XX_NB_L0L1, &state->nb_l0l1);
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regmap_read(state->regmap, ARMADA_37XX_NB_L2L3, &state->nb_l2l3);
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regmap_read(state->regmap, ARMADA_37XX_NB_CPU_LOAD,
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&state->nb_cpu_load);
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regmap_read(state->regmap, ARMADA_37XX_NB_DYN_MOD, &state->nb_dyn_mod);
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return 0;
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}
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static int armada37xx_cpufreq_resume(struct cpufreq_policy *policy)
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{
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struct armada37xx_cpufreq_state *state = armada37xx_cpufreq_state;
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/* Ensure DVFS is disabled otherwise the following registers are RO */
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armada37xx_cpufreq_disable_dvfs(state->regmap);
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regmap_write(state->regmap, ARMADA_37XX_NB_L0L1, state->nb_l0l1);
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regmap_write(state->regmap, ARMADA_37XX_NB_L2L3, state->nb_l2l3);
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regmap_write(state->regmap, ARMADA_37XX_NB_CPU_LOAD,
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state->nb_cpu_load);
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/*
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* NB_DYN_MOD register is the one that actually enable back DVFS if it
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* was enabled before the suspend operation. This must be done last
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* otherwise other registers are not writable.
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*/
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regmap_write(state->regmap, ARMADA_37XX_NB_DYN_MOD, state->nb_dyn_mod);
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return 0;
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}
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static int __init armada37xx_cpufreq_driver_init(void)
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{
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struct cpufreq_dt_platform_data pdata;
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struct armada_37xx_dvfs *dvfs;
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struct platform_device *pdev;
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unsigned long freq;
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unsigned int cur_frequency;
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struct regmap *nb_pm_base;
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struct device *cpu_dev;
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@ -207,33 +256,58 @@ static int __init armada37xx_cpufreq_driver_init(void)
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}
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dvfs = armada_37xx_cpu_freq_info_get(cur_frequency);
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if (!dvfs)
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if (!dvfs) {
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clk_put(clk);
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return -EINVAL;
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}
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armada37xx_cpufreq_state = kmalloc(sizeof(*armada37xx_cpufreq_state),
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GFP_KERNEL);
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if (!armada37xx_cpufreq_state) {
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clk_put(clk);
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return -ENOMEM;
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}
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armada37xx_cpufreq_state->regmap = nb_pm_base;
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armada37xx_cpufreq_dvfs_setup(nb_pm_base, clk, dvfs->divider);
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clk_put(clk);
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for (load_lvl = ARMADA_37XX_DVFS_LOAD_0; load_lvl < LOAD_LEVEL_NR;
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load_lvl++) {
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unsigned long freq = cur_frequency / dvfs->divider[load_lvl];
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freq = cur_frequency / dvfs->divider[load_lvl];
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ret = dev_pm_opp_add(cpu_dev, freq, 0);
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if (ret) {
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/* clean-up the already added opp before leaving */
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while (load_lvl-- > ARMADA_37XX_DVFS_LOAD_0) {
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freq = cur_frequency / dvfs->divider[load_lvl];
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dev_pm_opp_remove(cpu_dev, freq);
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}
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return ret;
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}
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if (ret)
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goto remove_opp;
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}
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/* Now that everything is setup, enable the DVFS at hardware level */
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armada37xx_cpufreq_enable_dvfs(nb_pm_base);
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pdev = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
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pdata.suspend = armada37xx_cpufreq_suspend;
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pdata.resume = armada37xx_cpufreq_resume;
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return PTR_ERR_OR_ZERO(pdev);
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pdev = platform_device_register_data(NULL, "cpufreq-dt", -1, &pdata,
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sizeof(pdata));
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ret = PTR_ERR_OR_ZERO(pdev);
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if (ret)
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goto disable_dvfs;
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return 0;
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disable_dvfs:
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armada37xx_cpufreq_disable_dvfs(nb_pm_base);
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remove_opp:
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/* clean-up the already added opp before leaving */
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while (load_lvl-- > ARMADA_37XX_DVFS_LOAD_0) {
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freq = cur_frequency / dvfs->divider[load_lvl];
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dev_pm_opp_remove(cpu_dev, freq);
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}
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kfree(armada37xx_cpufreq_state);
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return ret;
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}
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/* late_initcall, to guarantee the driver is loaded after A37xx clock driver */
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late_initcall(armada37xx_cpufreq_driver_init);
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@ -66,8 +66,6 @@ static const struct of_device_id whitelist[] __initconst = {
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{ .compatible = "renesas,r8a7792", },
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{ .compatible = "renesas,r8a7793", },
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{ .compatible = "renesas,r8a7794", },
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{ .compatible = "renesas,r8a7795", },
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{ .compatible = "renesas,r8a7796", },
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{ .compatible = "renesas,sh73a0", },
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{ .compatible = "rockchip,rk2928", },
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@ -346,8 +346,14 @@ static int dt_cpufreq_probe(struct platform_device *pdev)
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if (ret)
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return ret;
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if (data && data->have_governor_per_policy)
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dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY;
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if (data) {
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if (data->have_governor_per_policy)
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dt_cpufreq_driver.flags |= CPUFREQ_HAVE_GOVERNOR_PER_POLICY;
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dt_cpufreq_driver.resume = data->resume;
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if (data->suspend)
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dt_cpufreq_driver.suspend = data->suspend;
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}
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ret = cpufreq_register_driver(&dt_cpufreq_driver);
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if (ret)
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@ -12,8 +12,13 @@
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#include <linux/types.h>
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struct cpufreq_policy;
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struct cpufreq_dt_platform_data {
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bool have_governor_per_policy;
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int (*suspend)(struct cpufreq_policy *policy);
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int (*resume)(struct cpufreq_policy *policy);
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};
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#endif /* __CPUFREQ_DT_H__ */
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@ -300,8 +300,19 @@ static void adjust_jiffies(unsigned long val, struct cpufreq_freqs *ci)
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#endif
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}
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static void __cpufreq_notify_transition(struct cpufreq_policy *policy,
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struct cpufreq_freqs *freqs, unsigned int state)
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/**
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* cpufreq_notify_transition - Notify frequency transition and adjust_jiffies.
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* @policy: cpufreq policy to enable fast frequency switching for.
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* @freqs: contain details of the frequency update.
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* @state: set to CPUFREQ_PRECHANGE or CPUFREQ_POSTCHANGE.
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*
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* This function calls the transition notifiers and the "adjust_jiffies"
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* function. It is called twice on all CPU frequency changes that have
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* external effects.
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*/
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static void cpufreq_notify_transition(struct cpufreq_policy *policy,
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struct cpufreq_freqs *freqs,
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unsigned int state)
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{
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BUG_ON(irqs_disabled());
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@ -313,52 +324,42 @@ static void __cpufreq_notify_transition(struct cpufreq_policy *policy,
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state, freqs->new);
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switch (state) {
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case CPUFREQ_PRECHANGE:
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/* detect if the driver reported a value as "old frequency"
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/*
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* Detect if the driver reported a value as "old frequency"
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* which is not equal to what the cpufreq core thinks is
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* "old frequency".
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*/
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if (!(cpufreq_driver->flags & CPUFREQ_CONST_LOOPS)) {
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if ((policy) && (policy->cpu == freqs->cpu) &&
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(policy->cur) && (policy->cur != freqs->old)) {
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if (policy->cur && (policy->cur != freqs->old)) {
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pr_debug("Warning: CPU frequency is %u, cpufreq assumed %u kHz\n",
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freqs->old, policy->cur);
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freqs->old = policy->cur;
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}
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}
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srcu_notifier_call_chain(&cpufreq_transition_notifier_list,
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CPUFREQ_PRECHANGE, freqs);
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for_each_cpu(freqs->cpu, policy->cpus) {
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srcu_notifier_call_chain(&cpufreq_transition_notifier_list,
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CPUFREQ_PRECHANGE, freqs);
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}
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adjust_jiffies(CPUFREQ_PRECHANGE, freqs);
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break;
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case CPUFREQ_POSTCHANGE:
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adjust_jiffies(CPUFREQ_POSTCHANGE, freqs);
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pr_debug("FREQ: %lu - CPU: %lu\n",
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(unsigned long)freqs->new, (unsigned long)freqs->cpu);
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trace_cpu_frequency(freqs->new, freqs->cpu);
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cpufreq_stats_record_transition(policy, freqs->new);
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srcu_notifier_call_chain(&cpufreq_transition_notifier_list,
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CPUFREQ_POSTCHANGE, freqs);
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if (likely(policy) && likely(policy->cpu == freqs->cpu))
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policy->cur = freqs->new;
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break;
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}
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}
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pr_debug("FREQ: %u - CPUs: %*pbl\n", freqs->new,
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cpumask_pr_args(policy->cpus));
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/**
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* cpufreq_notify_transition - call notifier chain and adjust_jiffies
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* on frequency transition.
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*
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* This function calls the transition notifiers and the "adjust_jiffies"
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* function. It is called twice on all CPU frequency changes that have
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* external effects.
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*/
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static void cpufreq_notify_transition(struct cpufreq_policy *policy,
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struct cpufreq_freqs *freqs, unsigned int state)
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{
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for_each_cpu(freqs->cpu, policy->cpus)
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__cpufreq_notify_transition(policy, freqs, state);
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for_each_cpu(freqs->cpu, policy->cpus) {
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trace_cpu_frequency(freqs->new, freqs->cpu);
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srcu_notifier_call_chain(&cpufreq_transition_notifier_list,
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CPUFREQ_POSTCHANGE, freqs);
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}
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cpufreq_stats_record_transition(policy, freqs->new);
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policy->cur = freqs->new;
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}
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}
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/* Do post notifications when there are chances that transition has failed */
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@ -1939,13 +1939,51 @@ static int intel_cpufreq_verify_policy(struct cpufreq_policy *policy)
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return 0;
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}
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/* Use of trace in passive mode:
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*
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* In passive mode the trace core_busy field (also known as the
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* performance field, and lablelled as such on the graphs; also known as
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* core_avg_perf) is not needed and so is re-assigned to indicate if the
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* driver call was via the normal or fast switch path. Various graphs
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* output from the intel_pstate_tracer.py utility that include core_busy
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* (or performance or core_avg_perf) have a fixed y-axis from 0 to 100%,
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* so we use 10 to indicate the the normal path through the driver, and
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* 90 to indicate the fast switch path through the driver.
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* The scaled_busy field is not used, and is set to 0.
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*/
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#define INTEL_PSTATE_TRACE_TARGET 10
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#define INTEL_PSTATE_TRACE_FAST_SWITCH 90
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static void intel_cpufreq_trace(struct cpudata *cpu, unsigned int trace_type, int old_pstate)
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{
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struct sample *sample;
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if (!trace_pstate_sample_enabled())
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return;
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if (!intel_pstate_sample(cpu, ktime_get()))
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return;
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sample = &cpu->sample;
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trace_pstate_sample(trace_type,
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0,
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old_pstate,
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cpu->pstate.current_pstate,
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sample->mperf,
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sample->aperf,
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sample->tsc,
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get_avg_frequency(cpu),
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fp_toint(cpu->iowait_boost * 100));
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}
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static int intel_cpufreq_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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struct cpudata *cpu = all_cpu_data[policy->cpu];
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struct cpufreq_freqs freqs;
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int target_pstate;
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int target_pstate, old_pstate;
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update_turbo_state();
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@ -1965,12 +2003,14 @@ static int intel_cpufreq_target(struct cpufreq_policy *policy,
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break;
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}
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target_pstate = intel_pstate_prepare_request(cpu, target_pstate);
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old_pstate = cpu->pstate.current_pstate;
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if (target_pstate != cpu->pstate.current_pstate) {
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cpu->pstate.current_pstate = target_pstate;
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wrmsrl_on_cpu(policy->cpu, MSR_IA32_PERF_CTL,
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pstate_funcs.get_val(cpu, target_pstate));
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}
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freqs.new = target_pstate * cpu->pstate.scaling;
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intel_cpufreq_trace(cpu, INTEL_PSTATE_TRACE_TARGET, old_pstate);
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cpufreq_freq_transition_end(policy, &freqs, false);
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return 0;
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|
@ -1980,13 +2020,15 @@ static unsigned int intel_cpufreq_fast_switch(struct cpufreq_policy *policy,
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unsigned int target_freq)
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{
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struct cpudata *cpu = all_cpu_data[policy->cpu];
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int target_pstate;
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int target_pstate, old_pstate;
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update_turbo_state();
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target_pstate = DIV_ROUND_UP(target_freq, cpu->pstate.scaling);
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target_pstate = intel_pstate_prepare_request(cpu, target_pstate);
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old_pstate = cpu->pstate.current_pstate;
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intel_pstate_update_pstate(cpu, target_pstate);
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intel_cpufreq_trace(cpu, INTEL_PSTATE_TRACE_FAST_SWITCH, old_pstate);
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return target_pstate * cpu->pstate.scaling;
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}
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|
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|
|
|
@ -143,7 +143,7 @@ static void s3c2440_cpufreq_setdivs(struct s3c_cpufreq_config *cfg)
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{
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unsigned long clkdiv, camdiv;
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|
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s3c_freq_dbg("%s: divsiors: h=%d, p=%d\n", __func__,
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s3c_freq_dbg("%s: divisors: h=%d, p=%d\n", __func__,
|
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cfg->divs.h_divisor, cfg->divs.p_divisor);
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clkdiv = __raw_readl(S3C2410_CLKDIVN);
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@ -252,7 +252,7 @@ EXPORT_SYMBOL_GPL(speedstep_get_frequency);
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*********************************************************************/
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/* Keep in sync with the x86_cpu_id tables in the different modules */
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unsigned int speedstep_detect_processor(void)
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enum speedstep_processor speedstep_detect_processor(void)
|
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{
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struct cpuinfo_x86 *c = &cpu_data(0);
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u32 ebx, msr_lo, msr_hi;
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