Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel: drm/i915: Disable FBC on Ironlake to save 1W drm/i915: Take advantage of auto-polling CRT hotplug detection on PCH hardware drm/i915/crt: Introduce struct intel_crt drm/i915: Do not hold mutex when faulting in user addresses drm: radeon: fix error value sign drm/radeon/kms: fix and unify tiled buffer alignment checking for r6xx/7xx drm/i915: Retire any pending operations on the old scanout when switching drm/i915: Fix I2C adapter registration
This commit is contained in:
Linus Torvalds
Коммит
973d168de2
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@ -150,7 +150,8 @@ static const struct intel_device_info intel_ironlake_d_info = {
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static const struct intel_device_info intel_ironlake_m_info = {
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.gen = 5, .is_mobile = 1,
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.need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1,
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.need_gfx_hws = 1, .has_rc6 = 1, .has_hotplug = 1,
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.has_fbc = 0, /* disabled due to buggy hardware */
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.has_bsd_ring = 1,
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};
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@ -1045,6 +1045,8 @@ void i915_gem_clflush_object(struct drm_gem_object *obj);
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int i915_gem_object_set_domain(struct drm_gem_object *obj,
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uint32_t read_domains,
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uint32_t write_domain);
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int i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj,
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bool interruptible);
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int i915_gem_init_ringbuffer(struct drm_device *dev);
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void i915_gem_cleanup_ringbuffer(struct drm_device *dev);
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int i915_gem_do_init(struct drm_device *dev, unsigned long start,
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@ -547,6 +547,19 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
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struct drm_i915_gem_object *obj_priv;
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int ret = 0;
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if (args->size == 0)
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return 0;
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if (!access_ok(VERIFY_WRITE,
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(char __user *)(uintptr_t)args->data_ptr,
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args->size))
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return -EFAULT;
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ret = fault_in_pages_writeable((char __user *)(uintptr_t)args->data_ptr,
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args->size);
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if (ret)
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return -EFAULT;
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ret = i915_mutex_lock_interruptible(dev);
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if (ret)
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return ret;
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@ -564,23 +577,6 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data,
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goto out;
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}
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if (args->size == 0)
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goto out;
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if (!access_ok(VERIFY_WRITE,
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(char __user *)(uintptr_t)args->data_ptr,
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args->size)) {
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ret = -EFAULT;
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goto out;
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}
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ret = fault_in_pages_writeable((char __user *)(uintptr_t)args->data_ptr,
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args->size);
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if (ret) {
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ret = -EFAULT;
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goto out;
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}
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ret = i915_gem_object_get_pages_or_evict(obj);
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if (ret)
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goto out;
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@ -981,7 +977,20 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
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struct drm_i915_gem_pwrite *args = data;
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struct drm_gem_object *obj;
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struct drm_i915_gem_object *obj_priv;
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int ret = 0;
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int ret;
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if (args->size == 0)
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return 0;
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if (!access_ok(VERIFY_READ,
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(char __user *)(uintptr_t)args->data_ptr,
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args->size))
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return -EFAULT;
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ret = fault_in_pages_readable((char __user *)(uintptr_t)args->data_ptr,
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args->size);
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if (ret)
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return -EFAULT;
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ret = i915_mutex_lock_interruptible(dev);
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if (ret)
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@ -994,30 +1003,12 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
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}
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obj_priv = to_intel_bo(obj);
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/* Bounds check destination. */
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if (args->offset > obj->size || args->size > obj->size - args->offset) {
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ret = -EINVAL;
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goto out;
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}
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if (args->size == 0)
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goto out;
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if (!access_ok(VERIFY_READ,
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(char __user *)(uintptr_t)args->data_ptr,
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args->size)) {
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ret = -EFAULT;
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goto out;
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}
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ret = fault_in_pages_readable((char __user *)(uintptr_t)args->data_ptr,
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args->size);
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if (ret) {
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ret = -EFAULT;
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goto out;
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}
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/* We can only do the GTT pwrite on untiled buffers, as otherwise
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* it would end up going through the fenced access, and we'll get
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* different detiling behavior between reading and writing.
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@ -2907,6 +2898,20 @@ i915_gem_object_set_to_display_plane(struct drm_gem_object *obj,
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return 0;
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}
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int
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i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj,
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bool interruptible)
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{
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if (!obj->active)
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return 0;
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if (obj->base.write_domain & I915_GEM_GPU_DOMAINS)
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i915_gem_flush_ring(obj->base.dev, NULL, obj->ring,
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0, obj->base.write_domain);
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return i915_gem_object_wait_rendering(&obj->base, interruptible);
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}
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/**
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* Moves a single object to the CPU read, and possibly write domain.
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*
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@ -34,6 +34,25 @@
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#include "i915_drm.h"
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#include "i915_drv.h"
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/* Here's the desired hotplug mode */
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#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
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ADPA_CRT_HOTPLUG_WARMUP_10MS | \
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ADPA_CRT_HOTPLUG_SAMPLE_4S | \
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ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
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ADPA_CRT_HOTPLUG_VOLREF_325MV | \
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ADPA_CRT_HOTPLUG_ENABLE)
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struct intel_crt {
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struct intel_encoder base;
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bool force_hotplug_required;
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};
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static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
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{
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return container_of(intel_attached_encoder(connector),
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struct intel_crt, base);
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}
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static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
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{
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struct drm_device *dev = encoder->dev;
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@ -129,7 +148,7 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
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dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
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}
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adpa = 0;
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adpa = ADPA_HOTPLUG_BITS;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
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adpa |= ADPA_HSYNC_ACTIVE_HIGH;
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if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
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@ -157,53 +176,44 @@ static void intel_crt_mode_set(struct drm_encoder *encoder,
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static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
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{
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struct drm_device *dev = connector->dev;
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struct intel_crt *crt = intel_attached_crt(connector);
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 adpa, temp;
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u32 adpa;
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bool ret;
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bool turn_off_dac = false;
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temp = adpa = I915_READ(PCH_ADPA);
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/* The first time through, trigger an explicit detection cycle */
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if (crt->force_hotplug_required) {
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bool turn_off_dac = HAS_PCH_SPLIT(dev);
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u32 save_adpa;
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if (HAS_PCH_SPLIT(dev))
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turn_off_dac = true;
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crt->force_hotplug_required = 0;
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adpa &= ~ADPA_CRT_HOTPLUG_MASK;
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if (turn_off_dac)
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adpa &= ~ADPA_DAC_ENABLE;
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save_adpa = adpa = I915_READ(PCH_ADPA);
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DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
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/* disable HPD first */
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I915_WRITE(PCH_ADPA, adpa);
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(void)I915_READ(PCH_ADPA);
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adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
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if (turn_off_dac)
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adpa &= ~ADPA_DAC_ENABLE;
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adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
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ADPA_CRT_HOTPLUG_WARMUP_10MS |
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ADPA_CRT_HOTPLUG_SAMPLE_4S |
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ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
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ADPA_CRT_HOTPLUG_VOLREF_325MV |
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ADPA_CRT_HOTPLUG_ENABLE |
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ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
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I915_WRITE(PCH_ADPA, adpa);
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DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa);
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I915_WRITE(PCH_ADPA, adpa);
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if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
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1000))
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DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
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if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
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1000))
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DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
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if (turn_off_dac) {
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/* Make sure hotplug is enabled */
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I915_WRITE(PCH_ADPA, temp | ADPA_CRT_HOTPLUG_ENABLE);
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(void)I915_READ(PCH_ADPA);
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if (turn_off_dac) {
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I915_WRITE(PCH_ADPA, save_adpa);
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POSTING_READ(PCH_ADPA);
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}
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}
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/* Check the status to see if both blue and green are on now */
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adpa = I915_READ(PCH_ADPA);
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adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
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if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
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(adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
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if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
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ret = true;
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else
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ret = false;
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DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
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return ret;
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}
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@ -277,13 +287,12 @@ static bool intel_crt_ddc_probe(struct drm_i915_private *dev_priv, int ddc_bus)
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return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1;
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}
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static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
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static bool intel_crt_detect_ddc(struct intel_crt *crt)
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{
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struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
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struct drm_i915_private *dev_priv = encoder->dev->dev_private;
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struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
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/* CRT should always be at 0, but check anyway */
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if (intel_encoder->type != INTEL_OUTPUT_ANALOG)
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if (crt->base.type != INTEL_OUTPUT_ANALOG)
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return false;
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if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) {
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@ -291,7 +300,7 @@ static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
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return true;
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}
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if (intel_ddc_probe(intel_encoder, dev_priv->crt_ddc_pin)) {
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if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
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DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
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return true;
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}
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@ -300,9 +309,9 @@ static bool intel_crt_detect_ddc(struct drm_encoder *encoder)
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}
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static enum drm_connector_status
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intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder)
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intel_crt_load_detect(struct drm_crtc *crtc, struct intel_crt *crt)
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{
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struct drm_encoder *encoder = &intel_encoder->base;
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struct drm_encoder *encoder = &crt->base.base;
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struct drm_device *dev = encoder->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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|
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@ -434,7 +443,7 @@ static enum drm_connector_status
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intel_crt_detect(struct drm_connector *connector, bool force)
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{
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struct drm_device *dev = connector->dev;
|
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struct intel_encoder *encoder = intel_attached_encoder(connector);
|
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struct intel_crt *crt = intel_attached_crt(connector);
|
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struct drm_crtc *crtc;
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int dpms_mode;
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enum drm_connector_status status;
|
||||
|
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@ -443,28 +452,31 @@ intel_crt_detect(struct drm_connector *connector, bool force)
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if (intel_crt_detect_hotplug(connector)) {
|
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DRM_DEBUG_KMS("CRT detected via hotplug\n");
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return connector_status_connected;
|
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} else
|
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} else {
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DRM_DEBUG_KMS("CRT not detected via hotplug\n");
|
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return connector_status_disconnected;
|
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}
|
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}
|
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|
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if (intel_crt_detect_ddc(&encoder->base))
|
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if (intel_crt_detect_ddc(crt))
|
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return connector_status_connected;
|
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|
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if (!force)
|
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return connector->status;
|
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|
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/* for pre-945g platforms use load detect */
|
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if (encoder->base.crtc && encoder->base.crtc->enabled) {
|
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status = intel_crt_load_detect(encoder->base.crtc, encoder);
|
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crtc = crt->base.base.crtc;
|
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if (crtc && crtc->enabled) {
|
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status = intel_crt_load_detect(crtc, crt);
|
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} else {
|
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crtc = intel_get_load_detect_pipe(encoder, connector,
|
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crtc = intel_get_load_detect_pipe(&crt->base, connector,
|
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NULL, &dpms_mode);
|
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if (crtc) {
|
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if (intel_crt_detect_ddc(&encoder->base))
|
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if (intel_crt_detect_ddc(crt))
|
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status = connector_status_connected;
|
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else
|
||||
status = intel_crt_load_detect(crtc, encoder);
|
||||
intel_release_load_detect_pipe(encoder,
|
||||
status = intel_crt_load_detect(crtc, crt);
|
||||
intel_release_load_detect_pipe(&crt->base,
|
||||
connector, dpms_mode);
|
||||
} else
|
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status = connector_status_unknown;
|
||||
|
|
@ -536,17 +548,17 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs = {
|
|||
void intel_crt_init(struct drm_device *dev)
|
||||
{
|
||||
struct drm_connector *connector;
|
||||
struct intel_encoder *intel_encoder;
|
||||
struct intel_crt *crt;
|
||||
struct intel_connector *intel_connector;
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
||||
intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL);
|
||||
if (!intel_encoder)
|
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crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
|
||||
if (!crt)
|
||||
return;
|
||||
|
||||
intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
|
||||
if (!intel_connector) {
|
||||
kfree(intel_encoder);
|
||||
kfree(crt);
|
||||
return;
|
||||
}
|
||||
|
||||
|
|
@ -554,20 +566,20 @@ void intel_crt_init(struct drm_device *dev)
|
|||
drm_connector_init(dev, &intel_connector->base,
|
||||
&intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
|
||||
|
||||
drm_encoder_init(dev, &intel_encoder->base, &intel_crt_enc_funcs,
|
||||
drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
|
||||
DRM_MODE_ENCODER_DAC);
|
||||
|
||||
intel_connector_attach_encoder(intel_connector, intel_encoder);
|
||||
intel_connector_attach_encoder(intel_connector, &crt->base);
|
||||
|
||||
intel_encoder->type = INTEL_OUTPUT_ANALOG;
|
||||
intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
|
||||
(1 << INTEL_ANALOG_CLONE_BIT) |
|
||||
(1 << INTEL_SDVO_LVDS_CLONE_BIT);
|
||||
intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
|
||||
crt->base.type = INTEL_OUTPUT_ANALOG;
|
||||
crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
|
||||
1 << INTEL_ANALOG_CLONE_BIT |
|
||||
1 << INTEL_SDVO_LVDS_CLONE_BIT);
|
||||
crt->base.crtc_mask = (1 << 0) | (1 << 1);
|
||||
connector->interlace_allowed = 1;
|
||||
connector->doublescan_allowed = 0;
|
||||
|
||||
drm_encoder_helper_add(&intel_encoder->base, &intel_crt_helper_funcs);
|
||||
drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
|
||||
drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
|
||||
|
||||
drm_sysfs_connector_add(connector);
|
||||
|
|
@ -577,5 +589,22 @@ void intel_crt_init(struct drm_device *dev)
|
|||
else
|
||||
connector->polled = DRM_CONNECTOR_POLL_CONNECT;
|
||||
|
||||
/*
|
||||
* Configure the automatic hotplug detection stuff
|
||||
*/
|
||||
crt->force_hotplug_required = 0;
|
||||
if (HAS_PCH_SPLIT(dev)) {
|
||||
u32 adpa;
|
||||
|
||||
adpa = I915_READ(PCH_ADPA);
|
||||
adpa &= ~ADPA_CRT_HOTPLUG_MASK;
|
||||
adpa |= ADPA_HOTPLUG_BITS;
|
||||
I915_WRITE(PCH_ADPA, adpa);
|
||||
POSTING_READ(PCH_ADPA);
|
||||
|
||||
DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
|
||||
crt->force_hotplug_required = 1;
|
||||
}
|
||||
|
||||
dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1611,6 +1611,18 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
|
|||
|
||||
wait_event(dev_priv->pending_flip_queue,
|
||||
atomic_read(&obj_priv->pending_flip) == 0);
|
||||
|
||||
/* Big Hammer, we also need to ensure that any pending
|
||||
* MI_WAIT_FOR_EVENT inside a user batch buffer on the
|
||||
* current scanout is retired before unpinning the old
|
||||
* framebuffer.
|
||||
*/
|
||||
ret = i915_gem_object_flush_gpu(obj_priv, false);
|
||||
if (ret) {
|
||||
i915_gem_object_unpin(to_intel_framebuffer(crtc->fb)->obj);
|
||||
mutex_unlock(&dev->struct_mutex);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y,
|
||||
|
|
|
|||
|
|
@ -160,7 +160,7 @@ intel_gpio_create(struct drm_i915_private *dev_priv, u32 pin)
|
|||
};
|
||||
struct intel_gpio *gpio;
|
||||
|
||||
if (pin < 1 || pin > 7)
|
||||
if (pin >= ARRAY_SIZE(map_pin_to_reg) || !map_pin_to_reg[pin])
|
||||
return NULL;
|
||||
|
||||
gpio = kzalloc(sizeof(struct intel_gpio), GFP_KERNEL);
|
||||
|
|
@ -172,7 +172,8 @@ intel_gpio_create(struct drm_i915_private *dev_priv, u32 pin)
|
|||
gpio->reg += PCH_GPIOA - GPIOA;
|
||||
gpio->dev_priv = dev_priv;
|
||||
|
||||
snprintf(gpio->adapter.name, I2C_NAME_SIZE, "GPIO%c", "?BACDEF?"[pin]);
|
||||
snprintf(gpio->adapter.name, sizeof(gpio->adapter.name),
|
||||
"i915 GPIO%c", "?BACDE?F"[pin]);
|
||||
gpio->adapter.owner = THIS_MODULE;
|
||||
gpio->adapter.algo_data = &gpio->algo;
|
||||
gpio->adapter.dev.parent = &dev_priv->dev->pdev->dev;
|
||||
|
|
@ -349,7 +350,7 @@ int intel_setup_gmbus(struct drm_device *dev)
|
|||
"panel",
|
||||
"dpc",
|
||||
"dpb",
|
||||
"reserved"
|
||||
"reserved",
|
||||
"dpd",
|
||||
};
|
||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||
|
|
@ -366,8 +367,8 @@ int intel_setup_gmbus(struct drm_device *dev)
|
|||
bus->adapter.owner = THIS_MODULE;
|
||||
bus->adapter.class = I2C_CLASS_DDC;
|
||||
snprintf(bus->adapter.name,
|
||||
I2C_NAME_SIZE,
|
||||
"gmbus %s",
|
||||
sizeof(bus->adapter.name),
|
||||
"i915 gmbus %s",
|
||||
names[i]);
|
||||
|
||||
bus->adapter.dev.parent = &dev->pdev->dev;
|
||||
|
|
|
|||
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