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ARM: dts: imx7d: move ARM platform peripherals inside soc node 

Since we have a SoC level node we should make use of it and have
all nodes which are within the SoC, inside that node. This also
saves an extra interrupt-parent properties. While at it, also
order the Coresight nodes according to register addresses.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Stefan Agner 2016-07-25 23:42:35 -07:00 коммит произвёл Shawn Guo
Родитель 2a8e583c09
Коммит 974a3abcff
2 изменённых файлов: 209 добавлений и 208 удалений
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2
arch/arm/boot/dts/imx7d.dtsi
Просмотреть файл

@ -52,6 +52,7 @@
}; };
}; };
soc {
etm@3007d000 { etm@3007d000 {
compatible = "arm,coresight-etm3x", "arm,primecell"; compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x3007d000 0x1000>; reg = <0x3007d000 0x1000>;
@ -72,6 +73,7 @@
}; };
}; };
}; };
};
}; };
&aips3 { &aips3 {

255
arch/arm/boot/dts/imx7s.dtsi
Просмотреть файл

@ -95,16 +95,6 @@
}; };
}; };
intc: interrupt-controller@31001000 {
compatible = "arm,cortex-a7-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x31001000 0x1000>,
<0x31002000 0x1000>,
<0x31004000 0x2000>,
<0x31006000 0x2000>;
};
ckil: clock-cki { ckil: clock-cki {
compatible = "fixed-clock"; compatible = "fixed-clock";
#clock-cells = <0>; #clock-cells = <0>;
@ -119,13 +109,120 @@
clock-output-names = "osc"; clock-output-names = "osc";
}; };
timer { soc {
compatible = "arm,armv7-timer"; #address-cells = <1>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, #size-cells = <1>;
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, compatible = "simple-bus";
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
ranges;
funnel@30041000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x30041000 0x1000>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
ca_funnel_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
/* funnel input ports */
port@0 {
reg = <0>;
ca_funnel_in_port0: endpoint {
slave-mode;
remote-endpoint = <&etm0_out_port>;
};
};
/* funnel output port */
port@2 {
reg = <0>;
ca_funnel_out_port0: endpoint {
remote-endpoint = <&hugo_funnel_in_port0>;
};
};
/* the other input ports are not connect to anything */
};
};
etm@3007c000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x3007c000 0x1000>;
cpu = <&cpu0>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
port {
etm0_out_port: endpoint {
remote-endpoint = <&ca_funnel_in_port0>;
};
};
};
funnel@30083000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x30083000 0x1000>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* funnel input ports */
port@0 {
reg = <0>;
hugo_funnel_in_port0: endpoint {
slave-mode;
remote-endpoint = <&ca_funnel_out_port0>;
};
};
port@1 {
reg = <1>;
hugo_funnel_in_port1: endpoint {
slave-mode; /* M4 input */
};
};
port@2 {
reg = <0>;
hugo_funnel_out_port0: endpoint {
remote-endpoint = <&etf_in_port>;
};
};
/* the other input ports are not connect to anything */
};
};
etf@30084000 {
compatible = "arm,coresight-tmc", "arm,primecell";
reg = <0x30084000 0x1000>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
etf_in_port: endpoint {
slave-mode;
remote-endpoint = <&hugo_funnel_out_port0>;
};
};
port@1 {
reg = <0>;
etf_out_port: endpoint {
remote-endpoint = <&replicator_in_port0>;
};
};
};
}; };
etr@30086000 { etr@30086000 {
@ -193,121 +290,23 @@
}; };
}; };
etf@30084000 { intc: interrupt-controller@31001000 {
compatible = "arm,coresight-tmc", "arm,primecell"; compatible = "arm,cortex-a7-gic";
reg = <0x30084000 0x1000>; #interrupt-cells = <3>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>; interrupt-controller;
clock-names = "apb_pclk"; reg = <0x31001000 0x1000>,
<0x31002000 0x1000>,
ports { <0x31004000 0x2000>,
#address-cells = <1>; <0x31006000 0x2000>;
#size-cells = <0>;
port@0 {
reg = <0>;
etf_in_port: endpoint {
slave-mode;
remote-endpoint = <&hugo_funnel_out_port0>;
};
}; };
port@1 { timer {
reg = <0>; compatible = "arm,armv7-timer";
etf_out_port: endpoint { interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
remote-endpoint = <&replicator_in_port0>; <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
}; };
};
};
};
funnel@30083000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x30083000 0x1000>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
ports {
#address-cells = <1>;
#size-cells = <0>;
/* funnel input ports */
port@0 {
reg = <0>;
hugo_funnel_in_port0: endpoint {
slave-mode;
remote-endpoint = <&ca_funnel_out_port0>;
};
};
port@1 {
reg = <1>;
hugo_funnel_in_port1: endpoint {
slave-mode; /* M4 input */
};
};
port@2 {
reg = <0>;
hugo_funnel_out_port0: endpoint {
remote-endpoint = <&etf_in_port>;
};
};
/* the other input ports are not connect to anything */
};
};
funnel@30041000 {
compatible = "arm,coresight-funnel", "arm,primecell";
reg = <0x30041000 0x1000>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
ca_funnel_ports: ports {
#address-cells = <1>;
#size-cells = <0>;
/* funnel input ports */
port@0 {
reg = <0>;
ca_funnel_in_port0: endpoint {
slave-mode;
remote-endpoint = <&etm0_out_port>;
};
};
/* funnel output port */
port@2 {
reg = <0>;
ca_funnel_out_port0: endpoint {
remote-endpoint = <&hugo_funnel_in_port0>;
};
};
/* the other input ports are not connect to anything */
};
};
etm@3007c000 {
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x3007c000 0x1000>;
cpu = <&cpu0>;
clocks = <&clks IMX7D_MAIN_AXI_ROOT_CLK>;
clock-names = "apb_pclk";
port {
etm0_out_port: endpoint {
remote-endpoint = <&ca_funnel_in_port0>;
};
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&intc>;
ranges;
aips1: aips-bus@30000000 { aips1: aips-bus@30000000 {
compatible = "fsl,aips-bus", "simple-bus"; compatible = "fsl,aips-bus", "simple-bus";