staging: mt7621-dts: correct various clock frequencies.

The MT7621 documentation says that the sys clock - also known
as OCP clock for the Open Core Protocol - can be configured to
1/3 or 1/4 of the CPU clock.
Testing on my hardware, using the fact that the SPI clock is
based on the OCP clock and measuring transfer rates, shows
a clock of a little over 200MHz with a CPU clock of 900MHz.
So assume 1/4 is the default.

Also, the nor-flash in the gbpc1 is documented as accepting 50MHz
for request requests, and higher for other requests.  So set
maximum to 50MHz.

Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

drivers/staging/mt7621-dts/gbpc1.dts

@@ -74,7 +74,7 @@
 		#size-cells = <1>;
 		compatible = "jedec,spi-nor";
 		reg = <0>;
-		spi-max-frequency = <10000000>;
+		spi-max-frequency = <50000000>;
 
 		partition@0 {
 			label = "u-boot";
@@ -104,7 +104,8 @@
 
 &sysclock {
 			compatible = "fixed-clock";
-			clock-frequency = <90000000>;
+			/* This is normally 1/4 of cpuclock */
+			clock-frequency = <225000000>;
 };
 
 &cpuclock {

drivers/staging/mt7621-dts/mt7621.dtsi

@@ -38,8 +38,8 @@
 		#clock-cells = <0>;
 		compatible = "fixed-clock";
 
-		/* FIXME: there should be way to detect this */
-		clock-frequency = <50000000>;
+		/* This is normally 1/4 of cpuclock */
+		clock-frequency = <220000000>;
 	};
 
 	palmbus: palmbus@1E000000 {