Blackfin arch: fix bug - Error if one serial has hardware flow control and the other doesn't
I have a system where UART0 is configured with hardware flow control, but UART1 doesn't have it enabled. Attempting to access UART1 in this configuration results in the following error in dmesg: <3>bfin-gpio: GPIO 0 is already reserved as Peripheral by bfin-uart ! <5>Stack from 0082bc7c: <5> 0082bc88 00404dd6 00000003 00000000 0054051e 004079da 0082bcb4 00000000 <5> 00000003 00000000 0052686c 0113f2a0 005fa3f0 00000032 20515249 00003035 <5> 00427228 00526e50 0113f2e0 005fa3f0 00000032 0113f2e0 0054b748 0000ffff <5> 22222222 22222222 004e1628 00427304 00000000 00000032 00000023 0054b748 <5> 00487a94 0054b7e8 0054b748 0000000b 00487fb8 0054b748 0054b748 00000001 <5> 0000000a 005fa3f0 009d4fe8 0101e3c0 0054b748 005fa3f0 0050b134 0054b748 <5> <5>Call Trace: <4>[<00485c16>] _uart_startup+0x56/0x178 <4>[<004865c8>] _uart_open+0x40/0x3e0 <4>[<0048661c>] _uart_open+0x94/0x3e0 <4>[<0047f1ce>] _init_dev+0x1fa/0x450 <4>[<004e1628>] ___mutex_unlock_slowpath+0x30/0xe8 <4>[<004815da>] _tty_open+0xf6/0x21c <4>[<0043dab0>] ___path_lookup_intent_open+0x34/0x7c <4>[<004375e4>] _chrdev_open+0x7c/0x134 <4>[<0043dc2c>] _open_namei+0x60/0x568 <4>[<00433fa2>] ___dentry_open+0x9e/0x188 <4>[<00437568>] _chrdev_open+0x0/0x134 <4>[<0043410c>] _nameidata_to_filp+0x30/0x3c <4>[<00434152>] _do_filp_open+0x3a/0x44 <4>[<00408826>] _task_running_tick+0x102/0x278 <4>[<0043418e>] _do_sys_open+0x32/0xac <4>[<0043ede4>] _sys_ioctl+0x28/0x50 <4>[<0043edbc>] _sys_ioctl+0x0/0x50 <4>[<00434224>] _sys_open+0x18/0x20 <4>[<0043420c>] _sys_open+0x0/0x20 <4>[<00418174>] _sys_setuid+0x0/0xc8 This is because the #ifdef's in bfin_serial_5xx.h are messed up. More specifically, they add/remove the uart_{rts,cts}_pin fields in bfin_serial_resources based on whether the particular port has rts/cts enabled, as opposed to when either port has it enabled. This patch fixed this. Signed-off-by: Tom Parker <blackfin@tevp.net> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART0_TX,
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CH_UART0_RX,
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#endif
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART1_TX,
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CH_UART1_RX,
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#endif
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#ifdef CONFIG_BFIN_UART1_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART1_CTS_PIN,
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CONFIG_UART1_RTS_PIN,
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#endif
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@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART0_TX,
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CH_UART0_RX,
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#endif
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART1_TX,
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CH_UART1_RX,
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#endif
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#ifdef CONFIG_BFIN_UART1_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART1_CTS_PIN,
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CONFIG_UART1_RTS_PIN,
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#endif
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@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART_TX,
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CH_UART_RX,
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#endif
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART0_TX,
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CH_UART0_RX,
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#endif
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART1_TX,
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CH_UART1_RX,
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#endif
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#ifdef CONFIG_BFIN_UART1_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART1_CTS_PIN,
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CONFIG_UART1_RTS_PIN,
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#endif
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@ -144,7 +144,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART0_TX,
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CH_UART0_RX,
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#endif
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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@ -158,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART1_TX,
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CH_UART1_RX,
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#endif
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#ifdef CONFIG_BFIN_UART1_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART1_CTS_PIN,
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CONFIG_UART1_RTS_PIN,
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#endif
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@ -63,7 +63,7 @@
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#define UART_ENABLE_INTS(x, v) UART_SET_IER(x, v)
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#define UART_DISABLE_INTS(x) UART_CLEAR_IER(x, 0xF)
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#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS)
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#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART2_CTSRTS)
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# define CONFIG_SERIAL_BFIN_CTSRTS
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# ifndef CONFIG_UART0_CTS_PIN
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@ -74,12 +74,12 @@
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# define CONFIG_UART0_RTS_PIN -1
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# endif
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# ifndef CONFIG_UART1_CTS_PIN
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# define CONFIG_UART1_CTS_PIN -1
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# ifndef CONFIG_UART2_CTS_PIN
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# define CONFIG_UART2_CTS_PIN -1
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# endif
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# ifndef CONFIG_UART1_RTS_PIN
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# define CONFIG_UART1_RTS_PIN -1
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# ifndef CONFIG_UART2_RTS_PIN
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# define CONFIG_UART2_RTS_PIN -1
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# endif
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#endif
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@ -130,7 +130,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART0_TX,
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CH_UART0_RX,
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#endif
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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@ -143,6 +143,10 @@ struct bfin_serial_res bfin_serial_resource[] = {
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#ifdef CONFIG_SERIAL_BFIN_DMA
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CH_UART1_TX,
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CH_UART1_RX,
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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0,
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0,
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#endif
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},
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#endif
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@ -154,7 +158,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART2_TX,
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CH_UART2_RX,
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#endif
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#ifdef CONFIG_BFIN_UART2_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART2_CTS_PIN,
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CONFIG_UART2_RTS_PIN,
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#endif
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@ -167,6 +171,10 @@ struct bfin_serial_res bfin_serial_resource[] = {
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#ifdef CONFIG_SERIAL_BFIN_DMA
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CH_UART3_TX,
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CH_UART3_RX,
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#endif
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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0,
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0,
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#endif
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},
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#endif
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@ -134,7 +134,7 @@ struct bfin_serial_res bfin_serial_resource[] = {
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CH_UART_TX,
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CH_UART_RX,
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#endif
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#ifdef CONFIG_BFIN_UART0_CTSRTS
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#ifdef CONFIG_SERIAL_BFIN_CTSRTS
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CONFIG_UART0_CTS_PIN,
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CONFIG_UART0_RTS_PIN,
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#endif
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