arm64: dts: amlogic updates for v5.9
- meson-gx: Switch to the meson-ee-pwrc bindings - add Khadas MCU nodes -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl8R5HsACgkQWTcYmtP7 xmXTCQ//YJrsHAbH/dM5UyVNNt6eXvbqxBAWL+wFvfdfT9cye4dRdghH/7A9gDyO oHttMDr4ZqnnvdbHMaBD2GGp5XHL3DWt2cQfRmdjoACuAFhF0n2xO9nQg/SbNvCA J1n0aMKu+5R6Wvq0KAPQb8BjlhA3kjO2xaN5QWSgy51Ug/kvbTN8hjF4IVrAMi9M DNKGRQ6YyWaKYaE0TJSnioxFLqmSZJDp1yFm0RfRq89grM+tA7LGqjsLkDPGh0JX xK/GBO4mVnDy4Uf7nWhRcMuKRr7wNLUDg4bmliSTKwYgQUQjLvX07oCX8e43oc/Z mAB8s5qpYPRs3aPI/XAkYRKodqsvky8Kb9kJtIz0ts4SGJaUa96QnsPKQpiZmlw3 X2dak8v2Xz76Ib52c2o4D2odAld0jI8gcVcb3LDoAhdqZmZsISGKbk25QxiBDKCe wT9f1PW219NhKaDXWk4/n5XC079f4FIp+Og6z82LMXG3nngOUry+KA/Pp7y7X70e SNJUlGRAF9o7ilJxurv/zZUgMs0IYNAd/F1JMler5EkGTHz9vhO4Pmqx8LZiv/Yv z4U4yOgSMXPkNMmlVmU6fDW6Gqoo0ek5gVTlp9wfEYnlyz1NfGpTSAFJubhibuXk XQpMRjVW6JLb51ydKiPYra5oB8FTtBiCDEYGFxVAiUrEXpgOCcE= =6Rdx -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: amlogic updates for v5.9 - meson-gx: Switch to the meson-ee-pwrc bindings - add Khadas MCU nodes * tag 'amlogic-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock arm64: dts: meson-gx: Switch to the meson-ee-pwrc bindings arm64: dts: meson-khadas-vim3: add Khadas MCU nodes Link: https://lore.kernel.org/r/7h8sfif2na.fsf@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Коммит
981053c0b2
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@ -181,8 +181,10 @@
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interrupt-names = "macirq";
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clocks = <&clkc CLKID_ETH>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_MPLL2>;
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clock-names = "stmmaceth", "clkin0", "clkin1";
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<&clkc CLKID_MPLL2>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "stmmaceth", "clkin0", "clkin1",
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"timing-adjustment";
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rx-fifo-depth = <4096>;
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tx-fifo-depth = <2048>;
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status = "disabled";
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@ -185,8 +185,10 @@
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interrupt-names = "macirq";
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clocks = <&clkc CLKID_ETH>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_MPLL2>;
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clock-names = "stmmaceth", "clkin0", "clkin1";
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<&clkc CLKID_MPLL2>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "stmmaceth", "clkin0", "clkin1",
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"timing-adjustment";
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rx-fifo-depth = <4096>;
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tx-fifo-depth = <2048>;
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status = "disabled";
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@ -12,6 +12,7 @@
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/meson-gxbb-power.h>
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#include <dt-bindings/thermal/thermal.h>
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/ {
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@ -60,7 +61,7 @@
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compatible = "amlogic,simple-framebuffer",
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"simple-framebuffer";
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amlogic,pipeline = "vpu-cvbs";
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power-domains = <&pwrc_vpu>;
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power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
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status = "disabled";
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};
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@ -68,7 +69,7 @@
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compatible = "amlogic,simple-framebuffer",
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"simple-framebuffer";
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amlogic,pipeline = "vpu-hdmi";
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power-domains = <&pwrc_vpu>;
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power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
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status = "disabled";
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};
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};
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@ -438,12 +439,6 @@
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compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
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reg = <0x0 0x0 0x0 0x100>;
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pwrc_vpu: power-controller-vpu {
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compatible = "amlogic,meson-gx-pwrc-vpu";
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#power-domain-cells = <0>;
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amlogic,hhi-sysctrl = <&sysctrl>;
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};
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clkc_AO: clock-controller {
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compatible = "amlogic,meson-gx-aoclkc";
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#clock-cells = <1>;
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@ -552,6 +547,12 @@
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sysctrl: system-controller@0 {
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compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
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reg = <0 0 0 0x400>;
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pwrc: power-controller {
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compatible = "amlogic,meson-gxbb-pwrc";
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#power-domain-cells = <1>;
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amlogic,ao-sysctrl = <&sysctrl_AO>;
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};
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};
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mailbox: mailbox@404 {
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@ -574,6 +575,7 @@
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interrupt-names = "macirq";
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rx-fifo-depth = <4096>;
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tx-fifo-depth = <2048>;
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power-domains = <&pwrc PWRC_GXBB_ETHERNET_MEM_ID>;
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status = "disabled";
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};
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@ -333,8 +333,9 @@
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ðmac {
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clocks = <&clkc CLKID_ETH>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_MPLL2>;
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clock-names = "stmmaceth", "clkin0", "clkin1";
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<&clkc CLKID_MPLL2>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
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};
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&gpio_intc {
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@ -747,7 +748,7 @@
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};
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};
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&pwrc_vpu {
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&pwrc {
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resets = <&reset RESET_VIU>,
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<&reset RESET_VENC>,
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<&reset RESET_VCBUS>,
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@ -760,6 +761,9 @@
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<&reset RESET_VDI6>,
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<&reset RESET_VENCL>,
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<&reset RESET_VID_LOCK>;
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reset-names = "viu", "venc", "vcbus", "bt656",
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"dvin", "rdma", "venci", "vencp",
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"vdac", "vdi6", "vencl", "vid_lock";
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clocks = <&clkc CLKID_VPU>,
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<&clkc CLKID_VAPB>;
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clock-names = "vpu", "vapb";
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@ -866,7 +870,7 @@
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&vpu {
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compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
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power-domains = <&pwrc_vpu>;
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power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
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};
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&vdec {
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@ -131,8 +131,9 @@
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ðmac {
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clocks = <&clkc CLKID_ETH>,
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<&clkc CLKID_FCLK_DIV2>,
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<&clkc CLKID_MPLL2>;
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clock-names = "stmmaceth", "clkin0", "clkin1";
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<&clkc CLKID_MPLL2>,
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<&clkc CLKID_FCLK_DIV2>;
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clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
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mdio0: mdio {
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#address-cells = <1>;
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@ -782,7 +783,7 @@
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};
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};
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&pwrc_vpu {
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&pwrc {
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resets = <&reset RESET_VIU>,
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<&reset RESET_VENC>,
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<&reset RESET_VCBUS>,
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@ -795,6 +796,9 @@
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<&reset RESET_VDI6>,
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<&reset RESET_VENCL>,
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<&reset RESET_VID_LOCK>;
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reset-names = "viu", "venc", "vcbus", "bt656",
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"dvin", "rdma", "venci", "vencp",
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"vdac", "vdi6", "vencl", "vid_lock";
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clocks = <&clkc CLKID_VPU>,
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<&clkc CLKID_VAPB>;
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clock-names = "vpu", "vapb";
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@ -901,7 +905,7 @@
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&vpu {
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compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
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power-domains = <&pwrc_vpu>;
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power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
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};
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&vdec {
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@ -183,6 +183,23 @@
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hdmi-phandle = <&hdmi_tx>;
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};
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&cpu_thermal {
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trips {
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cpu_active: cpu-active {
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temperature = <80000>; /* millicelsius */
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hysteresis = <2000>; /* millicelsius */
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type = "active";
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};
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};
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cooling-maps {
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map {
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trip = <&cpu_active>;
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cooling-device = <&khadas_mcu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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&ext_mdio {
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external_phy: ethernet-phy@0 {
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/* Realtek RTL8211F (0x001cc916) */
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@ -222,6 +239,12 @@
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pinctrl-0 = <&i2c_ao_sck_pins>, <&i2c_ao_sda_pins>;
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pinctrl-names = "default";
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khadas_mcu: system-controller@18 {
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compatible = "khadas,mcu";
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reg = <0x18>;
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#cooling-cells = <2>;
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};
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gpio_expander: gpio-controller@20 {
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compatible = "ti,tca6408";
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reg = <0x20>;
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