drm/radeon: add VCE version parsing and checking
Also make the result available to userspace. Signed-off-by: Christian König <christian.koenig@amd.com>
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f7ba8b04b2
Коммит
98ccc291ff
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@ -1606,6 +1606,8 @@ struct radeon_vce {
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struct radeon_bo *vcpu_bo;
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void *cpu_addr;
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uint64_t gpu_addr;
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unsigned fw_version;
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unsigned fb_version;
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atomic_t handles[RADEON_MAX_VCE_HANDLES];
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struct drm_file *filp[RADEON_MAX_VCE_HANDLES];
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};
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@ -480,6 +480,12 @@ static int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file
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else
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*value = rdev->pm.default_sclk * 10;
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break;
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case RADEON_INFO_VCE_FW_VERSION:
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*value = rdev->vce.fw_version;
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break;
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case RADEON_INFO_VCE_FB_VERSION:
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*value = rdev->vce.fb_version;
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break;
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default:
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DRM_DEBUG_KMS("Invalid request %d\n", info->request);
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return -EINVAL;
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@ -48,8 +48,11 @@ MODULE_FIRMWARE(FIRMWARE_BONAIRE);
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*/
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int radeon_vce_init(struct radeon_device *rdev)
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{
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unsigned long bo_size;
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const char *fw_name;
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static const char *fw_version = "[ATI LIB=VCEFW,";
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static const char *fb_version = "[ATI LIB=VCEFWSTATS,";
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unsigned long size;
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const char *fw_name, *c;
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uint8_t start, mid, end;
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int i, r;
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switch (rdev->family) {
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@ -70,9 +73,50 @@ int radeon_vce_init(struct radeon_device *rdev)
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return r;
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}
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bo_size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) +
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RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE;
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r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true,
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/* search for firmware version */
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size = rdev->vce_fw->size - strlen(fw_version) - 9;
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c = rdev->vce_fw->data;
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for (;size > 0; --size, ++c)
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if (strncmp(c, fw_version, strlen(fw_version)) == 0)
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break;
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if (size == 0)
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return -EINVAL;
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c += strlen(fw_version);
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if (sscanf(c, "%2hhd.%2hhd.%2hhd]", &start, &mid, &end) != 3)
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return -EINVAL;
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/* search for feedback version */
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size = rdev->vce_fw->size - strlen(fb_version) - 3;
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c = rdev->vce_fw->data;
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for (;size > 0; --size, ++c)
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if (strncmp(c, fb_version, strlen(fb_version)) == 0)
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break;
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if (size == 0)
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return -EINVAL;
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c += strlen(fb_version);
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if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1)
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return -EINVAL;
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DRM_INFO("Found VCE firmware/feedback version %hhd.%hhd.%hhd / %d!\n",
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start, mid, end, rdev->vce.fb_version);
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rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8);
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/* we can only work with this fw version for now */
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if (rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8)))
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return -EINVAL;
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/* load firmware into VRAM */
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size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) +
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RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE;
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r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
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RADEON_GEM_DOMAIN_VRAM, NULL, &rdev->vce.vcpu_bo);
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if (r) {
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dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r);
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@ -83,7 +127,7 @@ int radeon_vce_init(struct radeon_device *rdev)
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if (r)
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return r;
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memset(rdev->vce.cpu_addr, 0, bo_size);
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memset(rdev->vce.cpu_addr, 0, size);
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memcpy(rdev->vce.cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size);
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r = radeon_vce_suspend(rdev);
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@ -988,6 +988,10 @@ struct drm_radeon_cs {
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#define RADEON_INFO_SI_BACKEND_ENABLED_MASK 0x19
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/* max engine clock - needed for OpenCL */
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#define RADEON_INFO_MAX_SCLK 0x1a
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/* version of VCE firmware */
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#define RADEON_INFO_VCE_FW_VERSION 0x1b
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/* version of VCE feedback */
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#define RADEON_INFO_VCE_FB_VERSION 0x1c
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struct drm_radeon_info {
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