[SCSI] lpfc 8.3.22: Add support for PCI Adapter Failure
Periodically poll adapter registers to detect pci adapter failure (reads return -1). On failure, take port offline, set error indicators and wake up worker threads. Threads will take adapter offline. Signed-off-by: Alex Iannicelli <alex.iannicelli@emulex.com> Signed-off-by: James Smart <james.smart@emulex.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
This commit is contained in:
James Smart
James Bottomley
Родитель
7f86059ac0
Коммит
9940b97bb3
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@ -897,7 +897,18 @@ lpfc_worker_wake_up(struct lpfc_hba *phba)
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return;
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}
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static inline void
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static inline int
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lpfc_readl(void __iomem *addr, uint32_t *data)
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{
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uint32_t temp;
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temp = readl(addr);
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if (temp == 0xffffffff)
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return -EIO;
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*data = temp;
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return 0;
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}
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static inline int
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lpfc_sli_read_hs(struct lpfc_hba *phba)
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{
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/*
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@ -906,15 +917,17 @@ lpfc_sli_read_hs(struct lpfc_hba *phba)
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*/
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phba->sli.slistat.err_attn_event++;
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/* Save status info */
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phba->work_hs = readl(phba->HSregaddr);
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phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
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phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
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/* Save status info and check for unplug error */
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if (lpfc_readl(phba->HSregaddr, &phba->work_hs) ||
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lpfc_readl(phba->MBslimaddr + 0xa8, &phba->work_status[0]) ||
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lpfc_readl(phba->MBslimaddr + 0xac, &phba->work_status[1])) {
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return -EIO;
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}
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/* Clear chip Host Attention error bit */
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writel(HA_ERATT, phba->HAregaddr);
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readl(phba->HAregaddr); /* flush */
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phba->pport->stopped = 1;
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return;
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return 0;
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}
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@ -1224,7 +1224,10 @@ lpfc_poll_store(struct device *dev, struct device_attribute *attr,
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if (val & ENABLE_FCP_RING_POLLING) {
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if ((val & DISABLE_FCP_RING_INT) &&
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!(old_val & DISABLE_FCP_RING_INT)) {
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creg_val = readl(phba->HCregaddr);
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if (lpfc_readl(phba->HCregaddr, &creg_val)) {
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spin_unlock_irq(&phba->hbalock);
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return -EINVAL;
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}
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creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
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writel(creg_val, phba->HCregaddr);
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readl(phba->HCregaddr); /* flush */
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@ -1242,7 +1245,10 @@ lpfc_poll_store(struct device *dev, struct device_attribute *attr,
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spin_unlock_irq(&phba->hbalock);
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del_timer(&phba->fcp_poll_timer);
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spin_lock_irq(&phba->hbalock);
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creg_val = readl(phba->HCregaddr);
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if (lpfc_readl(phba->HCregaddr, &creg_val)) {
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spin_unlock_irq(&phba->hbalock);
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return -EINVAL;
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}
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creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
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writel(creg_val, phba->HCregaddr);
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readl(phba->HCregaddr); /* flush */
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@ -348,7 +348,10 @@ lpfc_bsg_send_mgmt_cmd(struct fc_bsg_job *job)
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dd_data->context_un.iocb.bmp = bmp;
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if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
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creg_val = readl(phba->HCregaddr);
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if (lpfc_readl(phba->HCregaddr, &creg_val)) {
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rc = -EIO ;
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goto free_cmdiocbq;
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}
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creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
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writel(creg_val, phba->HCregaddr);
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readl(phba->HCregaddr); /* flush */
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@ -599,7 +602,10 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)
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dd_data->context_un.iocb.ndlp = ndlp;
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if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
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creg_val = readl(phba->HCregaddr);
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if (lpfc_readl(phba->HCregaddr, &creg_val)) {
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rc = -EIO;
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goto linkdown_err;
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}
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creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
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writel(creg_val, phba->HCregaddr);
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readl(phba->HCregaddr); /* flush */
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@ -613,6 +619,7 @@ lpfc_bsg_rport_els(struct fc_bsg_job *job)
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else
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rc = -EIO;
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linkdown_err:
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pci_unmap_sg(phba->pcidev, job->request_payload.sg_list,
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job->request_payload.sg_cnt, DMA_TO_DEVICE);
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pci_unmap_sg(phba->pcidev, job->reply_payload.sg_list,
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@ -1357,7 +1364,10 @@ lpfc_issue_ct_rsp(struct lpfc_hba *phba, struct fc_bsg_job *job, uint32_t tag,
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dd_data->context_un.iocb.ndlp = ndlp;
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if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
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creg_val = readl(phba->HCregaddr);
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if (lpfc_readl(phba->HCregaddr, &creg_val)) {
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rc = -IOCB_ERROR;
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goto issue_ct_rsp_exit;
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}
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creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
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writel(creg_val, phba->HCregaddr);
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readl(phba->HCregaddr); /* flush */
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@ -89,7 +89,8 @@ lpfc_els_chk_latt(struct lpfc_vport *vport)
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return 0;
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/* Read the HBA Host Attention Register */
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ha_copy = readl(phba->HAregaddr);
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if (lpfc_readl(phba->HAregaddr, &ha_copy))
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return 1;
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if (!(ha_copy & HA_LATT))
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return 0;
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@ -1344,7 +1344,7 @@ typedef struct { /* FireFly BIU registers */
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#define HS_FFER1 0x80000000 /* Bit 31 */
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#define HS_CRIT_TEMP 0x00000100 /* Bit 8 */
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#define HS_FFERM 0xFF000100 /* Mask for error bits 31:24 and 8 */
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#define UNPLUG_ERR 0x00000001 /* Indicate pci hot unplug */
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/* Host Control Register */
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#define HC_REG_OFFSET 12 /* Byte offset from register base address */
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@ -507,7 +507,10 @@ lpfc_config_port_post(struct lpfc_hba *phba)
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phba->hba_flag &= ~HBA_ERATT_HANDLED;
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/* Enable appropriate host interrupts */
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status = readl(phba->HCregaddr);
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if (lpfc_readl(phba->HCregaddr, &status)) {
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spin_unlock_irq(&phba->hbalock);
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return -EIO;
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}
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status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
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if (psli->num_rings > 0)
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status |= HC_R0INT_ENA;
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@ -1222,7 +1225,10 @@ lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
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/* Wait for the ER1 bit to clear.*/
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while (phba->work_hs & HS_FFER1) {
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msleep(100);
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phba->work_hs = readl(phba->HSregaddr);
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if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
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phba->work_hs = UNPLUG_ERR ;
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break;
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}
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/* If driver is unloading let the worker thread continue */
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if (phba->pport->load_flag & FC_UNLOADING) {
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phba->work_hs = 0;
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@ -5386,13 +5392,16 @@ lpfc_sli4_post_status_check(struct lpfc_hba *phba)
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int i, port_error = 0;
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uint32_t if_type;
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memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
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memset(®_data, 0, sizeof(reg_data));
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if (!phba->sli4_hba.PSMPHRregaddr)
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return -ENODEV;
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/* Wait up to 30 seconds for the SLI Port POST done and ready */
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for (i = 0; i < 3000; i++) {
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portsmphr_reg.word0 = readl(phba->sli4_hba.PSMPHRregaddr);
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if (bf_get(lpfc_port_smphr_perr, &portsmphr_reg)) {
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if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
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&portsmphr_reg.word0) ||
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(bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
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/* Port has a fatal POST error, break out */
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port_error = -ENODEV;
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break;
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@ -5473,9 +5482,9 @@ lpfc_sli4_post_status_check(struct lpfc_hba *phba)
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break;
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case LPFC_SLI_INTF_IF_TYPE_2:
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/* Final checks. The port status should be clean. */
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reg_data.word0 =
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readl(phba->sli4_hba.u.if_type2.STATUSregaddr);
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if (bf_get(lpfc_sliport_status_err, ®_data)) {
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if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
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®_data.word0) ||
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bf_get(lpfc_sliport_status_err, ®_data)) {
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phba->work_status[0] =
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readl(phba->sli4_hba.u.if_type2.
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ERR1regaddr);
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@ -6761,9 +6770,11 @@ lpfc_pci_function_reset(struct lpfc_hba *phba)
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* the loop again.
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*/
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for (rdy_chk = 0; rdy_chk < 1000; rdy_chk++) {
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reg_data.word0 =
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readl(phba->sli4_hba.u.if_type2.
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STATUSregaddr);
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if (lpfc_readl(phba->sli4_hba.u.if_type2.
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STATUSregaddr, ®_data.word0)) {
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rc = -ENODEV;
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break;
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}
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if (bf_get(lpfc_sliport_status_rdy, ®_data))
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break;
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if (bf_get(lpfc_sliport_status_rn, ®_data)) {
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@ -6784,8 +6795,11 @@ lpfc_pci_function_reset(struct lpfc_hba *phba)
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}
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/* Detect any port errors. */
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reg_data.word0 = readl(phba->sli4_hba.u.if_type2.
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STATUSregaddr);
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if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
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®_data.word0)) {
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rc = -ENODEV;
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break;
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}
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if ((bf_get(lpfc_sliport_status_err, ®_data)) ||
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(rdy_chk >= 1000)) {
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phba->work_status[0] = readl(
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@ -3477,7 +3477,8 @@ lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
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int retval = 0;
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/* Read the HBA Host Status Register */
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status = readl(phba->HSregaddr);
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if (lpfc_readl(phba->HSregaddr, &status))
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return 1;
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/*
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* Check status register every 100ms for 5 retries, then every
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@ -3502,7 +3503,10 @@ lpfc_sli_brdready_s3(struct lpfc_hba *phba, uint32_t mask)
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lpfc_sli_brdrestart(phba);
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}
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/* Read the HBA Host Status Register */
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status = readl(phba->HSregaddr);
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if (lpfc_readl(phba->HSregaddr, &status)) {
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retval = 1;
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break;
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}
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}
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/* Check to see if any errors occurred during init */
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@ -3584,7 +3588,7 @@ void lpfc_reset_barrier(struct lpfc_hba *phba)
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uint32_t __iomem *resp_buf;
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uint32_t __iomem *mbox_buf;
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volatile uint32_t mbox;
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uint32_t hc_copy;
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uint32_t hc_copy, ha_copy, resp_data;
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int i;
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uint8_t hdrtype;
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@ -3601,12 +3605,15 @@ void lpfc_reset_barrier(struct lpfc_hba *phba)
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resp_buf = phba->MBslimaddr;
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/* Disable the error attention */
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hc_copy = readl(phba->HCregaddr);
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if (lpfc_readl(phba->HCregaddr, &hc_copy))
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return;
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writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
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readl(phba->HCregaddr); /* flush */
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phba->link_flag |= LS_IGNORE_ERATT;
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if (readl(phba->HAregaddr) & HA_ERATT) {
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if (lpfc_readl(phba->HAregaddr, &ha_copy))
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return;
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if (ha_copy & HA_ERATT) {
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/* Clear Chip error bit */
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writel(HA_ERATT, phba->HAregaddr);
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phba->pport->stopped = 1;
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@ -3620,11 +3627,18 @@ void lpfc_reset_barrier(struct lpfc_hba *phba)
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mbox_buf = phba->MBslimaddr;
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writel(mbox, mbox_buf);
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for (i = 0;
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readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
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mdelay(1);
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if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
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for (i = 0; i < 50; i++) {
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if (lpfc_readl((resp_buf + 1), &resp_data))
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return;
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if (resp_data != ~(BARRIER_TEST_PATTERN))
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mdelay(1);
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else
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break;
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}
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resp_data = 0;
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if (lpfc_readl((resp_buf + 1), &resp_data))
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return;
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if (resp_data != ~(BARRIER_TEST_PATTERN)) {
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if (phba->sli.sli_flag & LPFC_SLI_ACTIVE ||
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phba->pport->stopped)
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goto restore_hc;
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@ -3633,13 +3647,26 @@ void lpfc_reset_barrier(struct lpfc_hba *phba)
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}
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((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
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for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
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mdelay(1);
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resp_data = 0;
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for (i = 0; i < 500; i++) {
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if (lpfc_readl(resp_buf, &resp_data))
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return;
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if (resp_data != mbox)
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mdelay(1);
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else
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break;
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}
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clear_errat:
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while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
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mdelay(1);
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while (++i < 500) {
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if (lpfc_readl(phba->HAregaddr, &ha_copy))
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return;
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if (!(ha_copy & HA_ERATT))
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mdelay(1);
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else
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break;
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}
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if (readl(phba->HAregaddr) & HA_ERATT) {
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writel(HA_ERATT, phba->HAregaddr);
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@ -3686,7 +3713,11 @@ lpfc_sli_brdkill(struct lpfc_hba *phba)
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/* Disable the error attention */
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spin_lock_irq(&phba->hbalock);
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status = readl(phba->HCregaddr);
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if (lpfc_readl(phba->HCregaddr, &status)) {
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spin_unlock_irq(&phba->hbalock);
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mempool_free(pmb, phba->mbox_mem_pool);
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return 1;
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}
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status &= ~HC_ERINT_ENA;
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writel(status, phba->HCregaddr);
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readl(phba->HCregaddr); /* flush */
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@ -3720,11 +3751,12 @@ lpfc_sli_brdkill(struct lpfc_hba *phba)
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* 3 seconds we still set HBA_ERROR state because the status of the
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* board is now undefined.
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*/
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ha_copy = readl(phba->HAregaddr);
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if (lpfc_readl(phba->HAregaddr, &ha_copy))
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return 1;
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while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
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mdelay(100);
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ha_copy = readl(phba->HAregaddr);
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if (lpfc_readl(phba->HAregaddr, &ha_copy))
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return 1;
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}
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del_timer_sync(&psli->mbox_tmo);
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@ -4018,7 +4050,8 @@ lpfc_sli_chipset_init(struct lpfc_hba *phba)
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uint32_t status, i = 0;
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/* Read the HBA Host Status Register */
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status = readl(phba->HSregaddr);
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if (lpfc_readl(phba->HSregaddr, &status))
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return -EIO;
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/* Check status register to see what current state is */
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i = 0;
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@ -4073,7 +4106,8 @@ lpfc_sli_chipset_init(struct lpfc_hba *phba)
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lpfc_sli_brdrestart(phba);
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}
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/* Read the HBA Host Status Register */
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status = readl(phba->HSregaddr);
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if (lpfc_readl(phba->HSregaddr, &status))
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return -EIO;
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}
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/* Check to see if any errors occurred during init */
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@ -5136,7 +5170,7 @@ lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
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MAILBOX_t *mb;
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struct lpfc_sli *psli = &phba->sli;
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uint32_t status, evtctr;
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uint32_t ha_copy;
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uint32_t ha_copy, hc_copy;
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int i;
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||||
unsigned long timeout;
|
||||
unsigned long drvr_flag = 0;
|
||||
|
|
@ -5202,15 +5236,17 @@ lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
|
|||
goto out_not_finished;
|
||||
}
|
||||
|
||||
if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
|
||||
!(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
|
||||
spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
|
||||
lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
|
||||
if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT) {
|
||||
if (lpfc_readl(phba->HCregaddr, &hc_copy) ||
|
||||
!(hc_copy & HC_MBINT_ENA)) {
|
||||
spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
|
||||
lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
|
||||
"(%d):2528 Mailbox command x%x cannot "
|
||||
"issue Data: x%x x%x\n",
|
||||
pmbox->vport ? pmbox->vport->vpi : 0,
|
||||
pmbox->u.mb.mbxCommand, psli->sli_flag, flag);
|
||||
goto out_not_finished;
|
||||
goto out_not_finished;
|
||||
}
|
||||
}
|
||||
|
||||
if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
|
||||
|
|
@ -5408,11 +5444,19 @@ lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
|
|||
word0 = le32_to_cpu(word0);
|
||||
} else {
|
||||
/* First read mbox status word */
|
||||
word0 = readl(phba->MBslimaddr);
|
||||
if (lpfc_readl(phba->MBslimaddr, &word0)) {
|
||||
spin_unlock_irqrestore(&phba->hbalock,
|
||||
drvr_flag);
|
||||
goto out_not_finished;
|
||||
}
|
||||
}
|
||||
|
||||
/* Read the HBA Host Attention Register */
|
||||
ha_copy = readl(phba->HAregaddr);
|
||||
if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
|
||||
spin_unlock_irqrestore(&phba->hbalock,
|
||||
drvr_flag);
|
||||
goto out_not_finished;
|
||||
}
|
||||
timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba,
|
||||
mb->mbxCommand) *
|
||||
1000) + jiffies;
|
||||
|
|
@ -5463,7 +5507,11 @@ lpfc_sli_issue_mbox_s3(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox,
|
|||
word0 = readl(phba->MBslimaddr);
|
||||
}
|
||||
/* Read the HBA Host Attention Register */
|
||||
ha_copy = readl(phba->HAregaddr);
|
||||
if (lpfc_readl(phba->HAregaddr, &ha_copy)) {
|
||||
spin_unlock_irqrestore(&phba->hbalock,
|
||||
drvr_flag);
|
||||
goto out_not_finished;
|
||||
}
|
||||
}
|
||||
|
||||
if (psli->sli_flag & LPFC_SLI_ACTIVE) {
|
||||
|
|
@ -8194,7 +8242,8 @@ lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
|
|||
piocb->iocb_flag &= ~LPFC_IO_WAKE;
|
||||
|
||||
if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
|
||||
creg_val = readl(phba->HCregaddr);
|
||||
if (lpfc_readl(phba->HCregaddr, &creg_val))
|
||||
return IOCB_ERROR;
|
||||
creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
|
||||
writel(creg_val, phba->HCregaddr);
|
||||
readl(phba->HCregaddr); /* flush */
|
||||
|
|
@ -8236,7 +8285,8 @@ lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
|
|||
}
|
||||
|
||||
if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
|
||||
creg_val = readl(phba->HCregaddr);
|
||||
if (lpfc_readl(phba->HCregaddr, &creg_val))
|
||||
return IOCB_ERROR;
|
||||
creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
|
||||
writel(creg_val, phba->HCregaddr);
|
||||
readl(phba->HCregaddr); /* flush */
|
||||
|
|
@ -8387,10 +8437,13 @@ lpfc_sli_eratt_read(struct lpfc_hba *phba)
|
|||
uint32_t ha_copy;
|
||||
|
||||
/* Read chip Host Attention (HA) register */
|
||||
ha_copy = readl(phba->HAregaddr);
|
||||
if (lpfc_readl(phba->HAregaddr, &ha_copy))
|
||||
goto unplug_err;
|
||||
|
||||
if (ha_copy & HA_ERATT) {
|
||||
/* Read host status register to retrieve error event */
|
||||
lpfc_sli_read_hs(phba);
|
||||
if (lpfc_sli_read_hs(phba))
|
||||
goto unplug_err;
|
||||
|
||||
/* Check if there is a deferred error condition is active */
|
||||
if ((HS_FFER1 & phba->work_hs) &&
|
||||
|
|
@ -8409,6 +8462,15 @@ lpfc_sli_eratt_read(struct lpfc_hba *phba)
|
|||
return 1;
|
||||
}
|
||||
return 0;
|
||||
|
||||
unplug_err:
|
||||
/* Set the driver HS work bitmap */
|
||||
phba->work_hs |= UNPLUG_ERR;
|
||||
/* Set the driver HA work bitmap */
|
||||
phba->work_ha |= HA_ERATT;
|
||||
/* Indicate polling handles this ERATT */
|
||||
phba->hba_flag |= HBA_ERATT_HANDLED;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -8436,8 +8498,15 @@ lpfc_sli4_eratt_read(struct lpfc_hba *phba)
|
|||
if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
|
||||
switch (if_type) {
|
||||
case LPFC_SLI_INTF_IF_TYPE_0:
|
||||
uerr_sta_lo = readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
|
||||
uerr_sta_hi = readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
|
||||
if (lpfc_readl(phba->sli4_hba.u.if_type0.UERRLOregaddr,
|
||||
&uerr_sta_lo) ||
|
||||
lpfc_readl(phba->sli4_hba.u.if_type0.UERRHIregaddr,
|
||||
&uerr_sta_hi)) {
|
||||
phba->work_hs |= UNPLUG_ERR;
|
||||
phba->work_ha |= HA_ERATT;
|
||||
phba->hba_flag |= HBA_ERATT_HANDLED;
|
||||
return 1;
|
||||
}
|
||||
if ((~phba->sli4_hba.ue_mask_lo & uerr_sta_lo) ||
|
||||
(~phba->sli4_hba.ue_mask_hi & uerr_sta_hi)) {
|
||||
lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
|
||||
|
|
@ -8456,9 +8525,15 @@ lpfc_sli4_eratt_read(struct lpfc_hba *phba)
|
|||
}
|
||||
break;
|
||||
case LPFC_SLI_INTF_IF_TYPE_2:
|
||||
portstat_reg.word0 =
|
||||
readl(phba->sli4_hba.u.if_type2.STATUSregaddr);
|
||||
portsmphr = readl(phba->sli4_hba.PSMPHRregaddr);
|
||||
if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
|
||||
&portstat_reg.word0) ||
|
||||
lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
|
||||
&portsmphr)){
|
||||
phba->work_hs |= UNPLUG_ERR;
|
||||
phba->work_ha |= HA_ERATT;
|
||||
phba->hba_flag |= HBA_ERATT_HANDLED;
|
||||
return 1;
|
||||
}
|
||||
if (bf_get(lpfc_sliport_status_err, &portstat_reg)) {
|
||||
phba->work_status[0] =
|
||||
readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
|
||||
|
|
@ -8639,7 +8714,8 @@ lpfc_sli_sp_intr_handler(int irq, void *dev_id)
|
|||
return IRQ_NONE;
|
||||
/* Need to read HA REG for slow-path events */
|
||||
spin_lock_irqsave(&phba->hbalock, iflag);
|
||||
ha_copy = readl(phba->HAregaddr);
|
||||
if (lpfc_readl(phba->HAregaddr, &ha_copy))
|
||||
goto unplug_error;
|
||||
/* If somebody is waiting to handle an eratt don't process it
|
||||
* here. The brdkill function will do this.
|
||||
*/
|
||||
|
|
@ -8665,7 +8741,9 @@ lpfc_sli_sp_intr_handler(int irq, void *dev_id)
|
|||
}
|
||||
|
||||
/* Clear up only attention source related to slow-path */
|
||||
hc_copy = readl(phba->HCregaddr);
|
||||
if (lpfc_readl(phba->HCregaddr, &hc_copy))
|
||||
goto unplug_error;
|
||||
|
||||
writel(hc_copy & ~(HC_MBINT_ENA | HC_R2INT_ENA |
|
||||
HC_LAINT_ENA | HC_ERINT_ENA),
|
||||
phba->HCregaddr);
|
||||
|
|
@ -8688,7 +8766,8 @@ lpfc_sli_sp_intr_handler(int irq, void *dev_id)
|
|||
*/
|
||||
spin_lock_irqsave(&phba->hbalock, iflag);
|
||||
phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
|
||||
control = readl(phba->HCregaddr);
|
||||
if (lpfc_readl(phba->HCregaddr, &control))
|
||||
goto unplug_error;
|
||||
control &= ~HC_LAINT_ENA;
|
||||
writel(control, phba->HCregaddr);
|
||||
readl(phba->HCregaddr); /* flush */
|
||||
|
|
@ -8708,7 +8787,8 @@ lpfc_sli_sp_intr_handler(int irq, void *dev_id)
|
|||
status >>= (4*LPFC_ELS_RING);
|
||||
if (status & HA_RXMASK) {
|
||||
spin_lock_irqsave(&phba->hbalock, iflag);
|
||||
control = readl(phba->HCregaddr);
|
||||
if (lpfc_readl(phba->HCregaddr, &control))
|
||||
goto unplug_error;
|
||||
|
||||
lpfc_debugfs_slow_ring_trc(phba,
|
||||
"ISR slow ring: ctl:x%x stat:x%x isrcnt:x%x",
|
||||
|
|
@ -8741,7 +8821,8 @@ lpfc_sli_sp_intr_handler(int irq, void *dev_id)
|
|||
}
|
||||
spin_lock_irqsave(&phba->hbalock, iflag);
|
||||
if (work_ha_copy & HA_ERATT) {
|
||||
lpfc_sli_read_hs(phba);
|
||||
if (lpfc_sli_read_hs(phba))
|
||||
goto unplug_error;
|
||||
/*
|
||||
* Check if there is a deferred error condition
|
||||
* is active
|
||||
|
|
@ -8872,6 +8953,9 @@ send_current_mbox:
|
|||
lpfc_worker_wake_up(phba);
|
||||
}
|
||||
return IRQ_HANDLED;
|
||||
unplug_error:
|
||||
spin_unlock_irqrestore(&phba->hbalock, iflag);
|
||||
return IRQ_HANDLED;
|
||||
|
||||
} /* lpfc_sli_sp_intr_handler */
|
||||
|
||||
|
|
@ -8919,7 +9003,8 @@ lpfc_sli_fp_intr_handler(int irq, void *dev_id)
|
|||
if (lpfc_intr_state_check(phba))
|
||||
return IRQ_NONE;
|
||||
/* Need to read HA REG for FCP ring and other ring events */
|
||||
ha_copy = readl(phba->HAregaddr);
|
||||
if (lpfc_readl(phba->HAregaddr, &ha_copy))
|
||||
return IRQ_HANDLED;
|
||||
/* Clear up only attention source related to fast-path */
|
||||
spin_lock_irqsave(&phba->hbalock, iflag);
|
||||
/*
|
||||
|
|
@ -9004,7 +9089,11 @@ lpfc_sli_intr_handler(int irq, void *dev_id)
|
|||
return IRQ_NONE;
|
||||
|
||||
spin_lock(&phba->hbalock);
|
||||
phba->ha_copy = readl(phba->HAregaddr);
|
||||
if (lpfc_readl(phba->HAregaddr, &phba->ha_copy)) {
|
||||
spin_unlock(&phba->hbalock);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
if (unlikely(!phba->ha_copy)) {
|
||||
spin_unlock(&phba->hbalock);
|
||||
return IRQ_NONE;
|
||||
|
|
@ -9026,7 +9115,10 @@ lpfc_sli_intr_handler(int irq, void *dev_id)
|
|||
}
|
||||
|
||||
/* Clear attention sources except link and error attentions */
|
||||
hc_copy = readl(phba->HCregaddr);
|
||||
if (lpfc_readl(phba->HCregaddr, &hc_copy)) {
|
||||
spin_unlock(&phba->hbalock);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
writel(hc_copy & ~(HC_MBINT_ENA | HC_R0INT_ENA | HC_R1INT_ENA
|
||||
| HC_R2INT_ENA | HC_LAINT_ENA | HC_ERINT_ENA),
|
||||
phba->HCregaddr);
|
||||
|
|
|
|||
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