ASoC: ad1938: use soc-cache framework for codec registers access
Signed-off-by: Barry Song <Barry.Song@analog.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Barry Song
Mark Brown
Родитель
63b62ab0d5
Коммит
994dc4245d
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@ -46,6 +46,11 @@ struct ad1938_priv {
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u8 reg_cache[AD1938_NUM_REGS];
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};
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/* ad1938 register cache & default register settings */
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static const u8 ad1938_reg[AD1938_NUM_REGS] = {
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0, 0, 0, 0, 0, 0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0, 0, 0,
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};
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static struct snd_soc_codec *ad1938_codec;
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struct snd_soc_codec_device soc_codec_dev_ad1938;
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static int ad1938_register(struct ad1938_priv *ad1938);
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@ -129,10 +134,10 @@ static int ad1938_mute(struct snd_soc_dai *dai, int mute)
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struct snd_soc_codec *codec = dai->codec;
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int reg;
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reg = codec->read(codec, AD1938_DAC_CTRL2);
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reg = snd_soc_read(codec, AD1938_DAC_CTRL2);
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reg = (mute > 0) ? reg | AD1938_DAC_MASTER_MUTE : reg &
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(~AD1938_DAC_MASTER_MUTE);
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codec->write(codec, AD1938_DAC_CTRL2, reg);
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snd_soc_write(codec, AD1938_DAC_CTRL2, reg);
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return 0;
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}
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@ -141,8 +146,8 @@ static int ad1938_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
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unsigned int rx_mask, int slots, int width)
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{
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struct snd_soc_codec *codec = dai->codec;
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int dac_reg = codec->read(codec, AD1938_DAC_CTRL1);
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int adc_reg = codec->read(codec, AD1938_ADC_CTRL2);
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int dac_reg = snd_soc_read(codec, AD1938_DAC_CTRL1);
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int adc_reg = snd_soc_read(codec, AD1938_ADC_CTRL2);
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dac_reg &= ~AD1938_DAC_CHAN_MASK;
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adc_reg &= ~AD1938_ADC_CHAN_MASK;
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@ -168,8 +173,8 @@ static int ad1938_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
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return -EINVAL;
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}
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codec->write(codec, AD1938_DAC_CTRL1, dac_reg);
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codec->write(codec, AD1938_ADC_CTRL2, adc_reg);
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snd_soc_write(codec, AD1938_DAC_CTRL1, dac_reg);
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snd_soc_write(codec, AD1938_ADC_CTRL2, adc_reg);
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return 0;
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}
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@ -180,8 +185,8 @@ static int ad1938_set_dai_fmt(struct snd_soc_dai *codec_dai,
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struct snd_soc_codec *codec = codec_dai->codec;
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int adc_reg, dac_reg;
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adc_reg = codec->read(codec, AD1938_ADC_CTRL2);
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dac_reg = codec->read(codec, AD1938_DAC_CTRL1);
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adc_reg = snd_soc_read(codec, AD1938_ADC_CTRL2);
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dac_reg = snd_soc_read(codec, AD1938_DAC_CTRL1);
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/* At present, the driver only support AUX ADC mode(SND_SOC_DAIFMT_I2S
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* with TDM) and ADC&DAC TDM mode(SND_SOC_DAIFMT_DSP_A)
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@ -258,8 +263,8 @@ static int ad1938_set_dai_fmt(struct snd_soc_dai *codec_dai,
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return -EINVAL;
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}
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codec->write(codec, AD1938_ADC_CTRL2, adc_reg);
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codec->write(codec, AD1938_DAC_CTRL1, dac_reg);
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snd_soc_write(codec, AD1938_ADC_CTRL2, adc_reg);
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snd_soc_write(codec, AD1938_DAC_CTRL1, dac_reg);
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return 0;
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}
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@ -288,116 +293,13 @@ static int ad1938_hw_params(struct snd_pcm_substream *substream,
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break;
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}
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reg = codec->read(codec, AD1938_DAC_CTRL2);
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reg = snd_soc_read(codec, AD1938_DAC_CTRL2);
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reg = (reg & (~AD1938_DAC_WORD_LEN_MASK)) | word_len;
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codec->write(codec, AD1938_DAC_CTRL2, reg);
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snd_soc_write(codec, AD1938_DAC_CTRL2, reg);
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reg = codec->read(codec, AD1938_ADC_CTRL1);
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reg = snd_soc_read(codec, AD1938_ADC_CTRL1);
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reg = (reg & (~AD1938_ADC_WORD_LEN_MASK)) | word_len;
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codec->write(codec, AD1938_ADC_CTRL1, reg);
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return 0;
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}
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/*
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* interface to read/write ad1938 register
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*/
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#define AD1938_SPI_ADDR 0x4
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#define AD1938_SPI_READ 0x1
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#define AD1938_SPI_BUFLEN 3
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/*
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* write to the ad1938 register space
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*/
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static int ad1938_write_reg(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u8 *reg_cache = codec->reg_cache;
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int ret = 0;
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if (value != reg_cache[reg]) {
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uint8_t buf[AD1938_SPI_BUFLEN];
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struct spi_transfer t = {
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.tx_buf = buf,
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.len = AD1938_SPI_BUFLEN,
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};
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struct spi_message m;
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buf[0] = AD1938_SPI_ADDR << 1;
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buf[1] = reg;
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buf[2] = value;
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spi_message_init(&m);
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spi_message_add_tail(&t, &m);
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ret = spi_sync(codec->control_data, &m);
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if (ret == 0)
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reg_cache[reg] = value;
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}
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return ret;
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}
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/*
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* read from the ad1938 register space cache
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*/
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static unsigned int ad1938_read_reg_cache(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u8 *reg_cache = codec->reg_cache;
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if (reg >= codec->reg_cache_size)
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return -EINVAL;
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return reg_cache[reg];
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}
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/*
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* read from the ad1938 register space
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*/
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static unsigned int ad1938_read_reg(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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char w_buf[AD1938_SPI_BUFLEN];
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char r_buf[AD1938_SPI_BUFLEN];
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int ret;
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struct spi_transfer t = {
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.tx_buf = w_buf,
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.rx_buf = r_buf,
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.len = AD1938_SPI_BUFLEN,
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};
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struct spi_message m;
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w_buf[0] = (AD1938_SPI_ADDR << 1) | AD1938_SPI_READ;
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w_buf[1] = reg;
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w_buf[2] = 0;
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spi_message_init(&m);
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spi_message_add_tail(&t, &m);
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ret = spi_sync(codec->control_data, &m);
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if (ret == 0)
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return r_buf[2];
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else
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return -EIO;
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}
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static int ad1938_fill_cache(struct snd_soc_codec *codec)
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{
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int i;
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u8 *reg_cache = codec->reg_cache;
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struct spi_device *spi = codec->control_data;
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for (i = 0; i < codec->reg_cache_size; i++) {
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int ret = ad1938_read_reg(codec, i);
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if (ret == -EIO) {
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dev_err(&spi->dev, "AD1938 SPI read failure\n");
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return ret;
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}
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reg_cache[i] = ret;
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}
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snd_soc_write(codec, AD1938_ADC_CTRL1, reg);
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return 0;
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}
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@ -487,31 +389,37 @@ static int ad1938_register(struct ad1938_priv *ad1938)
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codec->owner = THIS_MODULE;
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codec->dai = &ad1938_dai;
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codec->num_dai = 1;
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codec->write = ad1938_write_reg;
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codec->read = ad1938_read_reg_cache;
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INIT_LIST_HEAD(&codec->dapm_widgets);
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INIT_LIST_HEAD(&codec->dapm_paths);
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ad1938_dai.dev = codec->dev;
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ad1938_codec = codec;
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memcpy(codec->reg_cache, ad1938_reg, AD1938_NUM_REGS);
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ret = snd_soc_codec_set_cache_io(codec, 16, 8, SND_SOC_SPI);
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if (ret < 0) {
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dev_err(codec->dev, "failed to set cache I/O: %d\n",
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ret);
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kfree(ad1938);
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return ret;
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}
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/* default setting for ad1938 */
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/* unmute dac channels */
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codec->write(codec, AD1938_DAC_CHNL_MUTE, 0x0);
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snd_soc_write(codec, AD1938_DAC_CHNL_MUTE, 0x0);
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/* de-emphasis: 48kHz, powedown dac */
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codec->write(codec, AD1938_DAC_CTRL2, 0x1A);
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snd_soc_write(codec, AD1938_DAC_CTRL2, 0x1A);
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/* powerdown dac, dac in tdm mode */
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codec->write(codec, AD1938_DAC_CTRL0, 0x41);
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snd_soc_write(codec, AD1938_DAC_CTRL0, 0x41);
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/* high-pass filter enable */
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codec->write(codec, AD1938_ADC_CTRL0, 0x3);
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snd_soc_write(codec, AD1938_ADC_CTRL0, 0x3);
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/* sata delay=1, adc aux mode */
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codec->write(codec, AD1938_ADC_CTRL1, 0x43);
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snd_soc_write(codec, AD1938_ADC_CTRL1, 0x43);
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/* pll input: mclki/xi */
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codec->write(codec, AD1938_PLL_CLK_CTRL0, 0x9D);
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codec->write(codec, AD1938_PLL_CLK_CTRL1, 0x04);
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ad1938_fill_cache(codec);
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snd_soc_write(codec, AD1938_PLL_CLK_CTRL0, 0x9D);
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snd_soc_write(codec, AD1938_PLL_CLK_CTRL1, 0x04);
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ret = snd_soc_register_codec(codec);
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if (ret != 0) {
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@ -233,6 +233,108 @@ static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
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#define snd_soc_8_16_read_i2c NULL
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#endif
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#if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
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static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
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unsigned int r)
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{
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struct i2c_msg xfer[2];
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u16 reg = r;
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u8 data;
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int ret;
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struct i2c_client *client = codec->control_data;
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/* Write register */
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xfer[0].addr = client->addr;
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xfer[0].flags = 0;
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xfer[0].len = 2;
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xfer[0].buf = (u8 *)®
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/* Read data */
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xfer[1].addr = client->addr;
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xfer[1].flags = I2C_M_RD;
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xfer[1].len = 1;
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xfer[1].buf = &data;
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ret = i2c_transfer(client->adapter, xfer, 2);
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if (ret != 2) {
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dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
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return 0;
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}
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return data;
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}
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#else
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#define snd_soc_16_8_read_i2c NULL
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#endif
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static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u16 *cache = codec->reg_cache;
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reg &= 0xff;
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if (reg >= codec->reg_cache_size)
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return -1;
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return cache[reg];
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}
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static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u16 *cache = codec->reg_cache;
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u8 data[3];
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int ret;
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BUG_ON(codec->volatile_register);
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data[0] = (reg >> 8) & 0xff;
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data[1] = reg & 0xff;
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data[2] = value;
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reg &= 0xff;
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if (reg < codec->reg_cache_size)
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cache[reg] = value;
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ret = codec->hw_write(codec->control_data, data, 3);
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if (ret == 3)
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return 0;
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if (ret < 0)
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return ret;
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else
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return -EIO;
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}
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#if defined(CONFIG_SPI_MASTER)
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static int snd_soc_16_8_spi_write(void *control_data, const char *data,
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int len)
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{
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struct spi_device *spi = control_data;
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struct spi_transfer t;
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struct spi_message m;
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u8 msg[3];
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if (len <= 0)
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return 0;
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msg[0] = data[0];
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msg[1] = data[1];
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msg[2] = data[2];
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spi_message_init(&m);
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memset(&t, 0, (sizeof t));
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t.tx_buf = &msg[0];
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t.len = len;
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spi_message_add_tail(&t, &m);
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spi_sync(spi, &m);
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return len;
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}
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#else
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#define snd_soc_16_8_spi_write NULL
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#endif
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static struct {
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int addr_bits;
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int data_bits;
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@ -260,6 +362,12 @@ static struct {
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.write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
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.i2c_read = snd_soc_8_16_read_i2c,
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},
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{
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.addr_bits = 16, .data_bits = 8,
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.write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
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.i2c_read = snd_soc_16_8_read_i2c,
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.spi_write = snd_soc_16_8_spi_write,
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},
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};
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/**
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