drm/exynos: Deal with g2d buffer info more efficiently
This patch adds g2d_buf_info structure and buffer relevant variables moves into the g2d_buf_info to manage g2d buffer information more efficiently. Changelog v2: - Fix merge conflict. Signed-off-by: YoungJun Cho <yj44.cho@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This commit is contained in:
YoungJun Cho
Inki Dae
Родитель
f3d2fc4a73
Коммит
9963cb6ef9
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@ -96,8 +96,6 @@
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#define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
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#define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
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#define MAX_BUF_ADDR_NR 6
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/* maximum buffer pool size of userptr is 64MB as default */
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#define MAX_POOL (64 * 1024 * 1024)
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@ -106,6 +104,17 @@ enum {
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BUF_TYPE_USERPTR,
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};
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enum g2d_reg_type {
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REG_TYPE_NONE = -1,
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REG_TYPE_SRC,
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REG_TYPE_SRC_PLANE2,
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REG_TYPE_DST,
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REG_TYPE_DST_PLANE2,
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REG_TYPE_PAT,
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REG_TYPE_MSK,
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MAX_REG_TYPE_NR
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};
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/* cmdlist data structure */
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struct g2d_cmdlist {
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u32 head;
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@ -113,6 +122,22 @@ struct g2d_cmdlist {
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u32 last; /* last data offset */
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};
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/*
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* A structure of buffer information
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*
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* @map_nr: manages the number of mapped buffers
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* @reg_types: stores regitster type in the order of requested command
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* @handles: stores buffer handle in its reg_type position
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* @types: stores buffer type in its reg_type position
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*
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*/
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struct g2d_buf_info {
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unsigned int map_nr;
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enum g2d_reg_type reg_types[MAX_REG_TYPE_NR];
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unsigned long handles[MAX_REG_TYPE_NR];
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unsigned int types[MAX_REG_TYPE_NR];
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};
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struct drm_exynos_pending_g2d_event {
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struct drm_pending_event base;
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struct drm_exynos_g2d_event event;
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@ -134,10 +159,8 @@ struct g2d_cmdlist_userptr {
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struct g2d_cmdlist_node {
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struct list_head list;
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struct g2d_cmdlist *cmdlist;
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unsigned int map_nr;
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unsigned long handles[MAX_BUF_ADDR_NR];
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unsigned int buf_type[MAX_BUF_ADDR_NR];
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dma_addr_t dma_addr;
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struct g2d_buf_info buf_info;
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struct drm_exynos_pending_g2d_event *event;
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};
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@ -187,6 +210,7 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
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struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
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int nr;
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int ret;
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struct g2d_buf_info *buf_info;
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init_dma_attrs(&g2d->cmdlist_dma_attrs);
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dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
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@ -208,11 +232,17 @@ static int g2d_init_cmdlist(struct g2d_data *g2d)
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}
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for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
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unsigned int i;
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node[nr].cmdlist =
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g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
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node[nr].dma_addr =
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g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
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buf_info = &node[nr].buf_info;
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for (i = 0; i < MAX_REG_TYPE_NR; i++)
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buf_info->reg_types[i] = REG_TYPE_NONE;
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list_add_tail(&node[nr].list, &g2d->free_cmdlist);
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}
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@ -507,36 +537,80 @@ static void g2d_userptr_free_all(struct drm_device *drm_dev,
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g2d->current_pool = 0;
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}
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static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
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{
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enum g2d_reg_type reg_type;
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switch (reg_offset) {
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case G2D_SRC_BASE_ADDR:
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reg_type = REG_TYPE_SRC;
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break;
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case G2D_SRC_PLANE2_BASE_ADDR:
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reg_type = REG_TYPE_SRC_PLANE2;
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break;
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case G2D_DST_BASE_ADDR:
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reg_type = REG_TYPE_DST;
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break;
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case G2D_DST_PLANE2_BASE_ADDR:
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reg_type = REG_TYPE_DST_PLANE2;
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break;
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case G2D_PAT_BASE_ADDR:
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reg_type = REG_TYPE_PAT;
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break;
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case G2D_MSK_BASE_ADDR:
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reg_type = REG_TYPE_MSK;
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break;
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default:
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reg_type = REG_TYPE_NONE;
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DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
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break;
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};
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return reg_type;
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}
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static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
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struct g2d_cmdlist_node *node,
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struct drm_device *drm_dev,
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struct drm_file *file)
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{
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struct g2d_cmdlist *cmdlist = node->cmdlist;
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struct g2d_buf_info *buf_info = &node->buf_info;
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int offset;
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int ret;
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int i;
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for (i = 0; i < node->map_nr; i++) {
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for (i = 0; i < buf_info->map_nr; i++) {
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enum g2d_reg_type reg_type;
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int reg_pos;
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unsigned long handle;
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dma_addr_t *addr;
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offset = cmdlist->last - (i * 2 + 1);
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handle = cmdlist->data[offset];
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reg_pos = cmdlist->last - 2 * (i + 1);
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if (node->buf_type[i] == BUF_TYPE_GEM) {
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offset = cmdlist->data[reg_pos];
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handle = cmdlist->data[reg_pos + 1];
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reg_type = g2d_get_reg_type(offset);
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if (reg_type == REG_TYPE_NONE) {
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ret = -EFAULT;
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goto err;
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}
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if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
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addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
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file);
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if (IS_ERR(addr)) {
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node->map_nr = i;
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return -EFAULT;
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ret = -EFAULT;
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goto err;
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}
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} else {
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struct drm_exynos_g2d_userptr g2d_userptr;
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if (copy_from_user(&g2d_userptr, (void __user *)handle,
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sizeof(struct drm_exynos_g2d_userptr))) {
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node->map_nr = i;
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return -EFAULT;
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ret = -EFAULT;
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goto err;
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}
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addr = g2d_userptr_get_dma_addr(drm_dev,
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@ -545,16 +619,21 @@ static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
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file,
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&handle);
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if (IS_ERR(addr)) {
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node->map_nr = i;
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return -EFAULT;
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ret = -EFAULT;
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goto err;
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}
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}
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cmdlist->data[offset] = *addr;
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node->handles[i] = handle;
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cmdlist->data[reg_pos + 1] = *addr;
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buf_info->reg_types[i] = reg_type;
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buf_info->handles[reg_type] = handle;
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}
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return 0;
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err:
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buf_info->map_nr = i;
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return ret;
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}
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static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
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@ -562,23 +641,30 @@ static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
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struct drm_file *filp)
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{
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struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
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struct g2d_buf_info *buf_info = &node->buf_info;
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int i;
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for (i = 0; i < node->map_nr; i++) {
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unsigned long handle = node->handles[i];
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for (i = 0; i < buf_info->map_nr; i++) {
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enum g2d_reg_type reg_type;
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unsigned long handle;
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if (node->buf_type[i] == BUF_TYPE_GEM)
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reg_type = buf_info->reg_types[i];
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handle = buf_info->handles[reg_type];
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if (buf_info->types[reg_type] == BUF_TYPE_GEM)
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exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
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filp);
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else
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g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
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false);
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node->handles[i] = 0;
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node->buf_type[i] = 0;
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buf_info->reg_types[i] = REG_TYPE_NONE;
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buf_info->handles[reg_type] = 0;
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buf_info->types[reg_type] = 0;
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}
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node->map_nr = 0;
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buf_info->map_nr = 0;
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}
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static void g2d_dma_start(struct g2d_data *g2d,
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@ -721,20 +807,12 @@ static int g2d_check_reg_offset(struct device *dev,
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int i;
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for (i = 0; i < nr; i++) {
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struct g2d_buf_info *buf_info = &node->buf_info;
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enum g2d_reg_type reg_type;
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index = cmdlist->last - 2 * (i + 1);
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if (for_addr) {
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/* check userptr buffer type. */
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reg_offset = (cmdlist->data[index] &
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~0x7fffffff) >> 31;
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if (reg_offset) {
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node->buf_type[i] = BUF_TYPE_USERPTR;
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cmdlist->data[index] &= ~G2D_BUF_USERPTR;
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}
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}
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reg_offset = cmdlist->data[index] & ~0xfffff000;
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if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
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goto err;
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if (reg_offset % 4)
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@ -750,8 +828,16 @@ static int g2d_check_reg_offset(struct device *dev,
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if (!for_addr)
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goto err;
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if (node->buf_type[i] != BUF_TYPE_USERPTR)
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node->buf_type[i] = BUF_TYPE_GEM;
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reg_type = g2d_get_reg_type(reg_offset);
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if (reg_type == REG_TYPE_NONE)
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goto err;
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/* check userptr buffer type. */
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if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
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buf_info->types[reg_type] = BUF_TYPE_USERPTR;
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cmdlist->data[index] &= ~G2D_BUF_USERPTR;
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} else
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buf_info->types[reg_type] = BUF_TYPE_GEM;
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break;
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default:
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if (for_addr)
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@ -898,7 +984,7 @@ int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
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if (ret < 0)
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goto err_free_event;
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node->map_nr = req->cmd_buf_nr;
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node->buf_info.map_nr = req->cmd_buf_nr;
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if (req->cmd_buf_nr) {
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struct drm_exynos_g2d_cmd *cmd_buf;
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