mmc: sunxi: Enable the new timings for the A64 MMC controllers
The A64 MMC controllers need to set a "new timings" bit when a new rate is set. The actual meaning of that bit is not clear yet, but not setting it leads to some corner-case issues, like the CMD53 failing, which is used to implement SDIO packet aggregation. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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860fdf89b9
Коммит
9a37e53e45
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@ -253,6 +253,8 @@ struct sunxi_mmc_cfg {
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/* does the IP block support autocalibration? */
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/* does the IP block support autocalibration? */
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bool can_calibrate;
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bool can_calibrate;
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bool needs_new_timings;
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};
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};
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struct sunxi_mmc_host {
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struct sunxi_mmc_host {
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@ -779,6 +781,9 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
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}
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}
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mmc_writel(host, REG_CLKCR, rval);
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mmc_writel(host, REG_CLKCR, rval);
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if (host->cfg->needs_new_timings)
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mmc_writel(host, REG_SD_NTSR, SDXC_2X_TIMING_MODE);
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ret = sunxi_mmc_clk_set_phase(host, ios, rate);
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ret = sunxi_mmc_clk_set_phase(host, ios, rate);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@ -1076,6 +1081,7 @@ static const struct sunxi_mmc_cfg sun50i_a64_cfg = {
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.idma_des_size_bits = 16,
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.idma_des_size_bits = 16,
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.clk_delays = NULL,
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.clk_delays = NULL,
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.can_calibrate = true,
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.can_calibrate = true,
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.needs_new_timings = true,
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};
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};
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static const struct of_device_id sunxi_mmc_of_match[] = {
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static const struct of_device_id sunxi_mmc_of_match[] = {
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