x86: let 32bit use apic_ops too - fix
Fix VMI apic_ops. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Acked-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -145,6 +145,11 @@ static int modern_apic(void)
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return lapic_get_version() >= 0x14;
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}
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/*
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* Paravirt kernels also might be using these below ops. So we still
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* use generic apic_read()/apic_write(), which might be pointing to different
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* ops in PARAVIRT case.
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*/
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void xapic_wait_icr_idle(void)
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{
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while (apic_read(APIC_ICR) & APIC_ICR_BUSY)
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@ -676,50 +676,6 @@ static inline int __init probe_vmi_rom(void)
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return 0;
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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static u32 vmi_apic_read(u32 reg)
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{
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return 0;
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}
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static void vmi_apic_write(u32 reg, u32 val)
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{
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/* Warn to see if there's any stray references */
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WARN_ON(1);
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}
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static u64 vmi_apic_icr_read(void)
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{
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return 0;
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}
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static void vmi_apic_icr_write(u32 low, u32 id)
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{
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/* Warn to see if there's any stray references */
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WARN_ON(1);
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}
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static void vmi_apic_wait_icr_idle(void)
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{
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return;
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}
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static u32 vmi_safe_apic_wait_icr_idle(void)
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{
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return 0;
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}
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static struct apic_ops vmi_basic_apic_ops = {
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.read = vmi_apic_read,
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.write = vmi_apic_write,
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.write_atomic = vmi_apic_write,
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.icr_read = vmi_apic_icr_read,
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.icr_write = vmi_apic_icr_write,
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.wait_icr_idle = vmi_apic_wait_icr_idle,
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.safe_wait_icr_idle = vmi_safe_apic_wait_icr_idle,
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};
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#endif
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/*
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* VMI setup common to all processors
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*/
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@ -948,10 +904,9 @@ static inline int __init activate_vmi(void)
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#endif
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#ifdef CONFIG_X86_LOCAL_APIC
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para_fill(vmi_basic_apic_ops.read, APICRead);
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para_fill(vmi_basic_apic_ops.write, APICWrite);
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para_fill(vmi_basic_apic_ops.write_atomic, APICWrite);
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apic_ops = &vmi_basic_apic_ops;
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para_fill(apic_ops->read, APICRead);
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para_fill(apic_ops->write, APICWrite);
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para_fill(apic_ops->write_atomic, APICWrite);
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#endif
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/*
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