igc: Enable TX via AF_XDP zero-copy
Add support for transmitting packets via AF_XDP zero-copy mechanism. The packet transmission itself is implemented by igc_xdp_xmit_zc() which is called from igc_clean_tx_irq() when the ring has AF_XDP zero-copy enabled. Likewise i40e and ice drivers, the transmission budget used is the number of descriptors available on the ring. A new tx buffer type is introduced to 'enum igc_tx_buffer_type' to indicate the tx buffer uses memory from xsk pool so it can be properly cleaned after transmission or when the ring is cleaned. The I225 controller has only 4 Tx hardware queues so the main difference between igc and other Intel drivers that support AF_XDP zero-copy is that there is no tx ring dedicated exclusively to XDP. Instead, tx rings are shared between the network stack and XDP, and netdev queue lock is used to ensure mutual exclusion. This is the same approach implemented to support XDP_TX and XDP_REDIRECT actions. Signed-off-by: Andre Guedes <andre.guedes@intel.com> Signed-off-by: Vedang Patel <vedang.patel@intel.com> Signed-off-by: Jithu Joseph <jithu.joseph@intel.com> Reviewed-by: Maciej Fijalkowski <maciej.fijalkowski@intel.com> Tested-by: Dvora Fuxbrumer <dvorax.fuxbrumer@linux.intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
This commit is contained in:
Andre Guedes
Tony Nguyen
Родитель
fc9df2a0b5
Коммит
9acf59a752
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@ -258,6 +258,8 @@ int igc_set_spd_dplx(struct igc_adapter *adapter, u32 spd, u8 dplx);
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void igc_update_stats(struct igc_adapter *adapter);
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void igc_disable_rx_ring(struct igc_ring *ring);
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void igc_enable_rx_ring(struct igc_ring *ring);
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void igc_disable_tx_ring(struct igc_ring *ring);
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void igc_enable_tx_ring(struct igc_ring *ring);
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int igc_xsk_wakeup(struct net_device *dev, u32 queue_id, u32 flags);
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/* igc_dump declarations */
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@ -413,6 +415,7 @@ enum igc_boards {
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enum igc_tx_buffer_type {
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IGC_TX_BUFFER_TYPE_SKB,
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IGC_TX_BUFFER_TYPE_XDP,
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IGC_TX_BUFFER_TYPE_XSK,
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};
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/* wrapper around a pointer to a socket buffer,
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@ -78,6 +78,7 @@ union igc_adv_rx_desc {
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/* Additional Transmit Descriptor Control definitions */
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#define IGC_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */
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#define IGC_TXDCTL_SWFLUSH 0x04000000 /* Transmit Software Flush */
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/* Additional Receive Descriptor Control definitions */
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#define IGC_RXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Rx Queue */
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@ -187,24 +187,28 @@ static void igc_clean_tx_ring(struct igc_ring *tx_ring)
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{
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u16 i = tx_ring->next_to_clean;
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struct igc_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
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u32 xsk_frames = 0;
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while (i != tx_ring->next_to_use) {
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union igc_adv_tx_desc *eop_desc, *tx_desc;
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switch (tx_buffer->type) {
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case IGC_TX_BUFFER_TYPE_XSK:
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xsk_frames++;
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break;
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case IGC_TX_BUFFER_TYPE_XDP:
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xdp_return_frame(tx_buffer->xdpf);
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igc_unmap_tx_buffer(tx_ring->dev, tx_buffer);
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break;
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case IGC_TX_BUFFER_TYPE_SKB:
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dev_kfree_skb_any(tx_buffer->skb);
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igc_unmap_tx_buffer(tx_ring->dev, tx_buffer);
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break;
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default:
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netdev_warn_once(tx_ring->netdev, "Unknown Tx buffer type\n");
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break;
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}
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igc_unmap_tx_buffer(tx_ring->dev, tx_buffer);
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/* check for eop_desc to determine the end of the packet */
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eop_desc = tx_buffer->next_to_watch;
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tx_desc = IGC_TX_DESC(tx_ring, i);
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@ -234,6 +238,9 @@ static void igc_clean_tx_ring(struct igc_ring *tx_ring)
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}
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}
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if (tx_ring->xsk_pool && xsk_frames)
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xsk_tx_completed(tx_ring->xsk_pool, xsk_frames);
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/* reset BQL for queue */
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netdev_tx_reset_queue(txring_txq(tx_ring));
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@ -676,6 +683,8 @@ static void igc_configure_tx_ring(struct igc_adapter *adapter,
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u64 tdba = ring->dma;
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u32 txdctl = 0;
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ring->xsk_pool = igc_get_xsk_pool(adapter, ring);
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/* disable the queue */
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wr32(IGC_TXDCTL(reg_idx), 0);
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wrfl();
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@ -2509,6 +2518,65 @@ static void igc_update_tx_stats(struct igc_q_vector *q_vector,
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q_vector->tx.total_packets += packets;
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}
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static void igc_xdp_xmit_zc(struct igc_ring *ring)
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{
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struct xsk_buff_pool *pool = ring->xsk_pool;
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struct netdev_queue *nq = txring_txq(ring);
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union igc_adv_tx_desc *tx_desc = NULL;
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int cpu = smp_processor_id();
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u16 ntu = ring->next_to_use;
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struct xdp_desc xdp_desc;
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u16 budget;
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if (!netif_carrier_ok(ring->netdev))
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return;
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__netif_tx_lock(nq, cpu);
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budget = igc_desc_unused(ring);
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while (xsk_tx_peek_desc(pool, &xdp_desc) && budget--) {
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u32 cmd_type, olinfo_status;
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struct igc_tx_buffer *bi;
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dma_addr_t dma;
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cmd_type = IGC_ADVTXD_DTYP_DATA | IGC_ADVTXD_DCMD_DEXT |
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IGC_ADVTXD_DCMD_IFCS | IGC_TXD_DCMD |
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xdp_desc.len;
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olinfo_status = xdp_desc.len << IGC_ADVTXD_PAYLEN_SHIFT;
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dma = xsk_buff_raw_get_dma(pool, xdp_desc.addr);
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xsk_buff_raw_dma_sync_for_device(pool, dma, xdp_desc.len);
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tx_desc = IGC_TX_DESC(ring, ntu);
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tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
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tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
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tx_desc->read.buffer_addr = cpu_to_le64(dma);
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bi = &ring->tx_buffer_info[ntu];
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bi->type = IGC_TX_BUFFER_TYPE_XSK;
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bi->protocol = 0;
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bi->bytecount = xdp_desc.len;
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bi->gso_segs = 1;
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bi->time_stamp = jiffies;
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bi->next_to_watch = tx_desc;
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netdev_tx_sent_queue(txring_txq(ring), xdp_desc.len);
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ntu++;
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if (ntu == ring->count)
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ntu = 0;
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}
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ring->next_to_use = ntu;
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if (tx_desc) {
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igc_flush_tx_descriptors(ring);
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xsk_tx_release(pool);
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}
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__netif_tx_unlock(nq);
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}
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/**
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* igc_clean_tx_irq - Reclaim resources after transmit completes
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* @q_vector: pointer to q_vector containing needed info
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@ -2525,6 +2593,7 @@ static bool igc_clean_tx_irq(struct igc_q_vector *q_vector, int napi_budget)
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unsigned int i = tx_ring->next_to_clean;
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struct igc_tx_buffer *tx_buffer;
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union igc_adv_tx_desc *tx_desc;
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u32 xsk_frames = 0;
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if (test_bit(__IGC_DOWN, &adapter->state))
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return true;
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@ -2555,19 +2624,22 @@ static bool igc_clean_tx_irq(struct igc_q_vector *q_vector, int napi_budget)
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total_packets += tx_buffer->gso_segs;
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switch (tx_buffer->type) {
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case IGC_TX_BUFFER_TYPE_XSK:
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xsk_frames++;
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break;
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case IGC_TX_BUFFER_TYPE_XDP:
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xdp_return_frame(tx_buffer->xdpf);
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igc_unmap_tx_buffer(tx_ring->dev, tx_buffer);
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break;
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case IGC_TX_BUFFER_TYPE_SKB:
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napi_consume_skb(tx_buffer->skb, napi_budget);
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igc_unmap_tx_buffer(tx_ring->dev, tx_buffer);
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break;
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default:
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netdev_warn_once(tx_ring->netdev, "Unknown Tx buffer type\n");
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break;
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}
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igc_unmap_tx_buffer(tx_ring->dev, tx_buffer);
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/* clear last DMA location and unmap remaining buffers */
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while (tx_desc != eop_desc) {
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tx_buffer++;
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@ -2609,6 +2681,14 @@ static bool igc_clean_tx_irq(struct igc_q_vector *q_vector, int napi_budget)
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igc_update_tx_stats(q_vector, total_packets, total_bytes);
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if (tx_ring->xsk_pool) {
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if (xsk_frames)
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xsk_tx_completed(tx_ring->xsk_pool, xsk_frames);
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if (xsk_uses_need_wakeup(tx_ring->xsk_pool))
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xsk_set_tx_need_wakeup(tx_ring->xsk_pool);
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igc_xdp_xmit_zc(tx_ring);
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}
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if (test_bit(IGC_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
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struct igc_hw *hw = &adapter->hw;
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@ -6336,6 +6416,31 @@ void igc_enable_rx_ring(struct igc_ring *ring)
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igc_alloc_rx_buffers(ring, igc_desc_unused(ring));
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}
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static void igc_disable_tx_ring_hw(struct igc_ring *ring)
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{
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struct igc_hw *hw = &ring->q_vector->adapter->hw;
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u8 idx = ring->reg_idx;
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u32 txdctl;
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txdctl = rd32(IGC_TXDCTL(idx));
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txdctl &= ~IGC_TXDCTL_QUEUE_ENABLE;
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txdctl |= IGC_TXDCTL_SWFLUSH;
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wr32(IGC_TXDCTL(idx), txdctl);
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}
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void igc_disable_tx_ring(struct igc_ring *ring)
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{
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igc_disable_tx_ring_hw(ring);
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igc_clean_tx_ring(ring);
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}
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void igc_enable_tx_ring(struct igc_ring *ring)
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{
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struct igc_adapter *adapter = ring->q_vector->adapter;
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igc_configure_tx_ring(adapter, ring);
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}
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/**
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* igc_init_module - Driver Registration Routine
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*
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@ -39,13 +39,14 @@ static int igc_xdp_enable_pool(struct igc_adapter *adapter,
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{
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struct net_device *ndev = adapter->netdev;
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struct device *dev = &adapter->pdev->dev;
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struct igc_ring *rx_ring;
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struct igc_ring *rx_ring, *tx_ring;
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struct napi_struct *napi;
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bool needs_reset;
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u32 frame_size;
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int err;
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if (queue_id >= adapter->num_rx_queues)
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if (queue_id >= adapter->num_rx_queues ||
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queue_id >= adapter->num_tx_queues)
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return -EINVAL;
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frame_size = xsk_pool_get_rx_frame_size(pool);
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@ -67,18 +68,23 @@ static int igc_xdp_enable_pool(struct igc_adapter *adapter,
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needs_reset = netif_running(adapter->netdev) && igc_xdp_is_enabled(adapter);
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rx_ring = adapter->rx_ring[queue_id];
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tx_ring = adapter->tx_ring[queue_id];
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/* Rx and Tx rings share the same napi context. */
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napi = &rx_ring->q_vector->napi;
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if (needs_reset) {
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igc_disable_rx_ring(rx_ring);
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igc_disable_tx_ring(tx_ring);
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napi_disable(napi);
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}
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set_bit(IGC_RING_FLAG_AF_XDP_ZC, &rx_ring->flags);
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set_bit(IGC_RING_FLAG_AF_XDP_ZC, &tx_ring->flags);
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if (needs_reset) {
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napi_enable(napi);
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igc_enable_rx_ring(rx_ring);
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igc_enable_tx_ring(tx_ring);
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err = igc_xsk_wakeup(ndev, queue_id, XDP_WAKEUP_RX);
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if (err) {
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@ -92,12 +98,13 @@ static int igc_xdp_enable_pool(struct igc_adapter *adapter,
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static int igc_xdp_disable_pool(struct igc_adapter *adapter, u16 queue_id)
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{
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struct igc_ring *rx_ring, *tx_ring;
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struct xsk_buff_pool *pool;
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struct igc_ring *rx_ring;
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struct napi_struct *napi;
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bool needs_reset;
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if (queue_id >= adapter->num_rx_queues)
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if (queue_id >= adapter->num_rx_queues ||
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queue_id >= adapter->num_tx_queues)
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return -EINVAL;
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pool = xsk_get_pool_from_qid(adapter->netdev, queue_id);
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@ -107,19 +114,24 @@ static int igc_xdp_disable_pool(struct igc_adapter *adapter, u16 queue_id)
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needs_reset = netif_running(adapter->netdev) && igc_xdp_is_enabled(adapter);
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rx_ring = adapter->rx_ring[queue_id];
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tx_ring = adapter->tx_ring[queue_id];
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/* Rx and Tx rings share the same napi context. */
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napi = &rx_ring->q_vector->napi;
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if (needs_reset) {
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igc_disable_rx_ring(rx_ring);
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igc_disable_tx_ring(tx_ring);
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napi_disable(napi);
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}
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xsk_pool_dma_unmap(pool, IGC_RX_DMA_ATTR);
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clear_bit(IGC_RING_FLAG_AF_XDP_ZC, &rx_ring->flags);
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clear_bit(IGC_RING_FLAG_AF_XDP_ZC, &tx_ring->flags);
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if (needs_reset) {
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napi_enable(napi);
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igc_enable_rx_ring(rx_ring);
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igc_enable_tx_ring(tx_ring);
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}
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return 0;
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