[SPARC64]: Fix initrd when net booting.
By allocating early memory for the firmware page tables, we can write over the beginning of the initrd image. So what we do now is: 1) Read in firmware translations table while still on the firmware's trap table. 2) Switch to Linux trap table. 3) Init bootmem. 4) Build firmware page tables using __alloc_bootmem(). And this keeps the initrd from being clobbered. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
Родитель
782c3fd470
Коммит
9ad98c5b44
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@ -368,6 +368,7 @@ struct linux_prom_translation {
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unsigned long data;
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};
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static struct linux_prom_translation prom_trans[512] __initdata;
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static unsigned int prom_trans_ents __initdata;
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extern unsigned long prom_boot_page;
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extern void prom_remap(unsigned long physpage, unsigned long virtpage, int mmu_ihandle);
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@ -381,57 +382,7 @@ unsigned long kern_locked_tte_data;
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unsigned long prom_pmd_phys __read_mostly;
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unsigned int swapper_pgd_zero __read_mostly;
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/* Allocate power-of-2 aligned chunks from the end of the
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* kernel image. Return physical address.
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*/
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static inline unsigned long early_alloc_phys(unsigned long size)
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{
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unsigned long base;
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BUILD_BUG_ON(size & (size - 1));
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kern_size = (kern_size + (size - 1)) & ~(size - 1);
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base = kern_base + kern_size;
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kern_size += size;
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return base;
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}
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static inline unsigned long load_phys32(unsigned long pa)
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{
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unsigned long val;
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__asm__ __volatile__("lduwa [%1] %2, %0"
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: "=&r" (val)
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: "r" (pa), "i" (ASI_PHYS_USE_EC));
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return val;
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}
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static inline unsigned long load_phys64(unsigned long pa)
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{
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unsigned long val;
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__asm__ __volatile__("ldxa [%1] %2, %0"
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: "=&r" (val)
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: "r" (pa), "i" (ASI_PHYS_USE_EC));
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return val;
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}
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static inline void store_phys32(unsigned long pa, unsigned long val)
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{
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__asm__ __volatile__("stwa %0, [%1] %2"
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: /* no outputs */
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: "r" (val), "r" (pa), "i" (ASI_PHYS_USE_EC));
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}
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static inline void store_phys64(unsigned long pa, unsigned long val)
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{
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__asm__ __volatile__("stxa %0, [%1] %2"
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: /* no outputs */
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: "r" (val), "r" (pa), "i" (ASI_PHYS_USE_EC));
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}
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static pmd_t *prompmd __read_mostly;
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#define BASE_PAGE_SIZE 8192
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@ -441,34 +392,28 @@ static inline void store_phys64(unsigned long pa, unsigned long val)
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*/
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unsigned long prom_virt_to_phys(unsigned long promva, int *error)
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{
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unsigned long pmd_phys = (prom_pmd_phys +
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((promva >> 23) & 0x7ff) * sizeof(pmd_t));
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unsigned long pte_phys;
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pmd_t pmd_ent;
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pte_t pte_ent;
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pmd_t *pmdp = prompmd + ((promva >> 23) & 0x7ff);
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pte_t *ptep;
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unsigned long base;
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pmd_val(pmd_ent) = load_phys32(pmd_phys);
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if (pmd_none(pmd_ent)) {
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if (pmd_none(*pmdp)) {
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if (error)
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*error = 1;
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return 0;
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}
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pte_phys = (unsigned long)pmd_val(pmd_ent) << 11UL;
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pte_phys += ((promva >> 13) & 0x3ff) * sizeof(pte_t);
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pte_val(pte_ent) = load_phys64(pte_phys);
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if (!pte_present(pte_ent)) {
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ptep = (pte_t *)__pmd_page(*pmdp) + ((promva >> 13) & 0x3ff);
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if (!pte_present(*ptep)) {
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if (error)
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*error = 1;
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return 0;
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}
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if (error) {
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*error = 0;
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return pte_val(pte_ent);
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return pte_val(*ptep);
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}
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base = pte_val(pte_ent) & _PAGE_PADDR;
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return (base + (promva & (BASE_PAGE_SIZE - 1)));
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base = pte_val(*ptep) & _PAGE_PADDR;
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return base + (promva & (BASE_PAGE_SIZE - 1));
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}
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/* The obp translations are saved based on 8k pagesize, since obp can
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@ -481,25 +426,20 @@ static void __init build_obp_range(unsigned long start, unsigned long end, unsig
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unsigned long vaddr;
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for (vaddr = start; vaddr < end; vaddr += BASE_PAGE_SIZE) {
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unsigned long val, pte_phys, pmd_phys;
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pmd_t pmd_ent;
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int i;
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unsigned long val;
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pmd_t *pmd;
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pte_t *pte;
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pmd_phys = (prom_pmd_phys +
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(((vaddr >> 23) & 0x7ff) * sizeof(pmd_t)));
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pmd_val(pmd_ent) = load_phys32(pmd_phys);
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if (pmd_none(pmd_ent)) {
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pte_phys = early_alloc_phys(BASE_PAGE_SIZE);
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for (i = 0; i < BASE_PAGE_SIZE / sizeof(pte_t); i++)
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store_phys64(pte_phys+i*sizeof(pte_t),0);
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pmd_val(pmd_ent) = pte_phys >> 11UL;
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store_phys32(pmd_phys, pmd_val(pmd_ent));
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pmd = prompmd + ((vaddr >> 23) & 0x7ff);
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if (pmd_none(*pmd)) {
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pte = __alloc_bootmem(BASE_PAGE_SIZE, BASE_PAGE_SIZE,
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PAGE_SIZE);
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if (!pte)
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prom_halt();
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memset(pte, 0, BASE_PAGE_SIZE);
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pmd_set(pmd, pte);
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}
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pte_phys = (unsigned long)pmd_val(pmd_ent) << 11UL;
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pte_phys += (((vaddr >> 13) & 0x3ff) * sizeof(pte_t));
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pte = (pte_t *) __pmd_page(*pmd) + ((vaddr >> 13) & 0x3ff);
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val = data;
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@ -507,7 +447,8 @@ static void __init build_obp_range(unsigned long start, unsigned long end, unsig
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if (tlb_type == spitfire)
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val &= ~0x0003fe0000000000UL;
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store_phys64(pte_phys, val | _PAGE_MODIFIED);
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set_pte_at(&init_mm, vaddr, pte,
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__pte(val | _PAGE_MODIFIED));
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data += BASE_PAGE_SIZE;
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}
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@ -520,13 +461,17 @@ static inline int in_obp_range(unsigned long vaddr)
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}
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#define OBP_PMD_SIZE 2048
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static void __init build_obp_pgtable(int prom_trans_ents)
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static void __init build_obp_pgtable(void)
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{
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unsigned long i;
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prom_pmd_phys = early_alloc_phys(OBP_PMD_SIZE);
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for (i = 0; i < OBP_PMD_SIZE; i += 4)
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store_phys32(prom_pmd_phys + i, 0);
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prompmd = __alloc_bootmem(OBP_PMD_SIZE, OBP_PMD_SIZE, PAGE_SIZE);
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if (!prompmd)
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prom_halt();
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memset(prompmd, 0, OBP_PMD_SIZE);
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prom_pmd_phys = __pa(prompmd);
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for (i = 0; i < prom_trans_ents; i++) {
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unsigned long start, end;
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@ -546,7 +491,7 @@ static void __init build_obp_pgtable(int prom_trans_ents)
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/* Read OBP translations property into 'prom_trans[]'.
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* Return the number of entries.
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*/
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static int __init read_obp_translations(void)
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static void __init read_obp_translations(void)
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{
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int n, node;
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@ -567,8 +512,10 @@ static int __init read_obp_translations(void)
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prom_printf("prom_mappings: Couldn't get property.\n");
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prom_halt();
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}
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n = n / sizeof(struct linux_prom_translation);
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return n;
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prom_trans_ents = n;
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}
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static void __init remap_kernel(void)
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@ -605,19 +552,21 @@ static void __init remap_kernel(void)
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}
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}
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static void __init inherit_prom_mappings(void)
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{
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int n;
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n = read_obp_translations();
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build_obp_pgtable(n);
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static void __init inherit_prom_mappings_pre(void)
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{
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read_obp_translations();
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/* Now fixup OBP's idea about where we really are mapped. */
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prom_printf("Remapping the kernel... ");
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remap_kernel();
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prom_printf("done.\n");
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}
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static void __init inherit_prom_mappings_post(void)
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{
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build_obp_pgtable();
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register_prom_callbacks();
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}
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@ -1570,8 +1519,7 @@ void __init paging_init(void)
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swapper_pgd_zero = pgd_val(swapper_pg_dir[0]);
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/* Inherit non-locked OBP mappings. */
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inherit_prom_mappings();
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inherit_prom_mappings_pre();
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/* Ok, we can use our TLB miss and window trap handlers safely.
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* We need to do a quick peek here to see if we are on StarFire
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@ -1582,15 +1530,23 @@ void __init paging_init(void)
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extern void setup_tba(int);
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setup_tba(this_is_starfire);
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}
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inherit_locked_prom_mappings(1);
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__flush_tlb_all();
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/* Everything from this point forward, until we are done with
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* inherit_prom_mappings_post(), must complete successfully
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* without calling into the firmware. The firwmare page tables
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* have not been built, but we are running on the Linux kernel's
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* trap table.
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*/
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/* Setup bootmem... */
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pages_avail = 0;
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last_valid_pfn = end_pfn = bootmem_init(&pages_avail);
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inherit_prom_mappings_post();
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inherit_locked_prom_mappings(1);
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#ifdef CONFIG_DEBUG_PAGEALLOC
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kernel_physical_mapping_init();
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#endif
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