power: reset: ocelot: switch the SI to boot mode
Switch the SI to boot mode so on a warm reboot, the SI is able to access the flash. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Родитель
76ee875c2f
Коммит
9afe62509b
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@ -26,6 +26,13 @@ struct ocelot_reset_context {
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#define SOFT_CHIP_RST BIT(0)
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#define SOFT_CHIP_RST BIT(0)
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#define ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL 0x24
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#define IF_SI_OWNER_MASK GENMASK(1, 0)
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#define IF_SI_OWNER_SISL 0
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#define IF_SI_OWNER_SIBM 1
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#define IF_SI_OWNER_SIMC 2
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#define IF_SI_OWNER_OFFSET 4
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static int ocelot_restart_handle(struct notifier_block *this,
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static int ocelot_restart_handle(struct notifier_block *this,
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unsigned long mode, void *cmd)
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unsigned long mode, void *cmd)
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{
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{
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@ -37,6 +44,11 @@ static int ocelot_restart_handle(struct notifier_block *this,
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regmap_update_bits(ctx->cpu_ctrl, ICPU_CFG_CPU_SYSTEM_CTRL_RESET,
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regmap_update_bits(ctx->cpu_ctrl, ICPU_CFG_CPU_SYSTEM_CTRL_RESET,
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CORE_RST_PROTECT, 0);
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CORE_RST_PROTECT, 0);
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/* Make the SI back to boot mode */
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regmap_update_bits(ctx->cpu_ctrl, ICPU_CFG_CPU_SYSTEM_CTRL_GENERAL_CTRL,
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IF_SI_OWNER_MASK << IF_SI_OWNER_OFFSET,
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IF_SI_OWNER_SIBM << IF_SI_OWNER_OFFSET);
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writel(SOFT_CHIP_RST, ctx->base);
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writel(SOFT_CHIP_RST, ctx->base);
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pr_emerg("Unable to restart system\n");
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pr_emerg("Unable to restart system\n");
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