[media] omap3isp: Use the common clock framework
Expose the two ISP external clocks XCLKA and XCLKB as common clocks for subdev drivers. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Laurent Pinchart
Mauro Carvalho Chehab
Родитель
4290fd1a56
Коммит
9b28ee3c91
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@ -55,6 +55,7 @@
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#include <asm/cacheflush.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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@ -148,6 +149,201 @@ void omap3isp_flush(struct isp_device *isp)
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isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
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}
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/* -----------------------------------------------------------------------------
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* XCLK
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*/
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#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
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static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
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{
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switch (xclk->id) {
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case ISP_XCLK_A:
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isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
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ISPTCTRL_CTRL_DIVA_MASK,
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divider << ISPTCTRL_CTRL_DIVA_SHIFT);
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break;
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case ISP_XCLK_B:
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isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
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ISPTCTRL_CTRL_DIVB_MASK,
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divider << ISPTCTRL_CTRL_DIVB_SHIFT);
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break;
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}
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}
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static int isp_xclk_prepare(struct clk_hw *hw)
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{
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struct isp_xclk *xclk = to_isp_xclk(hw);
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omap3isp_get(xclk->isp);
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return 0;
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}
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static void isp_xclk_unprepare(struct clk_hw *hw)
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{
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struct isp_xclk *xclk = to_isp_xclk(hw);
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omap3isp_put(xclk->isp);
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}
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static int isp_xclk_enable(struct clk_hw *hw)
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{
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struct isp_xclk *xclk = to_isp_xclk(hw);
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unsigned long flags;
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spin_lock_irqsave(&xclk->lock, flags);
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isp_xclk_update(xclk, xclk->divider);
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xclk->enabled = true;
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spin_unlock_irqrestore(&xclk->lock, flags);
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return 0;
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}
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static void isp_xclk_disable(struct clk_hw *hw)
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{
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struct isp_xclk *xclk = to_isp_xclk(hw);
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unsigned long flags;
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spin_lock_irqsave(&xclk->lock, flags);
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isp_xclk_update(xclk, 0);
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xclk->enabled = false;
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spin_unlock_irqrestore(&xclk->lock, flags);
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}
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static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct isp_xclk *xclk = to_isp_xclk(hw);
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return parent_rate / xclk->divider;
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}
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static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
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{
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u32 divider;
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if (*rate >= parent_rate) {
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*rate = parent_rate;
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return ISPTCTRL_CTRL_DIV_BYPASS;
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}
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divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
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if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
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divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
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*rate = parent_rate / divider;
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return divider;
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}
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static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate)
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{
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isp_xclk_calc_divider(&rate, *parent_rate);
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return rate;
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}
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static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct isp_xclk *xclk = to_isp_xclk(hw);
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unsigned long flags;
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u32 divider;
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divider = isp_xclk_calc_divider(&rate, parent_rate);
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spin_lock_irqsave(&xclk->lock, flags);
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xclk->divider = divider;
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if (xclk->enabled)
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isp_xclk_update(xclk, divider);
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spin_unlock_irqrestore(&xclk->lock, flags);
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dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
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__func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
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return 0;
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}
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static const struct clk_ops isp_xclk_ops = {
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.prepare = isp_xclk_prepare,
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.unprepare = isp_xclk_unprepare,
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.enable = isp_xclk_enable,
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.disable = isp_xclk_disable,
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.recalc_rate = isp_xclk_recalc_rate,
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.round_rate = isp_xclk_round_rate,
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.set_rate = isp_xclk_set_rate,
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};
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static const char *isp_xclk_parent_name = "cam_mclk";
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static const struct clk_init_data isp_xclk_init_data = {
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.name = "cam_xclk",
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.ops = &isp_xclk_ops,
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.parent_names = &isp_xclk_parent_name,
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.num_parents = 1,
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};
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static int isp_xclk_init(struct isp_device *isp)
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{
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struct isp_platform_data *pdata = isp->pdata;
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struct clk_init_data init;
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
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struct isp_xclk *xclk = &isp->xclks[i];
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struct clk *clk;
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xclk->isp = isp;
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xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
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xclk->divider = 1;
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spin_lock_init(&xclk->lock);
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init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
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init.ops = &isp_xclk_ops;
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init.parent_names = &isp_xclk_parent_name;
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init.num_parents = 1;
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xclk->hw.init = &init;
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clk = devm_clk_register(isp->dev, &xclk->hw);
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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if (pdata->xclks[i].con_id == NULL &&
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pdata->xclks[i].dev_id == NULL)
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continue;
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xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
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if (xclk->lookup == NULL)
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return -ENOMEM;
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xclk->lookup->con_id = pdata->xclks[i].con_id;
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xclk->lookup->dev_id = pdata->xclks[i].dev_id;
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xclk->lookup->clk = clk;
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clkdev_add(xclk->lookup);
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}
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return 0;
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}
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static void isp_xclk_cleanup(struct isp_device *isp)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
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struct isp_xclk *xclk = &isp->xclks[i];
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if (xclk->lookup)
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clkdev_drop(xclk->lookup);
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}
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}
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/* -----------------------------------------------------------------------------
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* Interrupts
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*/
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/*
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* isp_enable_interrupts - Enable ISP interrupts.
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* @isp: OMAP3 ISP device
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@ -180,80 +376,6 @@ static void isp_disable_interrupts(struct isp_device *isp)
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isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
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}
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/**
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* isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
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* @isp: OMAP3 ISP device
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* @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
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* @xclksel: XCLK to configure (0 = A, 1 = B).
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*
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* Configures the specified MCLK divisor in the ISP timing control register
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* (TCTRL_CTRL) to generate the desired xclk clock value.
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*
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* Divisor = cam_mclk_hz / xclk
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*
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* Returns the final frequency that is actually being generated
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**/
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static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
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{
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u32 divisor;
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u32 currentxclk;
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unsigned long mclk_hz;
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if (!omap3isp_get(isp))
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return 0;
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mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
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if (xclk >= mclk_hz) {
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divisor = ISPTCTRL_CTRL_DIV_BYPASS;
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currentxclk = mclk_hz;
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} else if (xclk >= 2) {
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divisor = mclk_hz / xclk;
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if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
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divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
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currentxclk = mclk_hz / divisor;
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} else {
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divisor = xclk;
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currentxclk = 0;
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}
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switch (xclksel) {
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case ISP_XCLK_A:
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isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
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ISPTCTRL_CTRL_DIVA_MASK,
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divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
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dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
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currentxclk);
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break;
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case ISP_XCLK_B:
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isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
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ISPTCTRL_CTRL_DIVB_MASK,
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divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
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dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
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currentxclk);
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break;
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case ISP_XCLK_NONE:
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default:
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omap3isp_put(isp);
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dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
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"xclk. Must be 0 (A) or 1 (B).\n");
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return -EINVAL;
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}
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/* Do we go from stable whatever to clock? */
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if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
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omap3isp_get(isp);
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/* Stopping the clock. */
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else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
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omap3isp_put(isp);
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isp->xclk_divisor[xclksel - 1] = divisor;
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omap3isp_put(isp);
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return currentxclk;
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}
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/*
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* isp_core_init - ISP core settings
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* @isp: OMAP3 ISP device
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@ -1969,6 +2091,7 @@ static int isp_remove(struct platform_device *pdev)
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isp_unregister_entities(isp);
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isp_cleanup_modules(isp);
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isp_xclk_cleanup(isp);
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__omap3isp_get(isp, false);
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iommu_detach_device(isp->domain, &pdev->dev);
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@ -2042,7 +2165,6 @@ static int isp_probe(struct platform_device *pdev)
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}
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isp->autoidle = autoidle;
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isp->platform_cb.set_xclk = isp_set_xclk;
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mutex_init(&isp->isp_mutex);
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spin_lock_init(&isp->stat_lock);
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@ -2093,6 +2215,10 @@ static int isp_probe(struct platform_device *pdev)
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if (ret < 0)
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goto error_isp;
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ret = isp_xclk_init(isp);
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if (ret < 0)
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goto error_isp;
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/* Memory resources */
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for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
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if (isp->revision == isp_res_maps[m].isp_rev)
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@ -2162,6 +2288,7 @@ detach_dev:
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free_domain:
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iommu_domain_free(isp->domain);
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error_isp:
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isp_xclk_cleanup(isp);
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omap3isp_put(isp);
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error:
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platform_set_drvdata(pdev, NULL);
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@ -29,6 +29,7 @@
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#include <media/omap3isp.h>
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#include <media/v4l2-device.h>
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/iommu.h>
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@ -125,8 +126,20 @@ struct isp_reg {
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u32 val;
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};
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struct isp_platform_callback {
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u32 (*set_xclk)(struct isp_device *isp, u32 xclk, u8 xclksel);
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enum isp_xclk_id {
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ISP_XCLK_A,
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ISP_XCLK_B,
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};
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struct isp_xclk {
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struct isp_device *isp;
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struct clk_hw hw;
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struct clk_lookup *lookup;
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enum isp_xclk_id id;
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spinlock_t lock; /* Protects enabled and divider */
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bool enabled;
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unsigned int divider;
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};
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/*
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@ -149,6 +162,7 @@ struct isp_platform_callback {
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* @cam_mclk: Pointer to camera functional clock structure.
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* @csi2_fck: Pointer to camera CSI2 complexIO clock structure.
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* @l3_ick: Pointer to OMAP3 L3 bus interface clock.
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* @xclks: External clocks provided by the ISP
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* @irq: Currently attached ISP ISR callbacks information structure.
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* @isp_af: Pointer to current settings for ISP AutoFocus SCM.
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* @isp_hist: Pointer to current settings for ISP Histogram SCM.
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@ -185,12 +199,12 @@ struct isp_device {
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int has_context;
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int ref_count;
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unsigned int autoidle;
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u32 xclk_divisor[2]; /* Two clocks, a and b. */
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#define ISP_CLK_CAM_ICK 0
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#define ISP_CLK_CAM_MCLK 1
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#define ISP_CLK_CSI2_FCK 2
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#define ISP_CLK_L3_ICK 3
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struct clk *clock[4];
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struct isp_xclk xclks[2];
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/* ISP modules */
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struct ispstat isp_af;
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@ -209,8 +223,6 @@ struct isp_device {
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unsigned int subclk_resources;
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struct iommu_domain *domain;
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struct isp_platform_callback platform_cb;
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};
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#define v4l2_dev_to_isp_device(dev) \
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@ -29,10 +29,6 @@
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struct i2c_board_info;
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struct isp_device;
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#define ISP_XCLK_NONE 0
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#define ISP_XCLK_A 1
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#define ISP_XCLK_B 2
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enum isp_interface_type {
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ISP_INTERFACE_PARALLEL,
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ISP_INTERFACE_CSI2A_PHY2,
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@ -153,7 +149,13 @@ struct isp_v4l2_subdevs_group {
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} bus; /* gcc < 4.6.0 chokes on anonymous union initializers */
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};
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struct isp_platform_xclk {
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const char *dev_id;
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const char *con_id;
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};
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struct isp_platform_data {
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struct isp_platform_xclk xclks[2];
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struct isp_v4l2_subdevs_group *subdevs;
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void (*set_constraints)(struct isp_device *isp, bool enable);
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};
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