V4L/DVB (7245): ivtv: start timer for each DMA transfer
The DMA timeout timer was started once for each set of DMA transfers, but it should be started for each single DMA transfer. Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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c9aec06f4a
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9b2e5c6bea
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@ -384,6 +384,8 @@ static void ivtv_dma_enc_start_xfer(struct ivtv_stream *s)
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ivtv_stream_sync_for_device(s);
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write_reg(s->sg_handle, IVTV_REG_ENCDMAADDR);
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write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x02, IVTV_REG_DMAXFER);
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itv->dma_timer.expires = jiffies + msecs_to_jiffies(100);
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add_timer(&itv->dma_timer);
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}
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static void ivtv_dma_dec_start_xfer(struct ivtv_stream *s)
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@ -398,6 +400,8 @@ static void ivtv_dma_dec_start_xfer(struct ivtv_stream *s)
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ivtv_stream_sync_for_device(s);
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write_reg(s->sg_handle, IVTV_REG_DECDMAADDR);
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write_reg_sync(read_reg(IVTV_REG_DMAXFER) | 0x01, IVTV_REG_DMAXFER);
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itv->dma_timer.expires = jiffies + msecs_to_jiffies(100);
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add_timer(&itv->dma_timer);
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}
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/* start the encoder DMA */
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@ -459,8 +463,6 @@ static void ivtv_dma_enc_start(struct ivtv_stream *s)
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ivtv_dma_enc_start_xfer(s);
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set_bit(IVTV_F_I_DMA, &itv->i_flags);
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itv->cur_dma_stream = s->type;
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itv->dma_timer.expires = jiffies + msecs_to_jiffies(100);
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add_timer(&itv->dma_timer);
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}
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}
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@ -481,8 +483,6 @@ static void ivtv_dma_dec_start(struct ivtv_stream *s)
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ivtv_dma_dec_start_xfer(s);
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set_bit(IVTV_F_I_DMA, &itv->i_flags);
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itv->cur_dma_stream = s->type;
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itv->dma_timer.expires = jiffies + msecs_to_jiffies(100);
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add_timer(&itv->dma_timer);
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}
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static void ivtv_irq_dma_read(struct ivtv *itv)
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@ -492,10 +492,11 @@ static void ivtv_irq_dma_read(struct ivtv *itv)
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int hw_stream_type = 0;
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IVTV_DEBUG_HI_IRQ("DEC DMA READ\n");
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if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) && itv->cur_dma_stream < 0) {
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del_timer(&itv->dma_timer);
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if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags) && itv->cur_dma_stream < 0)
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return;
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}
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if (!test_bit(IVTV_F_I_UDMA, &itv->i_flags)) {
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s = &itv->streams[itv->cur_dma_stream];
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@ -543,7 +544,6 @@ static void ivtv_irq_dma_read(struct ivtv *itv)
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}
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wake_up(&s->waitq);
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}
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del_timer(&itv->dma_timer);
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clear_bit(IVTV_F_I_UDMA, &itv->i_flags);
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clear_bit(IVTV_F_I_DMA, &itv->i_flags);
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itv->cur_dma_stream = -1;
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@ -557,10 +557,12 @@ static void ivtv_irq_enc_dma_complete(struct ivtv *itv)
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ivtv_api_get_data(&itv->enc_mbox, IVTV_MBOX_DMA_END, data);
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IVTV_DEBUG_HI_IRQ("ENC DMA COMPLETE %x %d (%d)\n", data[0], data[1], itv->cur_dma_stream);
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if (itv->cur_dma_stream < 0) {
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del_timer(&itv->dma_timer);
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if (itv->cur_dma_stream < 0)
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return;
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}
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s = &itv->streams[itv->cur_dma_stream];
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ivtv_stream_sync_for_cpu(s);
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@ -585,7 +587,6 @@ static void ivtv_irq_enc_dma_complete(struct ivtv *itv)
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ivtv_dma_enc_start_xfer(s);
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return;
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}
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del_timer(&itv->dma_timer);
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clear_bit(IVTV_F_I_DMA, &itv->i_flags);
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itv->cur_dma_stream = -1;
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dma_post(s);
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