mvebu dt for 5.11 (part 1)
- Add support for MikroTik CRS3xx switches - Add support for RD-AC3X-48G4X2XL board : Armada 382 SoC connected to Prestera AC3X ASIC through PCI - Clean-up kirkwood device tree: replace "ok" by "okay" - Improve device tree for PCA953x gpio expander nodes - Use compliant node name for USB3 on armada 375 - 98dx3236 SoCs: - remove non-existent i2c1 - add i2c0 pinctrl information - Improve device tree for Turris Omnia -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCX8USAwAKCRALBhiOFHI7 1fPtAJ9ZTaAA9sFNNfaig+Df5mgrdjgzHgCgjXCBEt3sr1e2CmAkLfGiVyOzt/4= =55Sy -----END PGP SIGNATURE----- Merge tag 'mvebu-dt-5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt mvebu dt for 5.11 (part 1) - Add support for MikroTik CRS3xx switches - Add support for RD-AC3X-48G4X2XL board : Armada 382 SoC connected to Prestera AC3X ASIC through PCI - Clean-up kirkwood device tree: replace "ok" by "okay" - Improve device tree for PCA953x gpio expander nodes - Use compliant node name for USB3 on armada 375 - 98dx3236 SoCs: - remove non-existent i2c1 - add i2c0 pinctrl information - Improve device tree for Turris Omnia * tag 'mvebu-dt-5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: ARM: dts: mvebu: Add device tree for RD-AC3X-48G4X2XL board arm: dts: marvell: armada-375: Harmonize DWC USB3 DT nodes name ARM: dts: turris-omnia: remove unneeded status = "okay" properties ARM: dts: turris-omnia: update ethernet-phy node and handle name ARM: dts: turris-omnia: add LED controller node ARM: dts: turris-omnia: add SFP node ARM: dts: turris-omnia: describe switch interrupt ARM: dts: turris-omnia: add comphy handle to eth2 ARM: dts: turris-omnia: enable HW buffer management ARM: dts: Add i2c0 pinctrl information for 98dx3236 ARM: dts: Remove non-existent i2c1 from 98dx3236 ARM: dts: armada: align GPIO hog names with dtschema ARM: dts: dove: fix PCA95xx GPIO expander properties on A510 ARM: dts: kirkwood: replace status value "ok" by "okay" ARM: dts: mvebu: Add CRS328-4C-20S-4S board ARM: dts: mvebu: Add CRS305-1G-4S board ARM: dts: mvebu: Add CRS326-24G-2S board Link: https://lore.kernel.org/r/87h7p6j0m7.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Коммит
9bc08aa60f
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@ -1327,6 +1327,7 @@ dtb-$(CONFIG_MACH_ARMADA_370) += \
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dtb-$(CONFIG_MACH_ARMADA_375) += \
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armada-375-db.dtb
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dtb-$(CONFIG_MACH_ARMADA_38X) += \
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armada-382-rd-ac3x-48g4x2xl.dtb \
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armada-385-clearfog-gtr-s4.dtb \
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armada-385-clearfog-gtr-l8.dtb \
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armada-385-db-88f6820-amc.dtb \
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@ -1348,6 +1349,12 @@ dtb-$(CONFIG_MACH_ARMADA_39X) += \
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armada-398-db.dtb
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dtb-$(CONFIG_MACH_ARMADA_XP) += \
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armada-xp-axpwifiap.dtb \
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armada-xp-crs305-1g-4s.dtb \
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armada-xp-crs305-1g-4s-bit.dtb \
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armada-xp-crs326-24g-2s.dtb \
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armada-xp-crs326-24g-2s-bit.dtb \
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armada-xp-crs328-4c-20s-4s.dtb \
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armada-xp-crs328-4c-20s-4s-bit.dtb \
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armada-xp-db.dtb \
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armada-xp-db-dxbc2.dtb \
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armada-xp-db-xc3-24g4xg.dtb \
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@ -426,7 +426,7 @@
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status = "disabled";
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};
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usb2: usb3@58000 {
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usb2: usb@58000 {
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compatible = "marvell,armada-375-xhci";
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reg = <0x58000 0x20000>,<0x5b880 0x80>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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@ -0,0 +1,112 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Device Tree file for Marvell Armada 382 reference board
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* (RD-AC3X-48G4X2XL)
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*
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* Copyright (C) 2020 Allied Telesis Labs
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*/
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/dts-v1/;
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#include "armada-385.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Marvell Armada 382 RD-AC3X";
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compatible = "marvell,rd-ac3x-48g4x2xl", "marvell,rd-ac3x",
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"marvell,armada385", "marvell,armada380";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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aliases {
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ethernet0 = ð1;
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512MB */
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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eeprom@53{
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compatible = "atmel,24c64";
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reg = <0x53>;
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};
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/* CPLD device present at 0x3c. Function unknown */
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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ð1 {
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status = "okay";
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phy = <&phy0>;
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phy-mode = "rgmii-id";
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};
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&mdio {
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pinctrl-names = "default";
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pinctrl-0 = <&mdio_pins>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&pciec {
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status = "okay";
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};
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&pcie1 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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&nand_controller {
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status = "okay";
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nand@0 {
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reg = <0>;
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label = "pxa3xx_nand-0";
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nand-rb = <0>;
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nand-on-flash-bbt;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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reg = <0x00000000 0x00500000>;
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label = "u-boot";
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};
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partition@500000{
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reg = <0x00500000 0x00400000>;
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label = "u-boot env";
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};
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partition@900000{
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reg = <0x00900000 0x3F700000>;
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label = "user";
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};
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};
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};
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};
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&refclk {
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clock-frequency = <200000000>;
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};
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@ -12,6 +12,7 @@
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "armada-385.dtsi"
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/ {
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@ -82,6 +83,32 @@
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};
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};
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};
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sfp: sfp {
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compatible = "sff,sfp";
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i2c-bus = <&sfp_i2c>;
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tx-fault-gpios = <&pcawan 0 GPIO_ACTIVE_HIGH>;
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tx-disable-gpios = <&pcawan 1 GPIO_ACTIVE_HIGH>;
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rate-select0-gpios = <&pcawan 2 GPIO_ACTIVE_HIGH>;
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los-gpios = <&pcawan 3 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&pcawan 4 GPIO_ACTIVE_LOW>;
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maximum-power-milliwatt = <3000>;
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/*
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* For now this has to be enabled at boot time by U-Boot when
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* a SFP module is present. Read more in the comment in the
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* eth2 node below.
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*/
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status = "disabled";
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};
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};
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&bm {
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status = "okay";
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};
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&bm_bppi {
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status = "okay";
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};
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/* Connected to 88E6176 switch, port 6 */
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@ -90,6 +117,9 @@
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pinctrl-0 = <&ge0_rgmii_pins>;
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status = "okay";
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phy-mode = "rgmii";
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buffer-manager = <&bm>;
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bm,pool-long = <0>;
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bm,pool-short = <3>;
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fixed-link {
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speed = <1000>;
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@ -103,6 +133,9 @@
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pinctrl-0 = <&ge1_rgmii_pins>;
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status = "okay";
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phy-mode = "rgmii";
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buffer-manager = <&bm>;
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bm,pool-long = <1>;
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bm,pool-short = <3>;
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fixed-link {
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speed = <1000>;
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@ -112,9 +145,23 @@
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/* WAN port */
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ð2 {
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/*
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* eth2 is connected via a multiplexor to both the SFP cage and to
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* ethernet-phy@1. The multiplexor switches the signal to SFP cage when
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* a SFP module is present, as determined by the mode-def0 GPIO.
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*
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* Until kernel supports this configuration properly, in case SFP module
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* is present, U-Boot has to enable the sfp node above, remove phy
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* handle and add managed = "in-band-status" property.
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*/
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status = "okay";
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phy-mode = "sgmii";
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phy = <&phy1>;
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phy-handle = <&phy1>;
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phys = <&comphy5 2>;
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sfp = <&sfp>;
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buffer-manager = <&bm>;
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bm,pool-long = <2>;
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bm,pool-short = <3>;
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};
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&i2c0 {
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@ -127,7 +174,6 @@
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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status = "okay";
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i2c@0 {
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#address-cells = <1>;
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@ -135,7 +181,115 @@
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reg = <0>;
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/* STM32F0 command interface at address 0x2a */
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/* leds device (in STM32F0) at address 0x2b */
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led-controller@2b {
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compatible = "cznic,turris-omnia-leds";
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reg = <0x2b>;
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#address-cells = <1>;
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#size-cells = <0>;
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/*
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* LEDs are controlled by MCU (STM32F0) at
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* address 0x2b.
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*
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* The driver does not support HW control mode
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* for the LEDs yet. Disable the LEDs for now.
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*
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* Also LED functions are not stable yet:
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* - there are 3 LEDs connected via MCU to PCIe
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* ports. One of these ports supports mSATA.
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* There is no mSATA nor PCIe function.
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* For now we use LED_FUNCTION_WLAN, since
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* in most cases users have wifi cards in
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* these slots
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* - there are 2 LEDs dedicated for user: A and
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* B. Again there is no such function defined.
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* For now we use LED_FUNCTION_INDICATOR
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*/
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status = "disabled";
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multi-led@0 {
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reg = <0x0>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_INDICATOR;
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function-enumerator = <2>;
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};
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multi-led@1 {
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reg = <0x1>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_INDICATOR;
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function-enumerator = <1>;
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};
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multi-led@2 {
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reg = <0x2>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_WLAN;
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function-enumerator = <3>;
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};
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multi-led@3 {
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reg = <0x3>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_WLAN;
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function-enumerator = <2>;
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};
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multi-led@4 {
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reg = <0x4>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_WLAN;
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function-enumerator = <1>;
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};
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multi-led@5 {
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reg = <0x5>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_WAN;
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};
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multi-led@6 {
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reg = <0x6>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <4>;
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};
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multi-led@7 {
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reg = <0x7>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <3>;
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};
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multi-led@8 {
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reg = <0x8>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <2>;
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};
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multi-led@9 {
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reg = <0x9>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_LAN;
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function-enumerator = <1>;
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};
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multi-led@a {
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reg = <0xa>;
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color = <LED_COLOR_ID_RGB>;
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function = LED_FUNCTION_LAN;
|
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function-enumerator = <0>;
|
||||
};
|
||||
|
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multi-led@b {
|
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reg = <0xb>;
|
||||
color = <LED_COLOR_ID_RGB>;
|
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function = LED_FUNCTION_POWER;
|
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};
|
||||
};
|
||||
|
||||
eeprom@54 {
|
||||
compatible = "atmel,24c64";
|
||||
|
@ -177,7 +331,7 @@
|
|||
/* routed to PCIe2 connector (CN62A) */
|
||||
};
|
||||
|
||||
i2c@4 {
|
||||
sfp_i2c: i2c@4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <4>;
|
||||
|
@ -232,9 +386,8 @@
|
|||
pinctrl-0 = <&mdio_pins>;
|
||||
status = "okay";
|
||||
|
||||
phy1: phy@1 {
|
||||
status = "okay";
|
||||
compatible = "ethernet-phy-id0141.0DD1", "ethernet-phy-ieee802.3-c22";
|
||||
phy1: ethernet-phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <1>;
|
||||
|
||||
/* irq is connected to &pcawan pin 7 */
|
||||
|
@ -242,13 +395,18 @@
|
|||
|
||||
/* Switch MV88E6176 at address 0x10 */
|
||||
switch@10 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&swint_pins>;
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dsa,member = <0 0>;
|
||||
|
||||
dsa,member = <0 0>;
|
||||
reg = <0x10>;
|
||||
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
@ -301,6 +459,11 @@
|
|||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
swint_pins: swint-pins {
|
||||
marvell,pins = "mpp45";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
spi0cs0_pins: spi0cs0-pins {
|
||||
marvell,pins = "mpp25";
|
||||
marvell,function = "spi0";
|
||||
|
|
|
@ -73,13 +73,13 @@
|
|||
* 14-SFP_TX_DISABLE
|
||||
* 15-SFP_MOD_DEF0
|
||||
*/
|
||||
pcie2_0_clkreq {
|
||||
pcie2-0-clkreq-hog {
|
||||
gpio-hog;
|
||||
gpios = <4 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "pcie2.0-clkreq";
|
||||
};
|
||||
pcie2_0_w_disable {
|
||||
pcie2-0-w-disable-hog {
|
||||
gpio-hog;
|
||||
gpios = <7 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
|
|
|
@ -141,31 +141,31 @@
|
|||
#gpio-cells = <2>;
|
||||
reg = <0x20>;
|
||||
|
||||
pcie1_0_clkreq {
|
||||
pcie1-0-clkreq-hog {
|
||||
gpio-hog;
|
||||
gpios = <0 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "pcie1.0-clkreq";
|
||||
};
|
||||
pcie1_0_w_disable {
|
||||
pcie1-0-w-disable-hog {
|
||||
gpio-hog;
|
||||
gpios = <3 GPIO_ACTIVE_LOW>;
|
||||
output-low;
|
||||
line-name = "pcie1.0-w-disable";
|
||||
};
|
||||
usb3_ilimit {
|
||||
usb3-ilimit-hog {
|
||||
gpio-hog;
|
||||
gpios = <5 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "usb3-current-limit";
|
||||
};
|
||||
usb3_power {
|
||||
usb3-power-hog {
|
||||
gpio-hog;
|
||||
gpios = <6 GPIO_ACTIVE_HIGH>;
|
||||
output-high;
|
||||
line-name = "usb3-power";
|
||||
};
|
||||
m2_devslp {
|
||||
m2-devslp-hog {
|
||||
gpio-hog;
|
||||
gpios = <11 GPIO_ACTIVE_HIGH>;
|
||||
output-low;
|
||||
|
|
|
@ -166,19 +166,19 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
|
||||
board_rev_bit_0 {
|
||||
board-rev-bit-0-hog {
|
||||
gpio-hog;
|
||||
gpios = <0 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "board-rev-0";
|
||||
};
|
||||
board_rev_bit_1 {
|
||||
board-rev-bit-1-hog {
|
||||
gpio-hog;
|
||||
gpios = <1 GPIO_ACTIVE_LOW>;
|
||||
input;
|
||||
line-name = "board-rev-1";
|
||||
};
|
||||
usb3_ilimit {
|
||||
usb3-ilimit-hog {
|
||||
gpio-hog;
|
||||
gpios = <5 GPIO_ACTIVE_HIGH>;
|
||||
input;
|
||||
|
|
|
@ -264,11 +264,8 @@
|
|||
&i2c0 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11000 0x100>;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
|
||||
reg = <0x11100 0x100>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
};
|
||||
|
||||
&mpic {
|
||||
|
@ -324,6 +321,11 @@
|
|||
"mpp2", "mpp3";
|
||||
marvell,function = "spi0";
|
||||
};
|
||||
|
||||
i2c0_pins: i2c-pins-0 {
|
||||
marvell,pins = "mpp14", "mpp15";
|
||||
marvell,function = "i2c0";
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
|
|
|
@ -0,0 +1,43 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for MikroTik CRS305-1G-4S+ Bit board
|
||||
*
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
|
||||
*/
|
||||
|
||||
#include "armada-xp-crs305-1g-4s.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MikroTik CRS305-1G-4S+ Bit";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
m25p,fast-read;
|
||||
|
||||
partition@u-boot {
|
||||
reg = <0x00000000 0x001f0000>;
|
||||
label = "u-boot";
|
||||
};
|
||||
partition@u-boot-env {
|
||||
reg = <0x001f0000 0x00010000>;
|
||||
label = "u-boot-env";
|
||||
};
|
||||
partition@ubi1 {
|
||||
reg = <0x00200000 0x03f00000>;
|
||||
label = "ubi1";
|
||||
};
|
||||
partition@ubi2 {
|
||||
reg = <0x04100000 0x03f00000>;
|
||||
label = "ubi2";
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for MikroTik CRS305-1G-4S+ board
|
||||
*
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
|
||||
*/
|
||||
|
||||
#include "armada-xp-crs305-1g-4s.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MikroTik CRS305-1G-4S+";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
};
|
|
@ -0,0 +1,104 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for CRS305-1G-4S board
|
||||
*
|
||||
* Copyright (C) 2016 Allied Telesis Labs
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
*
|
||||
* Based on armada-xp-db.dts
|
||||
*
|
||||
* Note: this Device Tree assumes that the bootloader has remapped the
|
||||
* internal registers to 0xf1000000 (instead of the default
|
||||
* 0xd0000000). The 0xf1000000 is the default used by the recent,
|
||||
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
|
||||
* boards were delivered with an older version of the bootloader that
|
||||
* left internal registers mapped at 0xd0000000. If you are in this
|
||||
* situation, you should either update your bootloader (preferred
|
||||
* solution) or the below Device Tree should be adjusted.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "armada-xp-98dx3236.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CRS305-1G-4S+";
|
||||
compatible = "mikrotik,crs305-1g-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
|
||||
};
|
||||
};
|
||||
|
||||
&L2 {
|
||||
arm,parity-enable;
|
||||
marvell,ecc-enable;
|
||||
};
|
||||
|
||||
&devbus_bootcs {
|
||||
status = "okay";
|
||||
|
||||
/* Device Bus parameters are required */
|
||||
|
||||
/* Read parameters */
|
||||
devbus,bus-width = <16>;
|
||||
devbus,turn-off-ps = <60000>;
|
||||
devbus,badr-skew-ps = <0>;
|
||||
devbus,acc-first-ps = <124000>;
|
||||
devbus,acc-next-ps = <248000>;
|
||||
devbus,rd-setup-ps = <0>;
|
||||
devbus,rd-hold-ps = <0>;
|
||||
|
||||
/* Write parameters */
|
||||
devbus,sync-enable = <0>;
|
||||
devbus,wr-high-ps = <60000>;
|
||||
devbus,wr-low-ps = <60000>;
|
||||
devbus,ale-wr-ps = <60000>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
m25p,fast-read;
|
||||
|
||||
partition@u-boot {
|
||||
reg = <0x00000000 0x001f0000>;
|
||||
label = "u-boot";
|
||||
};
|
||||
partition@u-boot-env {
|
||||
reg = <0x001f0000 0x00010000>;
|
||||
label = "u-boot-env";
|
||||
};
|
||||
partition@ubi1 {
|
||||
reg = <0x00200000 0x00e00000>;
|
||||
label = "ubi1";
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,43 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for MikroTik CRS326-24G-2S+ Bit board
|
||||
*
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
|
||||
*/
|
||||
|
||||
#include "armada-xp-crs326-24g-2s.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MikroTik CRS326-24G-2S+ Bit";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
m25p,fast-read;
|
||||
|
||||
partition@u-boot {
|
||||
reg = <0x00000000 0x001f0000>;
|
||||
label = "u-boot";
|
||||
};
|
||||
partition@u-boot-env {
|
||||
reg = <0x001f0000 0x00010000>;
|
||||
label = "u-boot-env";
|
||||
};
|
||||
partition@ubi1 {
|
||||
reg = <0x00200000 0x03f00000>;
|
||||
label = "ubi1";
|
||||
};
|
||||
partition@ubi2 {
|
||||
reg = <0x04100000 0x03f00000>;
|
||||
label = "ubi2";
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for MikroTik CRS326-24G-2S+ board
|
||||
*
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
|
||||
*/
|
||||
|
||||
#include "armada-xp-crs326-24g-2s.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MikroTik CRS326-24G-2S+";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
};
|
|
@ -0,0 +1,104 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for CRS326-24G-2S board
|
||||
*
|
||||
* Copyright (C) 2016 Allied Telesis Labs
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
*
|
||||
* Based on armada-xp-db.dts
|
||||
*
|
||||
* Note: this Device Tree assumes that the bootloader has remapped the
|
||||
* internal registers to 0xf1000000 (instead of the default
|
||||
* 0xd0000000). The 0xf1000000 is the default used by the recent,
|
||||
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
|
||||
* boards were delivered with an older version of the bootloader that
|
||||
* left internal registers mapped at 0xd0000000. If you are in this
|
||||
* situation, you should either update your bootloader (preferred
|
||||
* solution) or the below Device Tree should be adjusted.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "armada-xp-98dx3236.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CRS326-24G-2S+";
|
||||
compatible = "mikrotik,crs326-24g-2s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
|
||||
};
|
||||
};
|
||||
|
||||
&L2 {
|
||||
arm,parity-enable;
|
||||
marvell,ecc-enable;
|
||||
};
|
||||
|
||||
&devbus_bootcs {
|
||||
status = "okay";
|
||||
|
||||
/* Device Bus parameters are required */
|
||||
|
||||
/* Read parameters */
|
||||
devbus,bus-width = <16>;
|
||||
devbus,turn-off-ps = <60000>;
|
||||
devbus,badr-skew-ps = <0>;
|
||||
devbus,acc-first-ps = <124000>;
|
||||
devbus,acc-next-ps = <248000>;
|
||||
devbus,rd-setup-ps = <0>;
|
||||
devbus,rd-hold-ps = <0>;
|
||||
|
||||
/* Write parameters */
|
||||
devbus,sync-enable = <0>;
|
||||
devbus,wr-high-ps = <60000>;
|
||||
devbus,wr-low-ps = <60000>;
|
||||
devbus,ale-wr-ps = <60000>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
m25p,fast-read;
|
||||
|
||||
partition@u-boot {
|
||||
reg = <0x00000000 0x001f0000>;
|
||||
label = "u-boot";
|
||||
};
|
||||
partition@u-boot-env {
|
||||
reg = <0x001f0000 0x00010000>;
|
||||
label = "u-boot-env";
|
||||
};
|
||||
partition@ubi1 {
|
||||
reg = <0x00200000 0x00e00000>;
|
||||
label = "ubi1";
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,43 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for MikroTik CRS328-4C-20S-4S+ Bit board
|
||||
*
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
|
||||
*/
|
||||
|
||||
#include "armada-xp-crs328-4c-20s-4s.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MikroTik CRS328-4C-20S-4S+ Bit";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
m25p,fast-read;
|
||||
|
||||
partition@u-boot {
|
||||
reg = <0x00000000 0x001f0000>;
|
||||
label = "u-boot";
|
||||
};
|
||||
partition@u-boot-env {
|
||||
reg = <0x001f0000 0x00010000>;
|
||||
label = "u-boot-env";
|
||||
};
|
||||
partition@ubi1 {
|
||||
reg = <0x00200000 0x03f00000>;
|
||||
label = "ubi1";
|
||||
};
|
||||
partition@ubi2 {
|
||||
reg = <0x04100000 0x03f00000>;
|
||||
label = "ubi2";
|
||||
};
|
||||
};
|
||||
};
|
|
@ -0,0 +1,17 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for MikroTik CRS328-4C-20S-4S+ board
|
||||
*
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
* Author: Luka Kovacic <luka.kovacic@sartura.hr>
|
||||
*/
|
||||
|
||||
#include "armada-xp-crs328-4c-20s-4s.dtsi"
|
||||
|
||||
/ {
|
||||
model = "MikroTik CRS328-4C-20S-4S+";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
};
|
|
@ -0,0 +1,104 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Device Tree file for CRS328-4C-20S-4S+ board
|
||||
*
|
||||
* Copyright (C) 2016 Allied Telesis Labs
|
||||
* Copyright (C) 2020 Sartura Ltd.
|
||||
*
|
||||
* Based on armada-xp-db.dts
|
||||
*
|
||||
* Note: this Device Tree assumes that the bootloader has remapped the
|
||||
* internal registers to 0xf1000000 (instead of the default
|
||||
* 0xd0000000). The 0xf1000000 is the default used by the recent,
|
||||
* DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
|
||||
* boards were delivered with an older version of the bootloader that
|
||||
* left internal registers mapped at 0xd0000000. If you are in this
|
||||
* situation, you should either update your bootloader (preferred
|
||||
* solution) or the below Device Tree should be adjusted.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "armada-xp-98dx3236.dtsi"
|
||||
|
||||
/ {
|
||||
model = "CRS328-4C-20S-4S+";
|
||||
compatible = "mikrotik,crs328-4c-20s-4s", "marvell,armadaxp-98dx3236", "marvell,armada-370-xp";
|
||||
|
||||
chosen {
|
||||
bootargs = "console=ttyS0,115200 earlyprintk";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
|
||||
};
|
||||
};
|
||||
|
||||
&L2 {
|
||||
arm,parity-enable;
|
||||
marvell,ecc-enable;
|
||||
};
|
||||
|
||||
&devbus_bootcs {
|
||||
status = "okay";
|
||||
|
||||
/* Device Bus parameters are required */
|
||||
|
||||
/* Read parameters */
|
||||
devbus,bus-width = <16>;
|
||||
devbus,turn-off-ps = <60000>;
|
||||
devbus,badr-skew-ps = <0>;
|
||||
devbus,acc-first-ps = <124000>;
|
||||
devbus,acc-next-ps = <248000>;
|
||||
devbus,rd-setup-ps = <0>;
|
||||
devbus,rd-hold-ps = <0>;
|
||||
|
||||
/* Write parameters */
|
||||
devbus,sync-enable = <0>;
|
||||
devbus,wr-high-ps = <60000>;
|
||||
devbus,wr-low-ps = <60000>;
|
||||
devbus,ale-wr-ps = <60000>;
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
clock-frequency = <100000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
spi-flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>; /* Chip select 0 */
|
||||
spi-max-frequency = <108000000>;
|
||||
m25p,fast-read;
|
||||
|
||||
partition@u-boot {
|
||||
reg = <0x00000000 0x001f0000>;
|
||||
label = "u-boot";
|
||||
};
|
||||
partition@u-boot-env {
|
||||
reg = <0x001f0000 0x00010000>;
|
||||
label = "u-boot-env";
|
||||
};
|
||||
partition@ubi1 {
|
||||
reg = <0x00200000 0x00e00000>;
|
||||
label = "ubi1";
|
||||
};
|
||||
};
|
||||
};
|
|
@ -143,6 +143,7 @@
|
|||
gpio_ext: gpio@20 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x20>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
};
|
||||
};
|
||||
serial@12000 {
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
gpio-leds {
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
};
|
||||
};
|
||||
serial@12000 {
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
spi@10600 {
|
||||
|
|
|
@ -66,7 +66,7 @@
|
|||
};
|
||||
};
|
||||
serial@12000 {
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@80000 {
|
||||
|
|
|
@ -38,7 +38,7 @@
|
|||
};
|
||||
};
|
||||
serial@12000 {
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@80000 {
|
||||
|
|
|
@ -72,7 +72,7 @@
|
|||
};
|
||||
};
|
||||
serial@12000 {
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
@ -112,7 +112,7 @@
|
|||
};
|
||||
|
||||
serial@12000 {
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@80000 {
|
||||
|
|
|
@ -45,7 +45,7 @@
|
|||
};
|
||||
|
||||
serial@12000 {
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata@80000 {
|
||||
|
|
|
@ -369,7 +369,7 @@
|
|||
clocks = <&gate_clk 14>;
|
||||
clock-names = "sata";
|
||||
#phy-cells = <0>;
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sata_phy1: sata-phy@84000 {
|
||||
|
@ -378,7 +378,7 @@
|
|||
clocks = <&gate_clk 15>;
|
||||
clock-names = "sata";
|
||||
#phy-cells = <0>;
|
||||
status = "ok";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
audio0: audio-controller@a0000 {
|
||||
|
|
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