s390 updates for 5.7-rc7
- Add missing R_390_JMP_SLOT relocation type in KASLR code. - Fix set_huge_pte_at for empty ptes issue which has been uncovered with arch page table helper tests. - Correct initrd location for kdump kernel. - Fix s390_mmio_read/write with MIO in PCI code. -----BEGIN PGP SIGNATURE----- iQEzBAABCAAdFiEE3QHqV+H2a8xAv27vjYWKoQLXFBgFAl7I9iIACgkQjYWKoQLX FBglZQf6A5i+U0NCiFNNxUC7Fhv++wxczTZbYQONUEkiTW81s9gOMDMcQfKrOtDa v6g9F1qLQDbdjY9pqB9EfHnKwqZxWReu1Zh0AhV4hJGO0w34jK59yw0AappLRKer aQHbDl8i+2IITk9L0CKEogf+pSyDZbzZM1o6if3GHIfdi9GjllJu1u/YmPbX3S80 209+17ELCFZwsFPPsRts1D5rjVvAtfPamUE1X3Be+RItCWqzeVz/kW93eyNLr46b iAqMPZjjRLnmoQEw8pL4sKqm5sDsRSCYPJ2XmwHt3J50+EHY0SpkDULwVhAL3BYv s8In/ZgmcwhctRv+ZMB7YFF7DZOVaA== =5q8n -----END PGP SIGNATURE----- Merge tag 's390-5.7-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Vasily Gorbik: - Add missing R_390_JMP_SLOT relocation type in KASLR code. - Fix set_huge_pte_at for empty ptes issue which has been uncovered with arch page table helper tests. - Correct initrd location for kdump kernel. - Fix s390_mmio_read/write with MIO in PCI code. * tag 's390-5.7-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/kaslr: add support for R_390_JMP_SLOT relocation type s390/mm: fix set_huge_pte_at() for empty ptes s390/kexec_file: fix initrd location for kdump kernel s390/pci: Fix s390_mmio_read/write with MIO
This commit is contained in:
Linus Torvalds
Коммит
9bca7c4085
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@ -8,6 +8,10 @@
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#include <linux/slab.h>
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#include <asm/pci_insn.h>
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/* I/O size constraints */
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#define ZPCI_MAX_READ_SIZE 8
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#define ZPCI_MAX_WRITE_SIZE 128
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/* I/O Map */
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#define ZPCI_IOMAP_SHIFT 48
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#define ZPCI_IOMAP_ADDR_BASE 0x8000000000000000UL
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@ -140,7 +144,8 @@ static inline int zpci_memcpy_fromio(void *dst,
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while (n > 0) {
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size = zpci_get_max_write_size((u64 __force) src,
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(u64) dst, n, 8);
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(u64) dst, n,
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ZPCI_MAX_READ_SIZE);
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rc = zpci_read_single(dst, src, size);
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if (rc)
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break;
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@ -161,7 +166,8 @@ static inline int zpci_memcpy_toio(volatile void __iomem *dst,
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while (n > 0) {
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size = zpci_get_max_write_size((u64 __force) dst,
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(u64) src, n, 128);
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(u64) src, n,
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ZPCI_MAX_WRITE_SIZE);
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if (size > 8) /* main path */
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rc = zpci_write_block(dst, src, size);
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else
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@ -151,7 +151,7 @@ static int kexec_file_add_initrd(struct kimage *image,
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buf.mem += crashk_res.start;
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buf.memsz = buf.bufsz;
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data->parm->initrd_start = buf.mem;
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data->parm->initrd_start = data->memsz;
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data->parm->initrd_size = buf.memsz;
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data->memsz += buf.memsz;
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@ -28,6 +28,7 @@ int arch_kexec_do_relocs(int r_type, void *loc, unsigned long val,
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break;
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case R_390_64: /* Direct 64 bit. */
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case R_390_GLOB_DAT:
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case R_390_JMP_SLOT:
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*(u64 *)loc = val;
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break;
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case R_390_PC16: /* PC relative 16 bit. */
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@ -159,10 +159,13 @@ void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
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rste &= ~_SEGMENT_ENTRY_NOEXEC;
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/* Set correct table type for 2G hugepages */
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if ((pte_val(*ptep) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
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rste |= _REGION_ENTRY_TYPE_R3 | _REGION3_ENTRY_LARGE;
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else
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if ((pte_val(*ptep) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) {
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if (likely(pte_present(pte)))
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rste |= _REGION3_ENTRY_LARGE;
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rste |= _REGION_ENTRY_TYPE_R3;
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} else if (likely(pte_present(pte)))
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rste |= _SEGMENT_ENTRY_LARGE;
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clear_huge_pte_skeys(mm, rste);
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pte_val(*ptep) = rste;
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}
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@ -11,6 +11,113 @@
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#include <linux/mm.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <asm/pci_io.h>
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#include <asm/pci_debug.h>
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static inline void zpci_err_mmio(u8 cc, u8 status, u64 offset)
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{
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struct {
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u64 offset;
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u8 cc;
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u8 status;
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} data = {offset, cc, status};
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zpci_err_hex(&data, sizeof(data));
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}
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static inline int __pcistb_mio_inuser(
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void __iomem *ioaddr, const void __user *src,
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u64 len, u8 *status)
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{
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int cc = -ENXIO;
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asm volatile (
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" sacf 256\n"
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"0: .insn rsy,0xeb00000000d4,%[len],%[ioaddr],%[src]\n"
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"1: ipm %[cc]\n"
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" srl %[cc],28\n"
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"2: sacf 768\n"
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EX_TABLE(0b, 2b) EX_TABLE(1b, 2b)
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: [cc] "+d" (cc), [len] "+d" (len)
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: [ioaddr] "a" (ioaddr), [src] "Q" (*((u8 __force *)src))
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: "cc", "memory");
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*status = len >> 24 & 0xff;
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return cc;
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}
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static inline int __pcistg_mio_inuser(
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void __iomem *ioaddr, const void __user *src,
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u64 ulen, u8 *status)
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{
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register u64 addr asm("2") = (u64 __force) ioaddr;
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register u64 len asm("3") = ulen;
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int cc = -ENXIO;
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u64 val = 0;
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u64 cnt = ulen;
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u8 tmp;
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/*
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* copy 0 < @len <= 8 bytes from @src into the right most bytes of
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* a register, then store it to PCI at @ioaddr while in secondary
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* address space. pcistg then uses the user mappings.
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*/
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asm volatile (
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" sacf 256\n"
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"0: llgc %[tmp],0(%[src])\n"
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" sllg %[val],%[val],8\n"
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" aghi %[src],1\n"
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" ogr %[val],%[tmp]\n"
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" brctg %[cnt],0b\n"
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"1: .insn rre,0xb9d40000,%[val],%[ioaddr]\n"
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"2: ipm %[cc]\n"
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" srl %[cc],28\n"
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"3: sacf 768\n"
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EX_TABLE(0b, 3b) EX_TABLE(1b, 3b) EX_TABLE(2b, 3b)
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:
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[src] "+a" (src), [cnt] "+d" (cnt),
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[val] "+d" (val), [tmp] "=d" (tmp),
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[len] "+d" (len), [cc] "+d" (cc),
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[ioaddr] "+a" (addr)
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:: "cc", "memory");
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*status = len >> 24 & 0xff;
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/* did we read everything from user memory? */
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if (!cc && cnt != 0)
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cc = -EFAULT;
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return cc;
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}
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static inline int __memcpy_toio_inuser(void __iomem *dst,
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const void __user *src, size_t n)
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{
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int size, rc = 0;
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u8 status = 0;
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mm_segment_t old_fs;
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if (!src)
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return -EINVAL;
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old_fs = enable_sacf_uaccess();
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while (n > 0) {
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size = zpci_get_max_write_size((u64 __force) dst,
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(u64 __force) src, n,
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ZPCI_MAX_WRITE_SIZE);
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if (size > 8) /* main path */
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rc = __pcistb_mio_inuser(dst, src, size, &status);
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else
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rc = __pcistg_mio_inuser(dst, src, size, &status);
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if (rc)
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break;
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src += size;
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dst += size;
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n -= size;
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}
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disable_sacf_uaccess(old_fs);
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if (rc)
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zpci_err_mmio(rc, status, (__force u64) dst);
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return rc;
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}
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static long get_pfn(unsigned long user_addr, unsigned long access,
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unsigned long *pfn)
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@ -46,6 +153,20 @@ SYSCALL_DEFINE3(s390_pci_mmio_write, unsigned long, mmio_addr,
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if (length <= 0 || PAGE_SIZE - (mmio_addr & ~PAGE_MASK) < length)
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return -EINVAL;
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/*
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* Only support read access to MIO capable devices on a MIO enabled
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* system. Otherwise we would have to check for every address if it is
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* a special ZPCI_ADDR and we would have to do a get_pfn() which we
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* don't need for MIO capable devices.
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*/
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if (static_branch_likely(&have_mio)) {
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ret = __memcpy_toio_inuser((void __iomem *) mmio_addr,
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user_buffer,
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length);
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return ret;
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}
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if (length > 64) {
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buf = kmalloc(length, GFP_KERNEL);
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if (!buf)
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@ -56,7 +177,8 @@ SYSCALL_DEFINE3(s390_pci_mmio_write, unsigned long, mmio_addr,
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ret = get_pfn(mmio_addr, VM_WRITE, &pfn);
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if (ret)
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goto out;
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io_addr = (void __iomem *)((pfn << PAGE_SHIFT) | (mmio_addr & ~PAGE_MASK));
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io_addr = (void __iomem *)((pfn << PAGE_SHIFT) |
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(mmio_addr & ~PAGE_MASK));
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ret = -EFAULT;
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if ((unsigned long) io_addr < ZPCI_IOMAP_ADDR_BASE)
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@ -72,6 +194,78 @@ out:
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return ret;
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}
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static inline int __pcilg_mio_inuser(
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void __user *dst, const void __iomem *ioaddr,
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u64 ulen, u8 *status)
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{
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register u64 addr asm("2") = (u64 __force) ioaddr;
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register u64 len asm("3") = ulen;
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u64 cnt = ulen;
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int shift = ulen * 8;
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int cc = -ENXIO;
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u64 val, tmp;
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/*
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* read 0 < @len <= 8 bytes from the PCI memory mapped at @ioaddr (in
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* user space) into a register using pcilg then store these bytes at
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* user address @dst
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*/
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asm volatile (
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" sacf 256\n"
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"0: .insn rre,0xb9d60000,%[val],%[ioaddr]\n"
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"1: ipm %[cc]\n"
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" srl %[cc],28\n"
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" ltr %[cc],%[cc]\n"
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" jne 4f\n"
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"2: ahi %[shift],-8\n"
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" srlg %[tmp],%[val],0(%[shift])\n"
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"3: stc %[tmp],0(%[dst])\n"
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" aghi %[dst],1\n"
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" brctg %[cnt],2b\n"
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"4: sacf 768\n"
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EX_TABLE(0b, 4b) EX_TABLE(1b, 4b) EX_TABLE(3b, 4b)
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:
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[cc] "+d" (cc), [val] "=d" (val), [len] "+d" (len),
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[dst] "+a" (dst), [cnt] "+d" (cnt), [tmp] "=d" (tmp),
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[shift] "+d" (shift)
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:
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[ioaddr] "a" (addr)
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: "cc", "memory");
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/* did we write everything to the user space buffer? */
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if (!cc && cnt != 0)
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cc = -EFAULT;
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*status = len >> 24 & 0xff;
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return cc;
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}
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static inline int __memcpy_fromio_inuser(void __user *dst,
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const void __iomem *src,
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unsigned long n)
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{
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int size, rc = 0;
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u8 status;
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mm_segment_t old_fs;
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old_fs = enable_sacf_uaccess();
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while (n > 0) {
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size = zpci_get_max_write_size((u64 __force) src,
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(u64 __force) dst, n,
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ZPCI_MAX_READ_SIZE);
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rc = __pcilg_mio_inuser(dst, src, size, &status);
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if (rc)
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break;
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src += size;
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dst += size;
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n -= size;
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}
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disable_sacf_uaccess(old_fs);
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if (rc)
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zpci_err_mmio(rc, status, (__force u64) dst);
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return rc;
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}
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SYSCALL_DEFINE3(s390_pci_mmio_read, unsigned long, mmio_addr,
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void __user *, user_buffer, size_t, length)
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{
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@ -86,12 +280,27 @@ SYSCALL_DEFINE3(s390_pci_mmio_read, unsigned long, mmio_addr,
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if (length <= 0 || PAGE_SIZE - (mmio_addr & ~PAGE_MASK) < length)
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return -EINVAL;
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/*
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* Only support write access to MIO capable devices on a MIO enabled
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* system. Otherwise we would have to check for every address if it is
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* a special ZPCI_ADDR and we would have to do a get_pfn() which we
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* don't need for MIO capable devices.
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*/
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if (static_branch_likely(&have_mio)) {
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ret = __memcpy_fromio_inuser(
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user_buffer, (const void __iomem *)mmio_addr,
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length);
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return ret;
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}
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if (length > 64) {
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buf = kmalloc(length, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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} else
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} else {
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buf = local_buf;
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}
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ret = get_pfn(mmio_addr, VM_READ, &pfn);
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if (ret)
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