staging: fsl-dpaa2/rtc: add rtc driver
This patch is to add driver for the DPAA2 1588 timer module (RTC) which interfaces to up to an unlimited number of 10/100/1000 or 10G ethernet MACs, providing current time, alarm, and fiper support. The 1588 IP control block includes these distinctive features. - External GPIO trigger for time-stamping - 2 Time-stamp alarms - 3 FIPER pulse generators - Phase adjusted output timer clock Currently this driver only supports basic functions like settime/gettime/adjtime/adjfreq. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Yangbo Lu
Greg Kroah-Hartman
Родитель
d08e2f9728
Коммит
9bdf43b3d4
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@ -24,3 +24,11 @@ config FSL_DPAA2_ETHSW
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---help---
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Driver for Freescale DPAA2 Ethernet Switch. Select
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BRIDGE to have support for bridge tools.
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config FSL_DPAA2_PTP_CLOCK
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tristate "Freescale DPAA2 PTP Clock"
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depends on FSL_DPAA2
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select PTP_1588_CLOCK
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help
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This driver adds support for using the DPAA2 1588 timer module
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as a PTP clock.
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@ -2,5 +2,6 @@
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# Freescale DataPath Acceleration Architecture Gen2 (DPAA2) drivers
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#
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obj-$(CONFIG_FSL_DPAA2_ETH) += ethernet/
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obj-$(CONFIG_FSL_DPAA2_ETHSW) += ethsw/
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obj-$(CONFIG_FSL_DPAA2_ETH) += ethernet/
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obj-$(CONFIG_FSL_DPAA2_ETHSW) += ethsw/
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obj-$(CONFIG_FSL_DPAA2_PTP_CLOCK) += rtc/
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@ -0,0 +1,7 @@
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#
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# Makefile for the Freescale DPAA2 PTP clock
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#
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obj-$(CONFIG_FSL_DPAA2_PTP_CLOCK) += dpaa2-rtc.o
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dpaa2-rtc-objs := rtc.o dprtc.o
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@ -0,0 +1,137 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2013-2016 Freescale Semiconductor Inc.
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* Copyright 2016-2018 NXP
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*/
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#ifndef _FSL_DPRTC_CMD_H
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#define _FSL_DPRTC_CMD_H
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/* DPRTC Version */
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#define DPRTC_VER_MAJOR 2
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#define DPRTC_VER_MINOR 0
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/* Command versioning */
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#define DPRTC_CMD_BASE_VERSION 1
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#define DPRTC_CMD_ID_OFFSET 4
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#define DPRTC_CMD(id) (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
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/* Command IDs */
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#define DPRTC_CMDID_CLOSE DPRTC_CMD(0x800)
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#define DPRTC_CMDID_OPEN DPRTC_CMD(0x810)
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#define DPRTC_CMDID_CREATE DPRTC_CMD(0x910)
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#define DPRTC_CMDID_DESTROY DPRTC_CMD(0x990)
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#define DPRTC_CMDID_GET_API_VERSION DPRTC_CMD(0xa10)
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#define DPRTC_CMDID_ENABLE DPRTC_CMD(0x002)
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#define DPRTC_CMDID_DISABLE DPRTC_CMD(0x003)
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#define DPRTC_CMDID_GET_ATTR DPRTC_CMD(0x004)
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#define DPRTC_CMDID_RESET DPRTC_CMD(0x005)
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#define DPRTC_CMDID_IS_ENABLED DPRTC_CMD(0x006)
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#define DPRTC_CMDID_SET_IRQ_ENABLE DPRTC_CMD(0x012)
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#define DPRTC_CMDID_GET_IRQ_ENABLE DPRTC_CMD(0x013)
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#define DPRTC_CMDID_SET_IRQ_MASK DPRTC_CMD(0x014)
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#define DPRTC_CMDID_GET_IRQ_MASK DPRTC_CMD(0x015)
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#define DPRTC_CMDID_GET_IRQ_STATUS DPRTC_CMD(0x016)
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#define DPRTC_CMDID_CLEAR_IRQ_STATUS DPRTC_CMD(0x017)
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#define DPRTC_CMDID_SET_CLOCK_OFFSET DPRTC_CMD(0x1d0)
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#define DPRTC_CMDID_SET_FREQ_COMPENSATION DPRTC_CMD(0x1d1)
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#define DPRTC_CMDID_GET_FREQ_COMPENSATION DPRTC_CMD(0x1d2)
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#define DPRTC_CMDID_GET_TIME DPRTC_CMD(0x1d3)
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#define DPRTC_CMDID_SET_TIME DPRTC_CMD(0x1d4)
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#define DPRTC_CMDID_SET_ALARM DPRTC_CMD(0x1d5)
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#define DPRTC_CMDID_SET_PERIODIC_PULSE DPRTC_CMD(0x1d6)
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#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE DPRTC_CMD(0x1d7)
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#define DPRTC_CMDID_SET_EXT_TRIGGER DPRTC_CMD(0x1d8)
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#define DPRTC_CMDID_CLEAR_EXT_TRIGGER DPRTC_CMD(0x1d9)
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#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP DPRTC_CMD(0x1dA)
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/* Macros for accessing command fields smaller than 1byte */
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#define DPRTC_MASK(field) \
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GENMASK(DPRTC_##field##_SHIFT + DPRTC_##field##_SIZE - 1, \
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DPRTC_##field##_SHIFT)
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#define dprtc_get_field(var, field) \
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(((var) & DPRTC_MASK(field)) >> DPRTC_##field##_SHIFT)
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#pragma pack(push, 1)
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struct dprtc_cmd_open {
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__le32 dprtc_id;
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};
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struct dprtc_cmd_destroy {
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__le32 object_id;
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};
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#define DPRTC_ENABLE_SHIFT 0
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#define DPRTC_ENABLE_SIZE 1
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struct dprtc_rsp_is_enabled {
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u8 en;
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};
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struct dprtc_cmd_get_irq {
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__le32 pad;
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u8 irq_index;
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};
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struct dprtc_cmd_set_irq_enable {
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u8 en;
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u8 pad[3];
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u8 irq_index;
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};
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struct dprtc_rsp_get_irq_enable {
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u8 en;
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};
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struct dprtc_cmd_set_irq_mask {
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__le32 mask;
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u8 irq_index;
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};
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struct dprtc_rsp_get_irq_mask {
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__le32 mask;
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};
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struct dprtc_cmd_get_irq_status {
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__le32 status;
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u8 irq_index;
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};
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struct dprtc_rsp_get_irq_status {
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__le32 status;
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};
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struct dprtc_cmd_clear_irq_status {
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__le32 status;
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u8 irq_index;
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};
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struct dprtc_rsp_get_attributes {
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__le32 pad;
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__le32 id;
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};
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struct dprtc_cmd_set_clock_offset {
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__le64 offset;
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};
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struct dprtc_get_freq_compensation {
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__le32 freq_compensation;
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};
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struct dprtc_time {
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__le64 time;
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};
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struct dprtc_rsp_get_api_version {
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__le16 major;
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__le16 minor;
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};
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#pragma pack(pop)
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#endif /* _FSL_DPRTC_CMD_H */
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@ -0,0 +1,701 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright 2013-2016 Freescale Semiconductor Inc.
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* Copyright 2016-2018 NXP
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*/
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#include <linux/fsl/mc.h>
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#include "dprtc.h"
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#include "dprtc-cmd.h"
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/**
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* dprtc_open() - Open a control session for the specified object.
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @dprtc_id: DPRTC unique ID
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* @token: Returned token; use in subsequent API calls
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*
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* This function can be used to open a control session for an
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* already created object; an object may have been declared in
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* the DPL or by calling the dprtc_create function.
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* This function returns a unique authentication token,
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* associated with the specific object ID and the specific MC
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* portal; this token must be used in all subsequent commands for
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* this specific object
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_open(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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int dprtc_id,
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u16 *token)
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{
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struct dprtc_cmd_open *cmd_params;
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struct fsl_mc_command cmd = { 0 };
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int err;
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
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cmd_flags,
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0);
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cmd_params = (struct dprtc_cmd_open *)cmd.params;
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cmd_params->dprtc_id = cpu_to_le32(dprtc_id);
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err = mc_send_command(mc_io, &cmd);
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if (err)
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return err;
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*token = mc_cmd_hdr_read_token(&cmd);
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return 0;
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}
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/**
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* dprtc_close() - Close the control session of the object
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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*
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* After this function is called, no further operations are
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* allowed on the object without opening a new control session.
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_close(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token)
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{
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struct fsl_mc_command cmd = { 0 };
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
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token);
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return mc_send_command(mc_io, &cmd);
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}
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/**
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* dprtc_create() - Create the DPRTC object.
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* @mc_io: Pointer to MC portal's I/O object
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* @dprc_token: Parent container token; '0' for default container
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @cfg: Configuration structure
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* @obj_id: Returned object id
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*
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* Create the DPRTC object, allocate required resources and
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* perform required initialization.
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*
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* The function accepts an authentication token of a parent
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* container that this object should be assigned to. The token
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* can be '0' so the object will be assigned to the default container.
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* The newly created object can be opened with the returned
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* object id and using the container's associated tokens and MC portals.
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_create(struct fsl_mc_io *mc_io,
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u16 dprc_token,
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u32 cmd_flags,
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const struct dprtc_cfg *cfg,
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u32 *obj_id)
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{
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struct fsl_mc_command cmd = { 0 };
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int err;
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
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cmd_flags,
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dprc_token);
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err = mc_send_command(mc_io, &cmd);
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if (err)
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return err;
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*obj_id = mc_cmd_read_object_id(&cmd);
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return 0;
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}
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/**
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* dprtc_destroy() - Destroy the DPRTC object and release all its resources.
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* @mc_io: Pointer to MC portal's I/O object
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* @dprc_token: Parent container token; '0' for default container
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @object_id: The object id; it must be a valid id within the container that
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* created this object;
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*
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* The function accepts the authentication token of the parent container that
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* created the object (not the one that currently owns the object). The object
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* is searched within parent using the provided 'object_id'.
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* All tokens to the object must be closed before calling destroy.
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*
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* Return: '0' on Success; error code otherwise.
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*/
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int dprtc_destroy(struct fsl_mc_io *mc_io,
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u16 dprc_token,
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u32 cmd_flags,
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u32 object_id)
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{
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struct dprtc_cmd_destroy *cmd_params;
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struct fsl_mc_command cmd = { 0 };
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
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cmd_flags,
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dprc_token);
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cmd_params = (struct dprtc_cmd_destroy *)cmd.params;
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cmd_params->object_id = cpu_to_le32(object_id);
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return mc_send_command(mc_io, &cmd);
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}
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/**
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* dprtc_enable() - Enable the DPRTC.
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_enable(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token)
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{
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struct fsl_mc_command cmd = { 0 };
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
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token);
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return mc_send_command(mc_io, &cmd);
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}
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/**
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* dprtc_disable() - Disable the DPRTC.
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_disable(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token)
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{
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struct fsl_mc_command cmd = { 0 };
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
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cmd_flags,
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token);
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return mc_send_command(mc_io, &cmd);
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}
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/**
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* dprtc_is_enabled() - Check if the DPRTC is enabled.
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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* @en: Returns '1' if object is enabled; '0' otherwise
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_is_enabled(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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int *en)
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{
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struct dprtc_rsp_is_enabled *rsp_params;
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struct fsl_mc_command cmd = { 0 };
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int err;
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
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token);
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err = mc_send_command(mc_io, &cmd);
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if (err)
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return err;
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rsp_params = (struct dprtc_rsp_is_enabled *)cmd.params;
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*en = dprtc_get_field(rsp_params->en, ENABLE);
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return 0;
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}
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/**
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* dprtc_reset() - Reset the DPRTC, returns the object to initial state.
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_reset(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token)
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{
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struct fsl_mc_command cmd = { 0 };
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
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cmd_flags,
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token);
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return mc_send_command(mc_io, &cmd);
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}
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/**
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* dprtc_set_irq_enable() - Set overall interrupt state.
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* @mc_io: Pointer to MC portal's I/O object
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* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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* @token: Token of DPRTC object
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* @irq_index: The interrupt index to configure
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* @en: Interrupt state - enable = 1, disable = 0
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*
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* Allows GPP software to control when interrupts are generated.
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* Each interrupt can have up to 32 causes. The enable/disable control's the
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* overall interrupt state. if the interrupt is disabled no causes will cause
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* an interrupt.
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*
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* Return: '0' on Success; Error code otherwise.
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*/
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int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
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u32 cmd_flags,
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u16 token,
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u8 irq_index,
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u8 en)
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{
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struct dprtc_cmd_set_irq_enable *cmd_params;
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struct fsl_mc_command cmd = { 0 };
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cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_ENABLE,
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cmd_flags,
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token);
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cmd_params = (struct dprtc_cmd_set_irq_enable *)cmd.params;
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cmd_params->irq_index = irq_index;
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cmd_params->en = en;
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return mc_send_command(mc_io, &cmd);
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}
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/**
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* dprtc_get_irq_enable() - Get overall interrupt state
|
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* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @irq_index: The interrupt index to configure
|
||||
* @en: Returned interrupt state - enable = 1, disable = 0
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u8 *en)
|
||||
{
|
||||
struct dprtc_rsp_get_irq_enable *rsp_params;
|
||||
struct dprtc_cmd_get_irq *cmd_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
int err;
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_ENABLE,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
|
||||
cmd_params->irq_index = irq_index;
|
||||
|
||||
err = mc_send_command(mc_io, &cmd);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
rsp_params = (struct dprtc_rsp_get_irq_enable *)cmd.params;
|
||||
*en = rsp_params->en;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_set_irq_mask() - Set interrupt mask.
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @irq_index: The interrupt index to configure
|
||||
* @mask: Event mask to trigger interrupt;
|
||||
* each bit:
|
||||
* 0 = ignore event
|
||||
* 1 = consider event for asserting IRQ
|
||||
*
|
||||
* Every interrupt can have up to 32 causes and the interrupt model supports
|
||||
* masking/unmasking each cause independently
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u32 mask)
|
||||
{
|
||||
struct dprtc_cmd_set_irq_mask *cmd_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_MASK,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_cmd_set_irq_mask *)cmd.params;
|
||||
cmd_params->mask = cpu_to_le32(mask);
|
||||
cmd_params->irq_index = irq_index;
|
||||
|
||||
return mc_send_command(mc_io, &cmd);
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_get_irq_mask() - Get interrupt mask.
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @irq_index: The interrupt index to configure
|
||||
* @mask: Returned event mask to trigger interrupt
|
||||
*
|
||||
* Every interrupt can have up to 32 causes and the interrupt model supports
|
||||
* masking/unmasking each cause independently
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u32 *mask)
|
||||
{
|
||||
struct dprtc_rsp_get_irq_mask *rsp_params;
|
||||
struct dprtc_cmd_get_irq *cmd_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
int err;
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_MASK,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
|
||||
cmd_params->irq_index = irq_index;
|
||||
|
||||
err = mc_send_command(mc_io, &cmd);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
rsp_params = (struct dprtc_rsp_get_irq_mask *)cmd.params;
|
||||
*mask = le32_to_cpu(rsp_params->mask);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_get_irq_status() - Get the current status of any pending interrupts.
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @irq_index: The interrupt index to configure
|
||||
* @status: Returned interrupts status - one bit per cause:
|
||||
* 0 = no interrupt pending
|
||||
* 1 = interrupt pending
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u32 *status)
|
||||
{
|
||||
struct dprtc_cmd_get_irq_status *cmd_params;
|
||||
struct dprtc_rsp_get_irq_status *rsp_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
int err;
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_STATUS,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_cmd_get_irq_status *)cmd.params;
|
||||
cmd_params->status = cpu_to_le32(*status);
|
||||
cmd_params->irq_index = irq_index;
|
||||
|
||||
err = mc_send_command(mc_io, &cmd);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
rsp_params = (struct dprtc_rsp_get_irq_status *)cmd.params;
|
||||
*status = le32_to_cpu(rsp_params->status);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_clear_irq_status() - Clear a pending interrupt's status
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @irq_index: The interrupt index to configure
|
||||
* @status: Bits to clear (W1C) - one bit per cause:
|
||||
* 0 = don't change
|
||||
* 1 = clear status bit
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u32 status)
|
||||
{
|
||||
struct dprtc_cmd_clear_irq_status *cmd_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLEAR_IRQ_STATUS,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_cmd_clear_irq_status *)cmd.params;
|
||||
cmd_params->irq_index = irq_index;
|
||||
cmd_params->status = cpu_to_le32(status);
|
||||
|
||||
return mc_send_command(mc_io, &cmd);
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_get_attributes - Retrieve DPRTC attributes.
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @attr: Returned object's attributes
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_get_attributes(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
struct dprtc_attr *attr)
|
||||
{
|
||||
struct dprtc_rsp_get_attributes *rsp_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
int err;
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
|
||||
cmd_flags,
|
||||
token);
|
||||
|
||||
err = mc_send_command(mc_io, &cmd);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
rsp_params = (struct dprtc_rsp_get_attributes *)cmd.params;
|
||||
attr->id = le32_to_cpu(rsp_params->id);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_set_clock_offset() - Sets the clock's offset
|
||||
* (usually relative to another clock).
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @offset: New clock offset (in nanoseconds).
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
int64_t offset)
|
||||
{
|
||||
struct dprtc_cmd_set_clock_offset *cmd_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_cmd_set_clock_offset *)cmd.params;
|
||||
cmd_params->offset = cpu_to_le64(offset);
|
||||
|
||||
return mc_send_command(mc_io, &cmd);
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_set_freq_compensation() - Sets a new frequency compensation value.
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @freq_compensation: The new frequency compensation value to set.
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u32 freq_compensation)
|
||||
{
|
||||
struct dprtc_get_freq_compensation *cmd_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
|
||||
cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
|
||||
|
||||
return mc_send_command(mc_io, &cmd);
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_get_freq_compensation() - Retrieves the frequency compensation value
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @freq_compensation: Frequency compensation value
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u32 *freq_compensation)
|
||||
{
|
||||
struct dprtc_get_freq_compensation *rsp_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
int err;
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
|
||||
cmd_flags,
|
||||
token);
|
||||
|
||||
err = mc_send_command(mc_io, &cmd);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
|
||||
*freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_get_time() - Returns the current RTC time.
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @time: Current RTC time.
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_get_time(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
uint64_t *time)
|
||||
{
|
||||
struct dprtc_time *rsp_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
int err;
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
|
||||
cmd_flags,
|
||||
token);
|
||||
|
||||
err = mc_send_command(mc_io, &cmd);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
rsp_params = (struct dprtc_time *)cmd.params;
|
||||
*time = le64_to_cpu(rsp_params->time);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_set_time() - Updates current RTC time.
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @time: New RTC time.
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_set_time(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
uint64_t time)
|
||||
{
|
||||
struct dprtc_time *cmd_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_time *)cmd.params;
|
||||
cmd_params->time = cpu_to_le64(time);
|
||||
|
||||
return mc_send_command(mc_io, &cmd);
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_set_alarm() - Defines and sets alarm.
|
||||
*
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @token: Token of DPRTC object
|
||||
* @time: In nanoseconds, the time when the alarm
|
||||
* should go off - must be a multiple of
|
||||
* 1 microsecond
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_set_alarm(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token, uint64_t time)
|
||||
{
|
||||
struct dprtc_time *cmd_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
|
||||
cmd_flags,
|
||||
token);
|
||||
cmd_params = (struct dprtc_time *)cmd.params;
|
||||
cmd_params->time = cpu_to_le64(time);
|
||||
|
||||
return mc_send_command(mc_io, &cmd);
|
||||
}
|
||||
|
||||
/**
|
||||
* dprtc_get_api_version() - Get Data Path Real Time Counter API version
|
||||
* @mc_io: Pointer to MC portal's I/O object
|
||||
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
|
||||
* @major_ver: Major version of data path real time counter API
|
||||
* @minor_ver: Minor version of data path real time counter API
|
||||
*
|
||||
* Return: '0' on Success; Error code otherwise.
|
||||
*/
|
||||
int dprtc_get_api_version(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 *major_ver,
|
||||
u16 *minor_ver)
|
||||
{
|
||||
struct dprtc_rsp_get_api_version *rsp_params;
|
||||
struct fsl_mc_command cmd = { 0 };
|
||||
int err;
|
||||
|
||||
cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_API_VERSION,
|
||||
cmd_flags,
|
||||
0);
|
||||
|
||||
err = mc_send_command(mc_io, &cmd);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
rsp_params = (struct dprtc_rsp_get_api_version *)cmd.params;
|
||||
*major_ver = le16_to_cpu(rsp_params->major);
|
||||
*minor_ver = le16_to_cpu(rsp_params->minor);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -0,0 +1,164 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2013-2016 Freescale Semiconductor Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
*/
|
||||
|
||||
#ifndef __FSL_DPRTC_H
|
||||
#define __FSL_DPRTC_H
|
||||
|
||||
/* Data Path Real Time Counter API
|
||||
* Contains initialization APIs and runtime control APIs for RTC
|
||||
*/
|
||||
|
||||
struct fsl_mc_io;
|
||||
|
||||
/**
|
||||
* Number of irq's
|
||||
*/
|
||||
#define DPRTC_MAX_IRQ_NUM 1
|
||||
#define DPRTC_IRQ_INDEX 0
|
||||
|
||||
/**
|
||||
* Interrupt event masks:
|
||||
*/
|
||||
|
||||
/**
|
||||
* Interrupt event mask indicating alarm event had occurred
|
||||
*/
|
||||
#define DPRTC_EVENT_ALARM 0x40000000
|
||||
/**
|
||||
* Interrupt event mask indicating periodic pulse event had occurred
|
||||
*/
|
||||
#define DPRTC_EVENT_PPS 0x08000000
|
||||
|
||||
int dprtc_open(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
int dprtc_id,
|
||||
u16 *token);
|
||||
|
||||
int dprtc_close(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token);
|
||||
|
||||
/**
|
||||
* struct dprtc_cfg - Structure representing DPRTC configuration
|
||||
* @options: place holder
|
||||
*/
|
||||
struct dprtc_cfg {
|
||||
u32 options;
|
||||
};
|
||||
|
||||
int dprtc_create(struct fsl_mc_io *mc_io,
|
||||
u16 dprc_token,
|
||||
u32 cmd_flags,
|
||||
const struct dprtc_cfg *cfg,
|
||||
u32 *obj_id);
|
||||
|
||||
int dprtc_destroy(struct fsl_mc_io *mc_io,
|
||||
u16 dprc_token,
|
||||
u32 cmd_flags,
|
||||
u32 object_id);
|
||||
|
||||
int dprtc_enable(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token);
|
||||
|
||||
int dprtc_disable(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token);
|
||||
|
||||
int dprtc_is_enabled(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
int *en);
|
||||
|
||||
int dprtc_reset(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token);
|
||||
|
||||
int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
int64_t offset);
|
||||
|
||||
int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u32 freq_compensation);
|
||||
|
||||
int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u32 *freq_compensation);
|
||||
|
||||
int dprtc_get_time(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
uint64_t *time);
|
||||
|
||||
int dprtc_set_time(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
uint64_t time);
|
||||
|
||||
int dprtc_set_alarm(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
uint64_t time);
|
||||
|
||||
int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u8 en);
|
||||
|
||||
int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u8 *en);
|
||||
|
||||
int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u32 mask);
|
||||
|
||||
int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u32 *mask);
|
||||
|
||||
int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u32 *status);
|
||||
|
||||
int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
u8 irq_index,
|
||||
u32 status);
|
||||
|
||||
/**
|
||||
* struct dprtc_attr - Structure representing DPRTC attributes
|
||||
* @id: DPRTC object ID
|
||||
*/
|
||||
struct dprtc_attr {
|
||||
int id;
|
||||
};
|
||||
|
||||
int dprtc_get_attributes(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 token,
|
||||
struct dprtc_attr *attr);
|
||||
|
||||
int dprtc_get_api_version(struct fsl_mc_io *mc_io,
|
||||
u32 cmd_flags,
|
||||
u16 *major_ver,
|
||||
u16 *minor_ver);
|
||||
|
||||
#endif /* __FSL_DPRTC_H */
|
||||
|
|
@ -0,0 +1,231 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright 2013-2016 Freescale Semiconductor Inc.
|
||||
* Copyright 2016-2018 NXP
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/ptp_clock_kernel.h>
|
||||
#include <linux/fsl/mc.h>
|
||||
|
||||
#include "dprtc.h"
|
||||
#include "dprtc-cmd.h"
|
||||
|
||||
struct ptp_dpaa2_priv {
|
||||
struct fsl_mc_device *rtc_mc_dev;
|
||||
struct ptp_clock *clock;
|
||||
struct ptp_clock_info caps;
|
||||
int phc_index;
|
||||
u32 freq_comp;
|
||||
};
|
||||
|
||||
/* PTP clock operations */
|
||||
static int ptp_dpaa2_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
|
||||
{
|
||||
struct ptp_dpaa2_priv *ptp_dpaa2 =
|
||||
container_of(ptp, struct ptp_dpaa2_priv, caps);
|
||||
struct fsl_mc_device *mc_dev = ptp_dpaa2->rtc_mc_dev;
|
||||
struct device *dev = &mc_dev->dev;
|
||||
u64 adj;
|
||||
u32 diff, tmr_add;
|
||||
int neg_adj = 0;
|
||||
int err = 0;
|
||||
|
||||
if (ppb < 0) {
|
||||
neg_adj = 1;
|
||||
ppb = -ppb;
|
||||
}
|
||||
|
||||
tmr_add = ptp_dpaa2->freq_comp;
|
||||
adj = tmr_add;
|
||||
adj *= ppb;
|
||||
diff = div_u64(adj, 1000000000ULL);
|
||||
|
||||
tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
|
||||
|
||||
err = dprtc_set_freq_compensation(mc_dev->mc_io, 0,
|
||||
mc_dev->mc_handle, tmr_add);
|
||||
if (err)
|
||||
dev_err(dev, "dprtc_set_freq_compensation err %d\n", err);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ptp_dpaa2_adjtime(struct ptp_clock_info *ptp, s64 delta)
|
||||
{
|
||||
struct ptp_dpaa2_priv *ptp_dpaa2 =
|
||||
container_of(ptp, struct ptp_dpaa2_priv, caps);
|
||||
struct fsl_mc_device *mc_dev = ptp_dpaa2->rtc_mc_dev;
|
||||
struct device *dev = &mc_dev->dev;
|
||||
s64 now;
|
||||
int err = 0;
|
||||
|
||||
err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &now);
|
||||
if (err) {
|
||||
dev_err(dev, "dprtc_get_time err %d\n", err);
|
||||
return 0;
|
||||
}
|
||||
|
||||
now += delta;
|
||||
|
||||
err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, now);
|
||||
if (err) {
|
||||
dev_err(dev, "dprtc_set_time err %d\n", err);
|
||||
return 0;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ptp_dpaa2_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
|
||||
{
|
||||
struct ptp_dpaa2_priv *ptp_dpaa2 =
|
||||
container_of(ptp, struct ptp_dpaa2_priv, caps);
|
||||
struct fsl_mc_device *mc_dev = ptp_dpaa2->rtc_mc_dev;
|
||||
struct device *dev = &mc_dev->dev;
|
||||
u64 ns;
|
||||
u32 remainder;
|
||||
int err = 0;
|
||||
|
||||
err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &ns);
|
||||
if (err) {
|
||||
dev_err(dev, "dprtc_get_time err %d\n", err);
|
||||
return 0;
|
||||
}
|
||||
|
||||
ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
|
||||
ts->tv_nsec = remainder;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ptp_dpaa2_settime(struct ptp_clock_info *ptp,
|
||||
const struct timespec64 *ts)
|
||||
{
|
||||
struct ptp_dpaa2_priv *ptp_dpaa2 =
|
||||
container_of(ptp, struct ptp_dpaa2_priv, caps);
|
||||
struct fsl_mc_device *mc_dev = ptp_dpaa2->rtc_mc_dev;
|
||||
struct device *dev = &mc_dev->dev;
|
||||
u64 ns;
|
||||
int err = 0;
|
||||
|
||||
ns = ts->tv_sec * 1000000000ULL;
|
||||
ns += ts->tv_nsec;
|
||||
|
||||
err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, ns);
|
||||
if (err)
|
||||
dev_err(dev, "dprtc_set_time err %d\n", err);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct ptp_clock_info ptp_dpaa2_caps = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "DPAA2 PTP Clock",
|
||||
.max_adj = 512000,
|
||||
.n_alarm = 2,
|
||||
.n_ext_ts = 2,
|
||||
.n_per_out = 3,
|
||||
.n_pins = 0,
|
||||
.pps = 1,
|
||||
.adjfreq = ptp_dpaa2_adjfreq,
|
||||
.adjtime = ptp_dpaa2_adjtime,
|
||||
.gettime64 = ptp_dpaa2_gettime,
|
||||
.settime64 = ptp_dpaa2_settime,
|
||||
};
|
||||
|
||||
static int rtc_probe(struct fsl_mc_device *mc_dev)
|
||||
{
|
||||
struct device *dev = &mc_dev->dev;
|
||||
struct ptp_dpaa2_priv *ptp_dpaa2;
|
||||
u32 tmr_add = 0;
|
||||
int err;
|
||||
|
||||
ptp_dpaa2 = kzalloc(sizeof(*ptp_dpaa2), GFP_KERNEL);
|
||||
if (!ptp_dpaa2)
|
||||
return -ENOMEM;
|
||||
|
||||
err = fsl_mc_portal_allocate(mc_dev, 0, &mc_dev->mc_io);
|
||||
if (err) {
|
||||
dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
|
||||
goto err_exit;
|
||||
}
|
||||
|
||||
err = dprtc_open(mc_dev->mc_io, 0, mc_dev->obj_desc.id,
|
||||
&mc_dev->mc_handle);
|
||||
if (err) {
|
||||
dev_err(dev, "dprtc_open err %d\n", err);
|
||||
goto err_free_mcp;
|
||||
}
|
||||
|
||||
ptp_dpaa2->rtc_mc_dev = mc_dev;
|
||||
|
||||
err = dprtc_get_freq_compensation(mc_dev->mc_io, 0,
|
||||
mc_dev->mc_handle, &tmr_add);
|
||||
if (err) {
|
||||
dev_err(dev, "dprtc_get_freq_compensation err %d\n", err);
|
||||
goto err_close;
|
||||
}
|
||||
|
||||
ptp_dpaa2->freq_comp = tmr_add;
|
||||
ptp_dpaa2->caps = ptp_dpaa2_caps;
|
||||
|
||||
ptp_dpaa2->clock = ptp_clock_register(&ptp_dpaa2->caps, dev);
|
||||
if (IS_ERR(ptp_dpaa2->clock)) {
|
||||
err = PTR_ERR(ptp_dpaa2->clock);
|
||||
goto err_close;
|
||||
}
|
||||
|
||||
ptp_dpaa2->phc_index = ptp_clock_index(ptp_dpaa2->clock);
|
||||
|
||||
dev_set_drvdata(dev, ptp_dpaa2);
|
||||
|
||||
return 0;
|
||||
|
||||
err_close:
|
||||
dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
|
||||
err_free_mcp:
|
||||
fsl_mc_portal_free(mc_dev->mc_io);
|
||||
err_exit:
|
||||
kfree(ptp_dpaa2);
|
||||
dev_set_drvdata(dev, NULL);
|
||||
return err;
|
||||
}
|
||||
|
||||
static int rtc_remove(struct fsl_mc_device *mc_dev)
|
||||
{
|
||||
struct ptp_dpaa2_priv *ptp_dpaa2;
|
||||
struct device *dev = &mc_dev->dev;
|
||||
|
||||
ptp_dpaa2 = dev_get_drvdata(dev);
|
||||
ptp_clock_unregister(ptp_dpaa2->clock);
|
||||
|
||||
dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
|
||||
fsl_mc_portal_free(mc_dev->mc_io);
|
||||
|
||||
kfree(ptp_dpaa2);
|
||||
dev_set_drvdata(dev, NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct fsl_mc_device_id rtc_match_id_table[] = {
|
||||
{
|
||||
.vendor = FSL_MC_VENDOR_FREESCALE,
|
||||
.obj_type = "dprtc",
|
||||
},
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(fslmc, rtc_match_id_table);
|
||||
|
||||
static struct fsl_mc_driver rtc_drv = {
|
||||
.driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.probe = rtc_probe,
|
||||
.remove = rtc_remove,
|
||||
.match_id_table = rtc_match_id_table,
|
||||
};
|
||||
|
||||
module_fsl_mc_driver(rtc_drv);
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_DESCRIPTION("DPAA2 PTP Clock Driver");
|
||||
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