Merge 3.11-rc3 into char-misc-next.
This resolves a merge issue with: drivers/misc/mei/init.c Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Коммит
9c5891bd43
|
@ -0,0 +1,17 @@
|
|||
What: /sys/module/xen_blkback/parameters/max_buffer_pages
|
||||
Date: March 2013
|
||||
KernelVersion: 3.11
|
||||
Contact: Roger Pau Monné <roger.pau@citrix.com>
|
||||
Description:
|
||||
Maximum number of free pages to keep in each block
|
||||
backend buffer.
|
||||
|
||||
What: /sys/module/xen_blkback/parameters/max_persistent_grants
|
||||
Date: March 2013
|
||||
KernelVersion: 3.11
|
||||
Contact: Roger Pau Monné <roger.pau@citrix.com>
|
||||
Description:
|
||||
Maximum number of grants to map persistently in
|
||||
blkback. If the frontend tries to use more than
|
||||
max_persistent_grants, the LRU kicks in and starts
|
||||
removing 5% of max_persistent_grants every 100ms.
|
|
@ -0,0 +1,10 @@
|
|||
What: /sys/module/xen_blkfront/parameters/max
|
||||
Date: June 2013
|
||||
KernelVersion: 3.11
|
||||
Contact: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
|
||||
Description:
|
||||
Maximum number of segments that the frontend will negotiate
|
||||
with the backend for indirect descriptors. The default value
|
||||
is 32 - higher value means more potential throughput but more
|
||||
memory usage. The backend picks the minimum of the frontend
|
||||
and its default backend value.
|
|
@ -46,29 +46,33 @@ you format your backing devices and cache device at the same time, you won't
|
|||
have to manually attach:
|
||||
make-bcache -B /dev/sda /dev/sdb -C /dev/sdc
|
||||
|
||||
To make bcache devices known to the kernel, echo them to /sys/fs/bcache/register:
|
||||
bcache-tools now ships udev rules, and bcache devices are known to the kernel
|
||||
immediately. Without udev, you can manually register devices like this:
|
||||
|
||||
echo /dev/sdb > /sys/fs/bcache/register
|
||||
echo /dev/sdc > /sys/fs/bcache/register
|
||||
|
||||
To register your bcache devices automatically, you could add something like
|
||||
this to an init script:
|
||||
Registering the backing device makes the bcache device show up in /dev; you can
|
||||
now format it and use it as normal. But the first time using a new bcache
|
||||
device, it'll be running in passthrough mode until you attach it to a cache.
|
||||
See the section on attaching.
|
||||
|
||||
echo /dev/sd* > /sys/fs/bcache/register_quiet
|
||||
The devices show up as:
|
||||
|
||||
It'll look for bcache superblocks and ignore everything that doesn't have one.
|
||||
/dev/bcache<N>
|
||||
|
||||
Registering the backing device makes the bcache show up in /dev; you can now
|
||||
format it and use it as normal. But the first time using a new bcache device,
|
||||
it'll be running in passthrough mode until you attach it to a cache. See the
|
||||
section on attaching.
|
||||
As well as (with udev):
|
||||
|
||||
The devices show up at /dev/bcacheN, and can be controlled via sysfs from
|
||||
/sys/block/bcacheN/bcache:
|
||||
/dev/bcache/by-uuid/<uuid>
|
||||
/dev/bcache/by-label/<label>
|
||||
|
||||
To get started:
|
||||
|
||||
mkfs.ext4 /dev/bcache0
|
||||
mount /dev/bcache0 /mnt
|
||||
|
||||
You can control bcache devices through sysfs at /sys/block/bcache<N>/bcache .
|
||||
|
||||
Cache devices are managed as sets; multiple caches per set isn't supported yet
|
||||
but will allow for mirroring of metadata and dirty data in the future. Your new
|
||||
cache set shows up as /sys/fs/bcache/<UUID>
|
||||
|
@ -80,11 +84,11 @@ must be attached to your cache set to enable caching. Attaching a backing
|
|||
device to a cache set is done thusly, with the UUID of the cache set in
|
||||
/sys/fs/bcache:
|
||||
|
||||
echo <UUID> > /sys/block/bcache0/bcache/attach
|
||||
echo <CSET-UUID> > /sys/block/bcache0/bcache/attach
|
||||
|
||||
This only has to be done once. The next time you reboot, just reregister all
|
||||
your bcache devices. If a backing device has data in a cache somewhere, the
|
||||
/dev/bcache# device won't be created until the cache shows up - particularly
|
||||
/dev/bcache<N> device won't be created until the cache shows up - particularly
|
||||
important if you have writeback caching turned on.
|
||||
|
||||
If you're booting up and your cache device is gone and never coming back, you
|
||||
|
@ -191,6 +195,9 @@ want for getting the best possible numbers when benchmarking.
|
|||
|
||||
SYSFS - BACKING DEVICE:
|
||||
|
||||
Available at /sys/block/<bdev>/bcache, /sys/block/bcache*/bcache and
|
||||
(if attached) /sys/fs/bcache/<cset-uuid>/bdev*
|
||||
|
||||
attach
|
||||
Echo the UUID of a cache set to this file to enable caching.
|
||||
|
||||
|
@ -300,6 +307,8 @@ cache_readaheads
|
|||
|
||||
SYSFS - CACHE SET:
|
||||
|
||||
Available at /sys/fs/bcache/<cset-uuid>
|
||||
|
||||
average_key_size
|
||||
Average data per key in the btree.
|
||||
|
||||
|
@ -390,6 +399,8 @@ trigger_gc
|
|||
|
||||
SYSFS - CACHE DEVICE:
|
||||
|
||||
Available at /sys/block/<cdev>/bcache
|
||||
|
||||
block_size
|
||||
Minimum granularity of writes - should match hardware sector size.
|
||||
|
||||
|
|
|
@ -98,6 +98,7 @@ clocks and IDs.
|
|||
fpm 83
|
||||
mpll_osc_sel 84
|
||||
mpll_sel 85
|
||||
spll_gate 86
|
||||
|
||||
Examples:
|
||||
|
||||
|
|
|
@ -26,6 +26,7 @@ est ESTeem Wireless Modems
|
|||
fsl Freescale Semiconductor
|
||||
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
|
||||
gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
|
||||
hisilicon Hisilicon Limited.
|
||||
hp Hewlett Packard
|
||||
ibm International Business Machines (IBM)
|
||||
idt Integrated Device Technologies, Inc.
|
||||
|
@ -43,6 +44,7 @@ nxp NXP Semiconductors
|
|||
onnn ON Semiconductor Corp.
|
||||
picochip Picochip Ltd
|
||||
powervr PowerVR (deprecated, use img)
|
||||
qca Qualcomm Atheros, Inc.
|
||||
qcom Qualcomm, Inc.
|
||||
ralink Mediatek/Ralink Technology Corp.
|
||||
ramtron Ramtron International
|
||||
|
|
|
@ -11,14 +11,14 @@ for non English (read: Japanese) speakers and is not intended as a
|
|||
fork. So if you have any comments or updates for this file, please try
|
||||
to update the original English file first.
|
||||
|
||||
Last Updated: 2011/03/31
|
||||
Last Updated: 2013/07/19
|
||||
==================================
|
||||
これは、
|
||||
linux-2.6.38/Documentation/HOWTO
|
||||
linux-3.10/Documentation/HOWTO
|
||||
の和訳です。
|
||||
|
||||
翻訳団体: JF プロジェクト < http://www.linux.or.jp/JF/ >
|
||||
翻訳日: 2011/3/28
|
||||
翻訳団体: JF プロジェクト < http://linuxjf.sourceforge.jp/ >
|
||||
翻訳日: 2013/7/19
|
||||
翻訳者: Tsugikazu Shibata <tshibata at ab dot jp dot nec dot com>
|
||||
校正者: 松倉さん <nbh--mats at nifty dot com>
|
||||
小林 雅典さん (Masanori Kobayasi) <zap03216 at nifty dot ne dot jp>
|
||||
|
@ -245,7 +245,7 @@ Linux カーネルソースツリーの中に含まれる、きれいにし、
|
|||
自己参照方式で、索引がついた web 形式で、ソースコードを参照することが
|
||||
できます。この最新の素晴しいカーネルコードのリポジトリは以下で見つかり
|
||||
ます-
|
||||
http://sosdg.org/~qiyong/lxr/
|
||||
http://lxr.linux.no/+trees
|
||||
|
||||
開発プロセス
|
||||
-----------------------
|
||||
|
@ -253,24 +253,24 @@ Linux カーネルソースツリーの中に含まれる、きれいにし、
|
|||
Linux カーネルの開発プロセスは現在幾つかの異なるメインカーネル「ブラン
|
||||
チ」と多数のサブシステム毎のカーネルブランチから構成されます。
|
||||
これらのブランチとは-
|
||||
- メインの 2.6.x カーネルツリー
|
||||
- 2.6.x.y -stable カーネルツリー
|
||||
- 2.6.x -git カーネルパッチ
|
||||
- メインの 3.x カーネルツリー
|
||||
- 3.x.y -stable カーネルツリー
|
||||
- 3.x -git カーネルパッチ
|
||||
- サブシステム毎のカーネルツリーとパッチ
|
||||
- 統合テストのための 2.6.x -next カーネルツリー
|
||||
- 統合テストのための 3.x -next カーネルツリー
|
||||
|
||||
2.6.x カーネルツリー
|
||||
3.x カーネルツリー
|
||||
-----------------
|
||||
|
||||
2.6.x カーネルは Linus Torvalds によってメンテナンスされ、kernel.org
|
||||
の pub/linux/kernel/v2.6/ ディレクトリに存在します。この開発プロセスは
|
||||
3.x カーネルは Linus Torvalds によってメンテナンスされ、kernel.org
|
||||
の pub/linux/kernel/v3.x/ ディレクトリに存在します。この開発プロセスは
|
||||
以下のとおり-
|
||||
|
||||
- 新しいカーネルがリリースされた直後に、2週間の特別期間が設けられ、
|
||||
この期間中に、メンテナ達は Linus に大きな差分を送ることができます。
|
||||
このような差分は通常 -next カーネルに数週間含まれてきたパッチです。
|
||||
大きな変更は git(カーネルのソース管理ツール、詳細は
|
||||
http://git-scm.com/ 参照) を使って送るのが好ましいやり方ですが、パッ
|
||||
http://git-scm.com/ 参照) を使って送るのが好ましいやり方ですが、パッ
|
||||
チファイルの形式のまま送るのでも十分です。
|
||||
|
||||
- 2週間後、-rc1 カーネルがリリースされ、この後にはカーネル全体の安定
|
||||
|
@ -302,20 +302,20 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー
|
|||
実に認識されたバグの状況によりリリースされるのであり、前もって決めら
|
||||
れた計画によってリリースされるものではないからです。」
|
||||
|
||||
2.6.x.y -stable カーネルツリー
|
||||
3.x.y -stable カーネルツリー
|
||||
---------------------------
|
||||
|
||||
バージョン番号が4つの数字に分かれているカーネルは -stable カーネルです。
|
||||
これには、2.6.x カーネルで見つかったセキュリティ問題や重大な後戻りに対
|
||||
バージョン番号が3つの数字に分かれているカーネルは -stable カーネルです。
|
||||
これには、3.x カーネルで見つかったセキュリティ問題や重大な後戻りに対
|
||||
する比較的小さい重要な修正が含まれます。
|
||||
|
||||
これは、開発/実験的バージョンのテストに協力することに興味が無く、
|
||||
最新の安定したカーネルを使いたいユーザに推奨するブランチです。
|
||||
|
||||
もし、2.6.x.y カーネルが存在しない場合には、番号が一番大きい 2.6.x が
|
||||
もし、3.x.y カーネルが存在しない場合には、番号が一番大きい 3.x が
|
||||
最新の安定版カーネルです。
|
||||
|
||||
2.6.x.y は "stable" チーム <stable@kernel.org> でメンテされており、必
|
||||
3.x.y は "stable" チーム <stable@kernel.org> でメンテされており、必
|
||||
要に応じてリリースされます。通常のリリース期間は 2週間毎ですが、差し迫っ
|
||||
た問題がなければもう少し長くなることもあります。セキュリティ関連の問題
|
||||
の場合はこれに対してだいたいの場合、すぐにリリースがされます。
|
||||
|
@ -324,7 +324,7 @@ Andrew Morton が Linux-kernel メーリングリストにカーネルリリー
|
|||
イルにはどのような種類の変更が -stable ツリーに受け入れ可能か、またリ
|
||||
リースプロセスがどう動くかが記述されています。
|
||||
|
||||
2.6.x -git パッチ
|
||||
3.x -git パッチ
|
||||
------------------
|
||||
|
||||
git リポジトリで管理されているLinus のカーネルツリーの毎日のスナップ
|
||||
|
@ -358,14 +358,14 @@ quilt シリーズとして公開されているパッチキューも使われ
|
|||
をつけることができます。大部分のこれらの patchwork のサイトは
|
||||
http://patchwork.kernel.org/ でリストされています。
|
||||
|
||||
統合テストのための 2.6.x -next カーネルツリー
|
||||
統合テストのための 3.x -next カーネルツリー
|
||||
---------------------------------------------
|
||||
|
||||
サブシステムツリーの更新内容がメインラインの 2.6.x ツリーにマージされ
|
||||
サブシステムツリーの更新内容がメインラインの 3.x ツリーにマージされ
|
||||
る前に、それらは統合テストされる必要があります。この目的のため、実質的
|
||||
に全サブシステムツリーからほぼ毎日プルされてできる特別なテスト用のリ
|
||||
ポジトリが存在します-
|
||||
http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git
|
||||
http://git.kernel.org/?p=linux/kernel/git/next/linux-next.git
|
||||
http://linux.f-seidel.de/linux-next/pmwiki/
|
||||
|
||||
このやり方によって、-next カーネルは次のマージ機会でどんなものがメイン
|
||||
|
|
36
MAINTAINERS
36
MAINTAINERS
|
@ -1642,7 +1642,7 @@ S: Maintained
|
|||
F: drivers/net/hamradio/baycom*
|
||||
|
||||
BCACHE (BLOCK LAYER CACHE)
|
||||
M: Kent Overstreet <koverstreet@google.com>
|
||||
M: Kent Overstreet <kmo@daterainc.com>
|
||||
L: linux-bcache@vger.kernel.org
|
||||
W: http://bcache.evilpiepirate.org
|
||||
S: Maintained:
|
||||
|
@ -3346,7 +3346,7 @@ F: Documentation/firmware_class/
|
|||
F: drivers/base/firmware*.c
|
||||
F: include/linux/firmware.h
|
||||
|
||||
FLASHSYSTEM DRIVER (IBM FlashSystem 70/80 PCI SSD Flash Card)
|
||||
FLASH ADAPTER DRIVER (IBM Flash Adapter 900GB Full Height PCI Flash Card)
|
||||
M: Joshua Morris <josh.h.morris@us.ibm.com>
|
||||
M: Philip Kelleher <pjk1939@linux.vnet.ibm.com>
|
||||
S: Maintained
|
||||
|
@ -3622,11 +3622,9 @@ F: drivers/isdn/gigaset/
|
|||
F: include/uapi/linux/gigaset_dev.h
|
||||
|
||||
GPIO SUBSYSTEM
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
S: Maintained
|
||||
L: linux-gpio@vger.kernel.org
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
F: Documentation/gpio.txt
|
||||
F: drivers/gpio/
|
||||
F: include/linux/gpio*
|
||||
|
@ -4472,8 +4470,6 @@ F: drivers/irqchip/
|
|||
|
||||
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
|
||||
M: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
|
||||
S: Maintained
|
||||
F: Documentation/IRQ-domain.txt
|
||||
F: include/linux/irqdomain.h
|
||||
|
@ -4990,7 +4986,7 @@ F: arch/powerpc/platforms/44x/
|
|||
|
||||
LINUX FOR POWERPC EMBEDDED XILINX VIRTEX
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Unmaintained
|
||||
S: Orphan
|
||||
F: arch/powerpc/*/*virtex*
|
||||
F: arch/powerpc/*/*/*virtex*
|
||||
|
||||
|
@ -5886,7 +5882,7 @@ OMAP DEVICE TREE SUPPORT
|
|||
M: Benoît Cousson <b-cousson@ti.com>
|
||||
M: Tony Lindgren <tony@atomide.com>
|
||||
L: linux-omap@vger.kernel.org
|
||||
L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers)
|
||||
L: devicetree@vger.kernel.org
|
||||
S: Maintained
|
||||
F: arch/arm/boot/dts/*omap*
|
||||
F: arch/arm/boot/dts/*am3*
|
||||
|
@ -6050,17 +6046,28 @@ F: drivers/i2c/busses/i2c-ocores.c
|
|||
OPEN FIRMWARE AND FLATTENED DEVICE TREE
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
M: Rob Herring <rob.herring@calxeda.com>
|
||||
L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers)
|
||||
L: devicetree@vger.kernel.org
|
||||
W: http://fdt.secretlab.ca
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
S: Maintained
|
||||
F: Documentation/devicetree
|
||||
F: drivers/of
|
||||
F: drivers/of/
|
||||
F: include/linux/of*.h
|
||||
F: scripts/dtc
|
||||
F: scripts/dtc/
|
||||
K: of_get_property
|
||||
K: of_match_table
|
||||
|
||||
OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
|
||||
M: Rob Herring <rob.herring@calxeda.com>
|
||||
M: Pawel Moll <pawel.moll@arm.com>
|
||||
M: Mark Rutland <mark.rutland@arm.com>
|
||||
M: Stephen Warren <swarren@wwwdotorg.org>
|
||||
M: Ian Campbell <ian.campbell@citrix.com>
|
||||
L: devicetree@vger.kernel.org
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/
|
||||
F: arch/*/boot/dts/
|
||||
F: include/dt-bindings/
|
||||
|
||||
OPENRISC ARCHITECTURE
|
||||
M: Jonas Bonn <jonas@southpole.se>
|
||||
W: http://openrisc.net
|
||||
|
@ -7746,7 +7753,6 @@ F: drivers/clk/spear/
|
|||
|
||||
SPI SUBSYSTEM
|
||||
M: Mark Brown <broonie@kernel.org>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
L: linux-spi@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
|
||||
Q: http://patchwork.kernel.org/project/spi-devel-general/list/
|
||||
|
@ -7812,7 +7818,7 @@ F: drivers/staging/asus_oled/
|
|||
|
||||
STAGING - COMEDI
|
||||
M: Ian Abbott <abbotti@mev.co.uk>
|
||||
M: Mori Hess <fmhess@users.sourceforge.net>
|
||||
M: H Hartley Sweeten <hsweeten@visionengravers.com>
|
||||
S: Odd Fixes
|
||||
F: drivers/staging/comedi/
|
||||
|
||||
|
@ -9288,7 +9294,7 @@ S: Maintained
|
|||
F: drivers/net/ethernet/xilinx/xilinx_axienet*
|
||||
|
||||
XILINX SYSTEMACE DRIVER
|
||||
S: Unmaintained
|
||||
S: Orphan
|
||||
F: drivers/block/xsysace.c
|
||||
|
||||
XILINX UARTLITE SERIAL DRIVER
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 11
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = Linux for Workgroups
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -15,6 +15,7 @@ config ALPHA
|
|||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARCH_WANT_IPC_PARSE_VERSION
|
||||
select ARCH_HAVE_NMI_SAFE_CMPXCHG
|
||||
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
|
||||
select GENERIC_SMP_IDLE_THREAD
|
||||
select GENERIC_CMOS_UPDATE
|
||||
select GENERIC_STRNCPY_FROM_USER
|
||||
|
|
|
@ -186,17 +186,24 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v)
|
|||
*/
|
||||
static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
|
||||
{
|
||||
int c, old;
|
||||
c = atomic_read(v);
|
||||
for (;;) {
|
||||
if (unlikely(c == (u)))
|
||||
break;
|
||||
old = atomic_cmpxchg((v), c, c + (a));
|
||||
if (likely(old == c))
|
||||
break;
|
||||
c = old;
|
||||
}
|
||||
return c;
|
||||
int c, new, old;
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldl_l %[old],%[mem]\n"
|
||||
" cmpeq %[old],%[u],%[c]\n"
|
||||
" addl %[old],%[a],%[new]\n"
|
||||
" bne %[c],2f\n"
|
||||
" stl_c %[new],%[mem]\n"
|
||||
" beq %[new],3f\n"
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: [old] "=&r"(old), [new] "=&r"(new), [c] "=&r"(c)
|
||||
: [mem] "m"(*v), [a] "rI"(a), [u] "rI"((long)u)
|
||||
: "memory");
|
||||
smp_mb();
|
||||
return old;
|
||||
}
|
||||
|
||||
|
||||
|
@ -207,21 +214,56 @@ static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
|
|||
* @u: ...unless v is equal to u.
|
||||
*
|
||||
* Atomically adds @a to @v, so long as it was not @u.
|
||||
* Returns the old value of @v.
|
||||
* Returns true iff @v was not @u.
|
||||
*/
|
||||
static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
|
||||
{
|
||||
long c, old;
|
||||
c = atomic64_read(v);
|
||||
for (;;) {
|
||||
if (unlikely(c == (u)))
|
||||
break;
|
||||
old = atomic64_cmpxchg((v), c, c + (a));
|
||||
if (likely(old == c))
|
||||
break;
|
||||
c = old;
|
||||
}
|
||||
return c != (u);
|
||||
long c, tmp;
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldq_l %[tmp],%[mem]\n"
|
||||
" cmpeq %[tmp],%[u],%[c]\n"
|
||||
" addq %[tmp],%[a],%[tmp]\n"
|
||||
" bne %[c],2f\n"
|
||||
" stq_c %[tmp],%[mem]\n"
|
||||
" beq %[tmp],3f\n"
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: [tmp] "=&r"(tmp), [c] "=&r"(c)
|
||||
: [mem] "m"(*v), [a] "rI"(a), [u] "rI"(u)
|
||||
: "memory");
|
||||
smp_mb();
|
||||
return !c;
|
||||
}
|
||||
|
||||
/*
|
||||
* atomic64_dec_if_positive - decrement by 1 if old value positive
|
||||
* @v: pointer of type atomic_t
|
||||
*
|
||||
* The function returns the old value of *v minus 1, even if
|
||||
* the atomic variable, v, was not decremented.
|
||||
*/
|
||||
static inline long atomic64_dec_if_positive(atomic64_t *v)
|
||||
{
|
||||
long old, tmp;
|
||||
smp_mb();
|
||||
__asm__ __volatile__(
|
||||
"1: ldq_l %[old],%[mem]\n"
|
||||
" subq %[old],1,%[tmp]\n"
|
||||
" ble %[old],2f\n"
|
||||
" stq_c %[tmp],%[mem]\n"
|
||||
" beq %[tmp],3f\n"
|
||||
"2:\n"
|
||||
".subsection 2\n"
|
||||
"3: br 1b\n"
|
||||
".previous"
|
||||
: [old] "=&r"(old), [tmp] "=&r"(tmp)
|
||||
: [mem] "m"(*v)
|
||||
: "memory");
|
||||
smp_mb();
|
||||
return old - 1;
|
||||
}
|
||||
|
||||
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
|
||||
|
|
|
@ -3,7 +3,9 @@
|
|||
|
||||
#include <uapi/asm/param.h>
|
||||
|
||||
#define HZ CONFIG_HZ
|
||||
#define USER_HZ HZ
|
||||
# define CLOCKS_PER_SEC HZ /* frequency at which times() counts */
|
||||
# undef HZ
|
||||
# define HZ CONFIG_HZ
|
||||
# define USER_HZ 1024
|
||||
# define CLOCKS_PER_SEC USER_HZ /* frequency at which times() counts */
|
||||
|
||||
#endif /* _ASM_ALPHA_PARAM_H */
|
||||
|
|
|
@ -168,8 +168,4 @@ static inline void arch_write_unlock(arch_rwlock_t * lock)
|
|||
#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
|
||||
#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
|
||||
|
||||
#define arch_spin_relax(lock) cpu_relax()
|
||||
#define arch_read_relax(lock) cpu_relax()
|
||||
#define arch_write_relax(lock) cpu_relax()
|
||||
|
||||
#endif /* _ALPHA_SPINLOCK_H */
|
||||
|
|
|
@ -3,8 +3,7 @@
|
|||
|
||||
#include <uapi/asm/unistd.h>
|
||||
|
||||
|
||||
#define NR_SYSCALLS 506
|
||||
#define NR_SYSCALLS 508
|
||||
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
#define __ARCH_WANT_STAT64
|
||||
|
|
|
@ -1,13 +1,7 @@
|
|||
#ifndef _UAPI_ASM_ALPHA_PARAM_H
|
||||
#define _UAPI_ASM_ALPHA_PARAM_H
|
||||
|
||||
/* ??? Gross. I don't want to parameterize this, and supposedly the
|
||||
hardware ignores reprogramming. We also need userland buy-in to the
|
||||
change in HZ, since this is visible in the wait4 resources etc. */
|
||||
|
||||
#ifndef __KERNEL__
|
||||
#define HZ 1024
|
||||
#endif
|
||||
|
||||
#define EXEC_PAGESIZE 8192
|
||||
|
||||
|
@ -17,5 +11,4 @@
|
|||
|
||||
#define MAXHOSTNAMELEN 64 /* max length of hostname */
|
||||
|
||||
|
||||
#endif /* _UAPI_ASM_ALPHA_PARAM_H */
|
||||
|
|
|
@ -467,5 +467,7 @@
|
|||
#define __NR_sendmmsg 503
|
||||
#define __NR_process_vm_readv 504
|
||||
#define __NR_process_vm_writev 505
|
||||
#define __NR_kcmp 506
|
||||
#define __NR_finit_module 507
|
||||
|
||||
#endif /* _UAPI_ALPHA_UNISTD_H */
|
||||
|
|
|
@ -12,11 +12,32 @@
|
|||
|
||||
.text
|
||||
.set noat
|
||||
.cfi_sections .debug_frame
|
||||
|
||||
/* Stack offsets. */
|
||||
#define SP_OFF 184
|
||||
#define SWITCH_STACK_SIZE 320
|
||||
|
||||
.macro CFI_START_OSF_FRAME func
|
||||
.align 4
|
||||
.globl \func
|
||||
.type \func,@function
|
||||
\func:
|
||||
.cfi_startproc simple
|
||||
.cfi_return_column 64
|
||||
.cfi_def_cfa $sp, 48
|
||||
.cfi_rel_offset 64, 8
|
||||
.cfi_rel_offset $gp, 16
|
||||
.cfi_rel_offset $16, 24
|
||||
.cfi_rel_offset $17, 32
|
||||
.cfi_rel_offset $18, 40
|
||||
.endm
|
||||
|
||||
.macro CFI_END_OSF_FRAME func
|
||||
.cfi_endproc
|
||||
.size \func, . - \func
|
||||
.endm
|
||||
|
||||
/*
|
||||
* This defines the normal kernel pt-regs layout.
|
||||
*
|
||||
|
@ -27,100 +48,158 @@
|
|||
* the palcode-provided values are available to the signal handler.
|
||||
*/
|
||||
|
||||
#define SAVE_ALL \
|
||||
subq $sp, SP_OFF, $sp; \
|
||||
stq $0, 0($sp); \
|
||||
stq $1, 8($sp); \
|
||||
stq $2, 16($sp); \
|
||||
stq $3, 24($sp); \
|
||||
stq $4, 32($sp); \
|
||||
stq $28, 144($sp); \
|
||||
lda $2, alpha_mv; \
|
||||
stq $5, 40($sp); \
|
||||
stq $6, 48($sp); \
|
||||
stq $7, 56($sp); \
|
||||
stq $8, 64($sp); \
|
||||
stq $19, 72($sp); \
|
||||
stq $20, 80($sp); \
|
||||
stq $21, 88($sp); \
|
||||
ldq $2, HAE_CACHE($2); \
|
||||
stq $22, 96($sp); \
|
||||
stq $23, 104($sp); \
|
||||
stq $24, 112($sp); \
|
||||
stq $25, 120($sp); \
|
||||
stq $26, 128($sp); \
|
||||
stq $27, 136($sp); \
|
||||
stq $2, 152($sp); \
|
||||
stq $16, 160($sp); \
|
||||
stq $17, 168($sp); \
|
||||
.macro SAVE_ALL
|
||||
subq $sp, SP_OFF, $sp
|
||||
.cfi_adjust_cfa_offset SP_OFF
|
||||
stq $0, 0($sp)
|
||||
stq $1, 8($sp)
|
||||
stq $2, 16($sp)
|
||||
stq $3, 24($sp)
|
||||
stq $4, 32($sp)
|
||||
stq $28, 144($sp)
|
||||
.cfi_rel_offset $0, 0
|
||||
.cfi_rel_offset $1, 8
|
||||
.cfi_rel_offset $2, 16
|
||||
.cfi_rel_offset $3, 24
|
||||
.cfi_rel_offset $4, 32
|
||||
.cfi_rel_offset $28, 144
|
||||
lda $2, alpha_mv
|
||||
stq $5, 40($sp)
|
||||
stq $6, 48($sp)
|
||||
stq $7, 56($sp)
|
||||
stq $8, 64($sp)
|
||||
stq $19, 72($sp)
|
||||
stq $20, 80($sp)
|
||||
stq $21, 88($sp)
|
||||
ldq $2, HAE_CACHE($2)
|
||||
stq $22, 96($sp)
|
||||
stq $23, 104($sp)
|
||||
stq $24, 112($sp)
|
||||
stq $25, 120($sp)
|
||||
stq $26, 128($sp)
|
||||
stq $27, 136($sp)
|
||||
stq $2, 152($sp)
|
||||
stq $16, 160($sp)
|
||||
stq $17, 168($sp)
|
||||
stq $18, 176($sp)
|
||||
.cfi_rel_offset $5, 40
|
||||
.cfi_rel_offset $6, 48
|
||||
.cfi_rel_offset $7, 56
|
||||
.cfi_rel_offset $8, 64
|
||||
.cfi_rel_offset $19, 72
|
||||
.cfi_rel_offset $20, 80
|
||||
.cfi_rel_offset $21, 88
|
||||
.cfi_rel_offset $22, 96
|
||||
.cfi_rel_offset $23, 104
|
||||
.cfi_rel_offset $24, 112
|
||||
.cfi_rel_offset $25, 120
|
||||
.cfi_rel_offset $26, 128
|
||||
.cfi_rel_offset $27, 136
|
||||
.endm
|
||||
|
||||
#define RESTORE_ALL \
|
||||
lda $19, alpha_mv; \
|
||||
ldq $0, 0($sp); \
|
||||
ldq $1, 8($sp); \
|
||||
ldq $2, 16($sp); \
|
||||
ldq $3, 24($sp); \
|
||||
ldq $21, 152($sp); \
|
||||
ldq $20, HAE_CACHE($19); \
|
||||
ldq $4, 32($sp); \
|
||||
ldq $5, 40($sp); \
|
||||
ldq $6, 48($sp); \
|
||||
ldq $7, 56($sp); \
|
||||
subq $20, $21, $20; \
|
||||
ldq $8, 64($sp); \
|
||||
beq $20, 99f; \
|
||||
ldq $20, HAE_REG($19); \
|
||||
stq $21, HAE_CACHE($19); \
|
||||
stq $21, 0($20); \
|
||||
99:; \
|
||||
ldq $19, 72($sp); \
|
||||
ldq $20, 80($sp); \
|
||||
ldq $21, 88($sp); \
|
||||
ldq $22, 96($sp); \
|
||||
ldq $23, 104($sp); \
|
||||
ldq $24, 112($sp); \
|
||||
ldq $25, 120($sp); \
|
||||
ldq $26, 128($sp); \
|
||||
ldq $27, 136($sp); \
|
||||
ldq $28, 144($sp); \
|
||||
.macro RESTORE_ALL
|
||||
lda $19, alpha_mv
|
||||
ldq $0, 0($sp)
|
||||
ldq $1, 8($sp)
|
||||
ldq $2, 16($sp)
|
||||
ldq $3, 24($sp)
|
||||
ldq $21, 152($sp)
|
||||
ldq $20, HAE_CACHE($19)
|
||||
ldq $4, 32($sp)
|
||||
ldq $5, 40($sp)
|
||||
ldq $6, 48($sp)
|
||||
ldq $7, 56($sp)
|
||||
subq $20, $21, $20
|
||||
ldq $8, 64($sp)
|
||||
beq $20, 99f
|
||||
ldq $20, HAE_REG($19)
|
||||
stq $21, HAE_CACHE($19)
|
||||
stq $21, 0($20)
|
||||
99: ldq $19, 72($sp)
|
||||
ldq $20, 80($sp)
|
||||
ldq $21, 88($sp)
|
||||
ldq $22, 96($sp)
|
||||
ldq $23, 104($sp)
|
||||
ldq $24, 112($sp)
|
||||
ldq $25, 120($sp)
|
||||
ldq $26, 128($sp)
|
||||
ldq $27, 136($sp)
|
||||
ldq $28, 144($sp)
|
||||
addq $sp, SP_OFF, $sp
|
||||
.cfi_restore $0
|
||||
.cfi_restore $1
|
||||
.cfi_restore $2
|
||||
.cfi_restore $3
|
||||
.cfi_restore $4
|
||||
.cfi_restore $5
|
||||
.cfi_restore $6
|
||||
.cfi_restore $7
|
||||
.cfi_restore $8
|
||||
.cfi_restore $19
|
||||
.cfi_restore $20
|
||||
.cfi_restore $21
|
||||
.cfi_restore $22
|
||||
.cfi_restore $23
|
||||
.cfi_restore $24
|
||||
.cfi_restore $25
|
||||
.cfi_restore $26
|
||||
.cfi_restore $27
|
||||
.cfi_restore $28
|
||||
.cfi_adjust_cfa_offset -SP_OFF
|
||||
.endm
|
||||
|
||||
.macro DO_SWITCH_STACK
|
||||
bsr $1, do_switch_stack
|
||||
.cfi_adjust_cfa_offset SWITCH_STACK_SIZE
|
||||
.cfi_rel_offset $9, 0
|
||||
.cfi_rel_offset $10, 8
|
||||
.cfi_rel_offset $11, 16
|
||||
.cfi_rel_offset $12, 24
|
||||
.cfi_rel_offset $13, 32
|
||||
.cfi_rel_offset $14, 40
|
||||
.cfi_rel_offset $15, 48
|
||||
/* We don't really care about the FP registers for debugging. */
|
||||
.endm
|
||||
|
||||
.macro UNDO_SWITCH_STACK
|
||||
bsr $1, undo_switch_stack
|
||||
.cfi_restore $9
|
||||
.cfi_restore $10
|
||||
.cfi_restore $11
|
||||
.cfi_restore $12
|
||||
.cfi_restore $13
|
||||
.cfi_restore $14
|
||||
.cfi_restore $15
|
||||
.cfi_adjust_cfa_offset -SWITCH_STACK_SIZE
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Non-syscall kernel entry points.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
.globl entInt
|
||||
.ent entInt
|
||||
entInt:
|
||||
CFI_START_OSF_FRAME entInt
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
lda $26, ret_from_sys_call
|
||||
bic $sp, $8, $8
|
||||
mov $sp, $19
|
||||
jsr $31, do_entInt
|
||||
.end entInt
|
||||
CFI_END_OSF_FRAME entInt
|
||||
|
||||
.align 4
|
||||
.globl entArith
|
||||
.ent entArith
|
||||
entArith:
|
||||
CFI_START_OSF_FRAME entArith
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
lda $26, ret_from_sys_call
|
||||
bic $sp, $8, $8
|
||||
mov $sp, $18
|
||||
jsr $31, do_entArith
|
||||
.end entArith
|
||||
CFI_END_OSF_FRAME entArith
|
||||
|
||||
.align 4
|
||||
.globl entMM
|
||||
.ent entMM
|
||||
entMM:
|
||||
CFI_START_OSF_FRAME entMM
|
||||
SAVE_ALL
|
||||
/* save $9 - $15 so the inline exception code can manipulate them. */
|
||||
subq $sp, 56, $sp
|
||||
.cfi_adjust_cfa_offset 56
|
||||
stq $9, 0($sp)
|
||||
stq $10, 8($sp)
|
||||
stq $11, 16($sp)
|
||||
|
@ -128,6 +207,13 @@ entMM:
|
|||
stq $13, 32($sp)
|
||||
stq $14, 40($sp)
|
||||
stq $15, 48($sp)
|
||||
.cfi_rel_offset $9, 0
|
||||
.cfi_rel_offset $10, 8
|
||||
.cfi_rel_offset $11, 16
|
||||
.cfi_rel_offset $12, 24
|
||||
.cfi_rel_offset $13, 32
|
||||
.cfi_rel_offset $14, 40
|
||||
.cfi_rel_offset $15, 48
|
||||
addq $sp, 56, $19
|
||||
/* handle the fault */
|
||||
lda $8, 0x3fff
|
||||
|
@ -142,28 +228,33 @@ entMM:
|
|||
ldq $14, 40($sp)
|
||||
ldq $15, 48($sp)
|
||||
addq $sp, 56, $sp
|
||||
.cfi_restore $9
|
||||
.cfi_restore $10
|
||||
.cfi_restore $11
|
||||
.cfi_restore $12
|
||||
.cfi_restore $13
|
||||
.cfi_restore $14
|
||||
.cfi_restore $15
|
||||
.cfi_adjust_cfa_offset -56
|
||||
/* finish up the syscall as normal. */
|
||||
br ret_from_sys_call
|
||||
.end entMM
|
||||
CFI_END_OSF_FRAME entMM
|
||||
|
||||
.align 4
|
||||
.globl entIF
|
||||
.ent entIF
|
||||
entIF:
|
||||
CFI_START_OSF_FRAME entIF
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
lda $26, ret_from_sys_call
|
||||
bic $sp, $8, $8
|
||||
mov $sp, $17
|
||||
jsr $31, do_entIF
|
||||
.end entIF
|
||||
CFI_END_OSF_FRAME entIF
|
||||
|
||||
.align 4
|
||||
.globl entUna
|
||||
.ent entUna
|
||||
entUna:
|
||||
CFI_START_OSF_FRAME entUna
|
||||
lda $sp, -256($sp)
|
||||
.cfi_adjust_cfa_offset 256
|
||||
stq $0, 0($sp)
|
||||
.cfi_rel_offset $0, 0
|
||||
.cfi_remember_state
|
||||
ldq $0, 256($sp) /* get PS */
|
||||
stq $1, 8($sp)
|
||||
stq $2, 16($sp)
|
||||
|
@ -195,6 +286,32 @@ entUna:
|
|||
stq $28, 224($sp)
|
||||
mov $sp, $19
|
||||
stq $gp, 232($sp)
|
||||
.cfi_rel_offset $1, 1*8
|
||||
.cfi_rel_offset $2, 2*8
|
||||
.cfi_rel_offset $3, 3*8
|
||||
.cfi_rel_offset $4, 4*8
|
||||
.cfi_rel_offset $5, 5*8
|
||||
.cfi_rel_offset $6, 6*8
|
||||
.cfi_rel_offset $7, 7*8
|
||||
.cfi_rel_offset $8, 8*8
|
||||
.cfi_rel_offset $9, 9*8
|
||||
.cfi_rel_offset $10, 10*8
|
||||
.cfi_rel_offset $11, 11*8
|
||||
.cfi_rel_offset $12, 12*8
|
||||
.cfi_rel_offset $13, 13*8
|
||||
.cfi_rel_offset $14, 14*8
|
||||
.cfi_rel_offset $15, 15*8
|
||||
.cfi_rel_offset $19, 19*8
|
||||
.cfi_rel_offset $20, 20*8
|
||||
.cfi_rel_offset $21, 21*8
|
||||
.cfi_rel_offset $22, 22*8
|
||||
.cfi_rel_offset $23, 23*8
|
||||
.cfi_rel_offset $24, 24*8
|
||||
.cfi_rel_offset $25, 25*8
|
||||
.cfi_rel_offset $26, 26*8
|
||||
.cfi_rel_offset $27, 27*8
|
||||
.cfi_rel_offset $28, 28*8
|
||||
.cfi_rel_offset $29, 29*8
|
||||
lda $8, 0x3fff
|
||||
stq $31, 248($sp)
|
||||
bic $sp, $8, $8
|
||||
|
@ -228,16 +345,45 @@ entUna:
|
|||
ldq $28, 224($sp)
|
||||
ldq $gp, 232($sp)
|
||||
lda $sp, 256($sp)
|
||||
.cfi_restore $1
|
||||
.cfi_restore $2
|
||||
.cfi_restore $3
|
||||
.cfi_restore $4
|
||||
.cfi_restore $5
|
||||
.cfi_restore $6
|
||||
.cfi_restore $7
|
||||
.cfi_restore $8
|
||||
.cfi_restore $9
|
||||
.cfi_restore $10
|
||||
.cfi_restore $11
|
||||
.cfi_restore $12
|
||||
.cfi_restore $13
|
||||
.cfi_restore $14
|
||||
.cfi_restore $15
|
||||
.cfi_restore $19
|
||||
.cfi_restore $20
|
||||
.cfi_restore $21
|
||||
.cfi_restore $22
|
||||
.cfi_restore $23
|
||||
.cfi_restore $24
|
||||
.cfi_restore $25
|
||||
.cfi_restore $26
|
||||
.cfi_restore $27
|
||||
.cfi_restore $28
|
||||
.cfi_restore $29
|
||||
.cfi_adjust_cfa_offset -256
|
||||
call_pal PAL_rti
|
||||
.end entUna
|
||||
|
||||
.align 4
|
||||
.ent entUnaUser
|
||||
entUnaUser:
|
||||
.cfi_restore_state
|
||||
ldq $0, 0($sp) /* restore original $0 */
|
||||
lda $sp, 256($sp) /* pop entUna's stack frame */
|
||||
.cfi_restore $0
|
||||
.cfi_adjust_cfa_offset -256
|
||||
SAVE_ALL /* setup normal kernel stack */
|
||||
lda $sp, -56($sp)
|
||||
.cfi_adjust_cfa_offset 56
|
||||
stq $9, 0($sp)
|
||||
stq $10, 8($sp)
|
||||
stq $11, 16($sp)
|
||||
|
@ -245,6 +391,13 @@ entUnaUser:
|
|||
stq $13, 32($sp)
|
||||
stq $14, 40($sp)
|
||||
stq $15, 48($sp)
|
||||
.cfi_rel_offset $9, 0
|
||||
.cfi_rel_offset $10, 8
|
||||
.cfi_rel_offset $11, 16
|
||||
.cfi_rel_offset $12, 24
|
||||
.cfi_rel_offset $13, 32
|
||||
.cfi_rel_offset $14, 40
|
||||
.cfi_rel_offset $15, 48
|
||||
lda $8, 0x3fff
|
||||
addq $sp, 56, $19
|
||||
bic $sp, $8, $8
|
||||
|
@ -257,20 +410,25 @@ entUnaUser:
|
|||
ldq $14, 40($sp)
|
||||
ldq $15, 48($sp)
|
||||
lda $sp, 56($sp)
|
||||
.cfi_restore $9
|
||||
.cfi_restore $10
|
||||
.cfi_restore $11
|
||||
.cfi_restore $12
|
||||
.cfi_restore $13
|
||||
.cfi_restore $14
|
||||
.cfi_restore $15
|
||||
.cfi_adjust_cfa_offset -56
|
||||
br ret_from_sys_call
|
||||
.end entUnaUser
|
||||
CFI_END_OSF_FRAME entUna
|
||||
|
||||
.align 4
|
||||
.globl entDbg
|
||||
.ent entDbg
|
||||
entDbg:
|
||||
CFI_START_OSF_FRAME entDbg
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
lda $26, ret_from_sys_call
|
||||
bic $sp, $8, $8
|
||||
mov $sp, $16
|
||||
jsr $31, do_entDbg
|
||||
.end entDbg
|
||||
CFI_END_OSF_FRAME entDbg
|
||||
|
||||
/*
|
||||
* The system call entry point is special. Most importantly, it looks
|
||||
|
@ -285,8 +443,12 @@ entDbg:
|
|||
|
||||
.align 4
|
||||
.globl entSys
|
||||
.globl ret_from_sys_call
|
||||
.ent entSys
|
||||
.type entSys, @function
|
||||
.cfi_startproc simple
|
||||
.cfi_return_column 64
|
||||
.cfi_def_cfa $sp, 48
|
||||
.cfi_rel_offset 64, 8
|
||||
.cfi_rel_offset $gp, 16
|
||||
entSys:
|
||||
SAVE_ALL
|
||||
lda $8, 0x3fff
|
||||
|
@ -300,6 +462,9 @@ entSys:
|
|||
stq $17, SP_OFF+32($sp)
|
||||
s8addq $0, $5, $5
|
||||
stq $18, SP_OFF+40($sp)
|
||||
.cfi_rel_offset $16, SP_OFF+24
|
||||
.cfi_rel_offset $17, SP_OFF+32
|
||||
.cfi_rel_offset $18, SP_OFF+40
|
||||
blbs $3, strace
|
||||
beq $4, 1f
|
||||
ldq $27, 0($5)
|
||||
|
@ -310,6 +475,7 @@ entSys:
|
|||
stq $31, 72($sp) /* a3=0 => no error */
|
||||
|
||||
.align 4
|
||||
.globl ret_from_sys_call
|
||||
ret_from_sys_call:
|
||||
cmovne $26, 0, $18 /* $18 = 0 => non-restartable */
|
||||
ldq $0, SP_OFF($sp)
|
||||
|
@ -324,10 +490,12 @@ ret_to_user:
|
|||
and $17, _TIF_WORK_MASK, $2
|
||||
bne $2, work_pending
|
||||
restore_all:
|
||||
.cfi_remember_state
|
||||
RESTORE_ALL
|
||||
call_pal PAL_rti
|
||||
|
||||
ret_to_kernel:
|
||||
.cfi_restore_state
|
||||
lda $16, 7
|
||||
call_pal PAL_swpipl
|
||||
br restore_all
|
||||
|
@ -356,7 +524,6 @@ $ret_success:
|
|||
stq $0, 0($sp)
|
||||
stq $31, 72($sp) /* a3=0 => no error */
|
||||
br ret_from_sys_call
|
||||
.end entSys
|
||||
|
||||
/*
|
||||
* Do all cleanup when returning from all interrupts and system calls.
|
||||
|
@ -370,7 +537,7 @@ $ret_success:
|
|||
*/
|
||||
|
||||
.align 4
|
||||
.ent work_pending
|
||||
.type work_pending, @function
|
||||
work_pending:
|
||||
and $17, _TIF_NOTIFY_RESUME | _TIF_SIGPENDING, $2
|
||||
bne $2, $work_notifysig
|
||||
|
@ -387,23 +554,22 @@ $work_resched:
|
|||
|
||||
$work_notifysig:
|
||||
mov $sp, $16
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
jsr $26, do_work_pending
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
br restore_all
|
||||
.end work_pending
|
||||
|
||||
/*
|
||||
* PTRACE syscall handler
|
||||
*/
|
||||
|
||||
.align 4
|
||||
.ent strace
|
||||
.type strace, @function
|
||||
strace:
|
||||
/* set up signal stack, call syscall_trace */
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
jsr $26, syscall_trace_enter /* returns the syscall number */
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
|
||||
/* get the arguments back.. */
|
||||
ldq $16, SP_OFF+24($sp)
|
||||
|
@ -431,9 +597,9 @@ ret_from_straced:
|
|||
$strace_success:
|
||||
stq $0, 0($sp) /* save return value */
|
||||
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
jsr $26, syscall_trace_leave
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
br $31, ret_from_sys_call
|
||||
|
||||
.align 3
|
||||
|
@ -447,26 +613,31 @@ $strace_error:
|
|||
stq $0, 0($sp)
|
||||
stq $1, 72($sp) /* a3 for return */
|
||||
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
mov $18, $9 /* save old syscall number */
|
||||
mov $19, $10 /* save old a3 */
|
||||
jsr $26, syscall_trace_leave
|
||||
mov $9, $18
|
||||
mov $10, $19
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
|
||||
mov $31, $26 /* tell "ret_from_sys_call" we can restart */
|
||||
br ret_from_sys_call
|
||||
.end strace
|
||||
CFI_END_OSF_FRAME entSys
|
||||
|
||||
/*
|
||||
* Save and restore the switch stack -- aka the balance of the user context.
|
||||
*/
|
||||
|
||||
.align 4
|
||||
.ent do_switch_stack
|
||||
.type do_switch_stack, @function
|
||||
.cfi_startproc simple
|
||||
.cfi_return_column 64
|
||||
.cfi_def_cfa $sp, 0
|
||||
.cfi_register 64, $1
|
||||
do_switch_stack:
|
||||
lda $sp, -SWITCH_STACK_SIZE($sp)
|
||||
.cfi_adjust_cfa_offset SWITCH_STACK_SIZE
|
||||
stq $9, 0($sp)
|
||||
stq $10, 8($sp)
|
||||
stq $11, 16($sp)
|
||||
|
@ -510,10 +681,14 @@ do_switch_stack:
|
|||
stt $f0, 312($sp) # save fpcr in slot of $f31
|
||||
ldt $f0, 64($sp) # dont let "do_switch_stack" change fp state.
|
||||
ret $31, ($1), 1
|
||||
.end do_switch_stack
|
||||
.cfi_endproc
|
||||
.size do_switch_stack, .-do_switch_stack
|
||||
|
||||
.align 4
|
||||
.ent undo_switch_stack
|
||||
.type undo_switch_stack, @function
|
||||
.cfi_startproc simple
|
||||
.cfi_def_cfa $sp, 0
|
||||
.cfi_register 64, $1
|
||||
undo_switch_stack:
|
||||
ldq $9, 0($sp)
|
||||
ldq $10, 8($sp)
|
||||
|
@ -558,7 +733,8 @@ undo_switch_stack:
|
|||
ldt $f30, 304($sp)
|
||||
lda $sp, SWITCH_STACK_SIZE($sp)
|
||||
ret $31, ($1), 1
|
||||
.end undo_switch_stack
|
||||
.cfi_endproc
|
||||
.size undo_switch_stack, .-undo_switch_stack
|
||||
|
||||
/*
|
||||
* The meat of the context switch code.
|
||||
|
@ -566,17 +742,18 @@ undo_switch_stack:
|
|||
|
||||
.align 4
|
||||
.globl alpha_switch_to
|
||||
.ent alpha_switch_to
|
||||
.type alpha_switch_to, @function
|
||||
.cfi_startproc
|
||||
alpha_switch_to:
|
||||
.prologue 0
|
||||
bsr $1, do_switch_stack
|
||||
DO_SWITCH_STACK
|
||||
call_pal PAL_swpctx
|
||||
lda $8, 0x3fff
|
||||
bsr $1, undo_switch_stack
|
||||
UNDO_SWITCH_STACK
|
||||
bic $sp, $8, $8
|
||||
mov $17, $0
|
||||
ret
|
||||
.end alpha_switch_to
|
||||
.cfi_endproc
|
||||
.size alpha_switch_to, .-alpha_switch_to
|
||||
|
||||
/*
|
||||
* New processes begin life here.
|
||||
|
|
|
@ -236,7 +236,7 @@ void __init
|
|||
init_rtc_irq(void)
|
||||
{
|
||||
irq_set_chip_and_handler_name(RTC_IRQ, &dummy_irq_chip,
|
||||
handle_simple_irq, "RTC");
|
||||
handle_percpu_irq, "RTC");
|
||||
setup_irq(RTC_IRQ, &timer_irqaction);
|
||||
}
|
||||
|
||||
|
|
|
@ -264,9 +264,10 @@ recv_secondary_console_msg(void)
|
|||
if (cnt <= 0 || cnt >= 80)
|
||||
strcpy(buf, "<<< BOGUS MSG >>>");
|
||||
else {
|
||||
cp1 = (char *) &cpu->ipc_buffer[11];
|
||||
cp1 = (char *) &cpu->ipc_buffer[1];
|
||||
cp2 = buf;
|
||||
strcpy(cp2, cp1);
|
||||
memcpy(cp2, cp1, cnt);
|
||||
cp2[cnt] = '\0';
|
||||
|
||||
while ((cp2 = strchr(cp2, '\r')) != 0) {
|
||||
*cp2 = ' ';
|
||||
|
|
|
@ -190,9 +190,6 @@ static struct irq_chip clipper_irq_type = {
|
|||
static void
|
||||
dp264_device_interrupt(unsigned long vector)
|
||||
{
|
||||
#if 1
|
||||
printk("dp264_device_interrupt: NOT IMPLEMENTED YET!!\n");
|
||||
#else
|
||||
unsigned long pld;
|
||||
unsigned int i;
|
||||
|
||||
|
@ -210,12 +207,7 @@ dp264_device_interrupt(unsigned long vector)
|
|||
isa_device_interrupt(vector);
|
||||
else
|
||||
handle_irq(16 + i);
|
||||
#if 0
|
||||
TSUNAMI_cchip->dir0.csr = 1UL << i; mb();
|
||||
tmp = TSUNAMI_cchip->dir0.csr;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
@ -317,8 +317,9 @@ marvel_init_irq(void)
|
|||
}
|
||||
|
||||
static int
|
||||
marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
|
||||
marvel_map_irq(const struct pci_dev *cdev, u8 slot, u8 pin)
|
||||
{
|
||||
struct pci_dev *dev = (struct pci_dev *)cdev;
|
||||
struct pci_controller *hose = dev->sysdata;
|
||||
struct io7_port *io7_port = hose->sysdata;
|
||||
struct io7 *io7 = io7_port->io7;
|
||||
|
|
|
@ -524,6 +524,8 @@ sys_call_table:
|
|||
.quad sys_sendmmsg
|
||||
.quad sys_process_vm_readv
|
||||
.quad sys_process_vm_writev /* 505 */
|
||||
.quad sys_kcmp
|
||||
.quad sys_finit_module
|
||||
|
||||
.size sys_call_table, . - sys_call_table
|
||||
.type sys_call_table, @object
|
||||
|
|
|
@ -105,9 +105,7 @@ void arch_irq_work_raise(void)
|
|||
|
||||
static inline __u32 rpcc(void)
|
||||
{
|
||||
__u32 result;
|
||||
asm volatile ("rpcc %0" : "=r"(result));
|
||||
return result;
|
||||
return __builtin_alpha_rpcc();
|
||||
}
|
||||
|
||||
int update_persistent_clock(struct timespec now)
|
||||
|
|
|
@ -66,8 +66,8 @@ dik_show_regs(struct pt_regs *regs, unsigned long *r9_15)
|
|||
{
|
||||
printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n",
|
||||
regs->pc, regs->r26, regs->ps, print_tainted());
|
||||
print_symbol("pc is at %s\n", regs->pc);
|
||||
print_symbol("ra is at %s\n", regs->r26 );
|
||||
printk("pc is at %pSR\n", (void *)regs->pc);
|
||||
printk("ra is at %pSR\n", (void *)regs->r26);
|
||||
printk("v0 = %016lx t0 = %016lx t1 = %016lx\n",
|
||||
regs->r0, regs->r1, regs->r2);
|
||||
printk("t2 = %016lx t3 = %016lx t4 = %016lx\n",
|
||||
|
@ -132,9 +132,7 @@ dik_show_trace(unsigned long *sp)
|
|||
continue;
|
||||
if (tmp >= (unsigned long) &_etext)
|
||||
continue;
|
||||
printk("[<%lx>]", tmp);
|
||||
print_symbol(" %s", tmp);
|
||||
printk("\n");
|
||||
printk("[<%lx>] %pSR\n", tmp, (void *)tmp);
|
||||
if (i > 40) {
|
||||
printk(" ...");
|
||||
break;
|
||||
|
|
|
@ -1600,8 +1600,7 @@ config LOCAL_TIMERS
|
|||
config ARCH_NR_GPIO
|
||||
int
|
||||
default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
|
||||
default 512 if SOC_OMAP5
|
||||
default 512 if ARCH_KEYSTONE
|
||||
default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5
|
||||
default 392 if ARCH_U8500
|
||||
default 352 if ARCH_VT8500
|
||||
default 288 if ARCH_SUNXI
|
||||
|
|
|
@ -485,6 +485,12 @@
|
|||
sirf,function = "usp0";
|
||||
};
|
||||
};
|
||||
usp0_uart_nostreamctrl_pins_a: usp0@1 {
|
||||
usp0 {
|
||||
sirf,pins = "usp0_uart_nostreamctrl_grp";
|
||||
sirf,function = "usp0_uart_nostreamctrl";
|
||||
};
|
||||
};
|
||||
usp1_pins_a: usp1@0 {
|
||||
usp1 {
|
||||
sirf,pins = "usp1grp";
|
||||
|
@ -515,16 +521,16 @@
|
|||
sirf,function = "pulse_count";
|
||||
};
|
||||
};
|
||||
cko0_rst_pins_a: cko0_rst@0 {
|
||||
cko0_rst {
|
||||
sirf,pins = "cko0_rstgrp";
|
||||
sirf,function = "cko0_rst";
|
||||
cko0_pins_a: cko0@0 {
|
||||
cko0 {
|
||||
sirf,pins = "cko0grp";
|
||||
sirf,function = "cko0";
|
||||
};
|
||||
};
|
||||
cko1_rst_pins_a: cko1_rst@0 {
|
||||
cko1_rst {
|
||||
sirf,pins = "cko1_rstgrp";
|
||||
sirf,function = "cko1_rst";
|
||||
cko1_pins_a: cko1@0 {
|
||||
cko1 {
|
||||
sirf,pins = "cko1grp";
|
||||
sirf,function = "cko1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -147,7 +147,7 @@
|
|||
reg = <0x0a>;
|
||||
VDDA-supply = <®_3p3v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
|
||||
clocks = <&saif0>;
|
||||
};
|
||||
|
||||
pcf8563: rtc@51 {
|
||||
|
|
|
@ -195,7 +195,7 @@
|
|||
reg = <0x0a>;
|
||||
VDDA-supply = <®_3p3v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
|
||||
clocks = <&saif0>;
|
||||
};
|
||||
|
||||
at24@51 {
|
||||
|
|
|
@ -184,7 +184,7 @@
|
|||
reg = <0x0a>;
|
||||
VDDA-supply = <®_3p3v>;
|
||||
VDDIO-supply = <®_3p3v>;
|
||||
|
||||
clocks = <&saif0>;
|
||||
};
|
||||
|
||||
eeprom: eeprom@51 {
|
||||
|
|
|
@ -837,6 +837,7 @@
|
|||
compatible = "fsl,imx28-saif";
|
||||
reg = <0x80042000 0x2000>;
|
||||
interrupts = <59 80>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&clks 53>;
|
||||
dmas = <&dma_apbx 4>;
|
||||
dma-names = "rx-tx";
|
||||
|
|
|
@ -61,6 +61,16 @@
|
|||
mux-int-port = <2>;
|
||||
mux-ext-port = <3>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
clk_26M: codec_clock {
|
||||
compatible = "fixed-clock";
|
||||
reg=<0>;
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <26000000>;
|
||||
gpios = <&gpio4 26 1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&esdhc1 {
|
||||
|
@ -229,6 +239,7 @@
|
|||
MX51_PAD_EIM_A27__GPIO2_21 0x5
|
||||
MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
|
||||
MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
|
||||
MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
@ -255,7 +266,7 @@
|
|||
sgtl5000: codec@0a {
|
||||
compatible = "fsl,sgtl5000";
|
||||
reg = <0x0a>;
|
||||
clock-frequency = <26000000>;
|
||||
clocks = <&clk_26M>;
|
||||
VDDA-supply = <&vdig_reg>;
|
||||
VDDIO-supply = <&vvideo_reg>;
|
||||
};
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
|
||||
backlight {
|
||||
compatible = "pwm-backlight";
|
||||
pwms = <&pwm2 0 50000 0 0>;
|
||||
pwms = <&pwm2 0 50000>;
|
||||
brightness-levels = <0 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 96 100>;
|
||||
default-brightness-level = <10>;
|
||||
enable-gpios = <&gpio7 7 0>;
|
||||
|
|
|
@ -725,15 +725,15 @@
|
|||
uart1 {
|
||||
pinctrl_uart1_1: uart1grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1c5
|
||||
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1c5
|
||||
MX53_PAD_CSI0_DAT10__UART1_TXD_MUX 0x1e4
|
||||
MX53_PAD_CSI0_DAT11__UART1_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1_2: uart1grp-2 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -748,8 +748,8 @@
|
|||
uart2 {
|
||||
pinctrl_uart2_1: uart2grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -766,17 +766,17 @@
|
|||
uart3 {
|
||||
pinctrl_uart3_1: uart3grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_DA_1__UART3_CTS 0x1c5
|
||||
MX53_PAD_PATA_DA_2__UART3_RTS 0x1c5
|
||||
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
|
||||
MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart3_2: uart3grp-2 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5
|
||||
MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
|
||||
MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -785,8 +785,8 @@
|
|||
uart4 {
|
||||
pinctrl_uart4_1: uart4grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1c5
|
||||
MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1c5
|
||||
MX53_PAD_KEY_COL0__UART4_TXD_MUX 0x1e4
|
||||
MX53_PAD_KEY_ROW0__UART4_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
@ -794,8 +794,8 @@
|
|||
uart5 {
|
||||
pinctrl_uart5_1: uart5grp-1 {
|
||||
fsl,pins = <
|
||||
MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1c5
|
||||
MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1c5
|
||||
MX53_PAD_KEY_COL1__UART5_TXD_MUX 0x1e4
|
||||
MX53_PAD_KEY_ROW1__UART5_RXD_MUX 0x1e4
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -515,16 +515,16 @@
|
|||
sirf,function = "pulse_count";
|
||||
};
|
||||
};
|
||||
cko0_rst_pins_a: cko0_rst@0 {
|
||||
cko0_rst {
|
||||
sirf,pins = "cko0_rstgrp";
|
||||
sirf,function = "cko0_rst";
|
||||
cko0_pins_a: cko0@0 {
|
||||
cko0 {
|
||||
sirf,pins = "cko0grp";
|
||||
sirf,function = "cko0";
|
||||
};
|
||||
};
|
||||
cko1_rst_pins_a: cko1_rst@0 {
|
||||
cko1_rst {
|
||||
sirf,pins = "cko1_rstgrp";
|
||||
sirf,function = "cko1_rst";
|
||||
cko1_pins_a: cko1@0 {
|
||||
cko1 {
|
||||
sirf,pins = "cko1grp";
|
||||
sirf,function = "cko1";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -166,6 +166,15 @@
|
|||
reg = <0x9000 0x100>;
|
||||
st,bank-name = "PIO31";
|
||||
};
|
||||
|
||||
serial2-oe {
|
||||
pinctrl_serial2_oe: serial2-1 {
|
||||
st,pins {
|
||||
output-enable = <&PIO11 3 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pin-controller-rear {
|
||||
|
@ -218,7 +227,6 @@
|
|||
st,pins {
|
||||
tx = <&PIO17 4 ALT2 OUT>;
|
||||
rx = <&PIO17 5 ALT2 IN>;
|
||||
output-enable = <&PIO11 3 ALT2 OUT>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -79,7 +79,7 @@
|
|||
interrupts = <0 197 0>;
|
||||
clocks = <&CLK_S_ICN_REG_0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_serial2>;
|
||||
pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
|
||||
};
|
||||
|
||||
/* SBC_UART1 */
|
||||
|
|
|
@ -47,6 +47,12 @@
|
|||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
||||
vmmc2: regulator-vmmc2 {
|
||||
compatible = "ti,twl4030-vmmc2";
|
||||
regulator-min-microvolt = <1850000>;
|
||||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
||||
vusb1v5: regulator-vusb1v5 {
|
||||
compatible = "ti,twl4030-vusb1v5";
|
||||
};
|
||||
|
|
|
@ -442,8 +442,8 @@
|
|||
compatible = "fsl,mvf600-fec";
|
||||
reg = <0x400d0000 0x1000>;
|
||||
interrupts = <0 78 0x04>;
|
||||
clocks = <&clks VF610_CLK_ENET>,
|
||||
<&clks VF610_CLK_ENET>,
|
||||
clocks = <&clks VF610_CLK_ENET0>,
|
||||
<&clks VF610_CLK_ENET0>,
|
||||
<&clks VF610_CLK_ENET>;
|
||||
clock-names = "ipg", "ahb", "ptp";
|
||||
status = "disabled";
|
||||
|
@ -453,8 +453,8 @@
|
|||
compatible = "fsl,mvf600-fec";
|
||||
reg = <0x400d1000 0x1000>;
|
||||
interrupts = <0 79 0x04>;
|
||||
clocks = <&clks VF610_CLK_ENET>,
|
||||
<&clks VF610_CLK_ENET>,
|
||||
clocks = <&clks VF610_CLK_ENET1>,
|
||||
<&clks VF610_CLK_ENET1>,
|
||||
<&clks VF610_CLK_ENET>;
|
||||
clock-names = "ipg", "ahb", "ptp";
|
||||
status = "disabled";
|
||||
|
|
|
@ -26,7 +26,6 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/edma.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
#include <linux/of_dma.h>
|
||||
|
|
|
@ -102,6 +102,8 @@ CONFIG_SND_SOC=m
|
|||
CONFIG_SND_DAVINCI_SOC=m
|
||||
# CONFIG_HID_SUPPORT is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_TI_EDMA=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_XFS_FS=m
|
||||
|
|
|
@ -162,6 +162,8 @@ CONFIG_LEDS_TRIGGERS=y
|
|||
CONFIG_LEDS_TRIGGER_TIMER=m
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=m
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_TI_EDMA=y
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_XFS_FS=m
|
||||
|
|
|
@ -53,6 +53,7 @@ CONFIG_IP_PNP=y
|
|||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DEVTMPFS_MOUNT=y
|
||||
CONFIG_OMAP_OCP2SCP=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_SATA_AHCI_PLATFORM=y
|
||||
|
@ -61,6 +62,7 @@ CONFIG_SATA_MV=y
|
|||
CONFIG_NETDEVICES=y
|
||||
CONFIG_SUN4I_EMAC=y
|
||||
CONFIG_NET_CALXEDA_XGMAC=y
|
||||
CONFIG_KS8851=y
|
||||
CONFIG_SMSC911X=y
|
||||
CONFIG_STMMAC_ETH=y
|
||||
CONFIG_MDIO_SUN4I=y
|
||||
|
@ -89,6 +91,7 @@ CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
|||
CONFIG_I2C_SIRF=y
|
||||
CONFIG_I2C_TEGRA=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_OMAP24XX=y
|
||||
CONFIG_SPI_PL022=y
|
||||
CONFIG_SPI_SIRF=y
|
||||
CONFIG_SPI_TEGRA114=y
|
||||
|
@ -111,11 +114,12 @@ CONFIG_FB_SIMPLE=y
|
|||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_MXC=y
|
||||
CONFIG_USB_EHCI_TEGRA=y
|
||||
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||
CONFIG_USB_ISP1760_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_AB8500_USB=y
|
||||
CONFIG_NOP_USB_XCEIV=y
|
||||
CONFIG_OMAP_USB2=y
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
|
@ -48,7 +50,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
|||
CONFIG_MTD=y
|
||||
CONFIG_MTD_TESTS=m
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_NAND_ECC_SMC=y
|
||||
CONFIG_MTD_NAND=y
|
||||
|
@ -94,8 +95,10 @@ CONFIG_I2C_GPIO=y
|
|||
CONFIG_I2C_NOMADIK=y
|
||||
CONFIG_DEBUG_GPIO=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_CLKGATE=y
|
||||
CONFIG_MMC_UNSAFE_RESUME=y
|
||||
# CONFIG_MMC_BLOCK_BOUNCE is not set
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
|
|
|
@ -505,7 +505,7 @@ static struct vpbe_output dm365evm_vpbe_outputs[] = {
|
|||
/*
|
||||
* Amplifiers on the board
|
||||
*/
|
||||
struct ths7303_platform_data ths7303_pdata = {
|
||||
static struct ths7303_platform_data ths7303_pdata = {
|
||||
.ch_1 = 3,
|
||||
.ch_2 = 3,
|
||||
.ch_3 = 3,
|
||||
|
|
|
@ -860,7 +860,7 @@ static struct platform_device dm355_vpbe_display = {
|
|||
},
|
||||
};
|
||||
|
||||
struct venc_platform_data dm355_venc_pdata = {
|
||||
static struct venc_platform_data dm355_venc_pdata = {
|
||||
.setup_pinmux = dm355_vpbe_setup_pinmux,
|
||||
.setup_clock = dm355_venc_setup_clock,
|
||||
};
|
||||
|
|
|
@ -1349,7 +1349,7 @@ static struct platform_device dm365_vpbe_display = {
|
|||
},
|
||||
};
|
||||
|
||||
struct venc_platform_data dm365_venc_pdata = {
|
||||
static struct venc_platform_data dm365_venc_pdata = {
|
||||
.setup_pinmux = dm365_vpbe_setup_pinmux,
|
||||
.setup_clock = dm365_venc_setup_clock,
|
||||
};
|
||||
|
|
|
@ -92,6 +92,7 @@ config SOC_EXYNOS5440
|
|||
bool "SAMSUNG EXYNOS5440"
|
||||
default y
|
||||
depends on ARCH_EXYNOS5
|
||||
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
|
||||
select ARCH_HAS_OPP
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select AUTO_ZRELADDR
|
||||
|
|
|
@ -14,7 +14,7 @@ obj- :=
|
|||
|
||||
obj-$(CONFIG_ARCH_EXYNOS) += common.o
|
||||
|
||||
obj-$(CONFIG_PM) += pm.o
|
||||
obj-$(CONFIG_S5P_PM) += pm.o
|
||||
obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
|
||||
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
|
||||
|
||||
|
|
|
@ -58,7 +58,6 @@ static const char name_exynos5440[] = "EXYNOS5440";
|
|||
|
||||
static void exynos4_map_io(void);
|
||||
static void exynos5_map_io(void);
|
||||
static void exynos5440_map_io(void);
|
||||
static int exynos_init(void);
|
||||
|
||||
static struct cpu_table cpu_ids[] __initdata = {
|
||||
|
@ -95,7 +94,6 @@ static struct cpu_table cpu_ids[] __initdata = {
|
|||
}, {
|
||||
.idcode = EXYNOS5440_SOC_ID,
|
||||
.idmask = EXYNOS5_SOC_MASK,
|
||||
.map_io = exynos5440_map_io,
|
||||
.init = exynos_init,
|
||||
.name = name_exynos5440,
|
||||
},
|
||||
|
@ -149,11 +147,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_UART),
|
||||
.length = SZ_512K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_CMU,
|
||||
.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
|
||||
|
@ -268,20 +261,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
|
|||
.pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(EXYNOS5_PA_UART),
|
||||
.length = SZ_512K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct map_desc exynos5440_iodesc0[] __initdata = {
|
||||
{
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(EXYNOS5440_PA_UART0),
|
||||
.length = SZ_512K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -388,11 +367,6 @@ static void __init exynos5_map_io(void)
|
|||
iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
|
||||
}
|
||||
|
||||
static void __init exynos5440_map_io(void)
|
||||
{
|
||||
iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
|
||||
}
|
||||
|
||||
void __init exynos_init_time(void)
|
||||
{
|
||||
of_clk_init(NULL);
|
||||
|
|
|
@ -97,6 +97,5 @@ struct exynos_pmu_conf {
|
|||
};
|
||||
|
||||
extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
|
||||
extern void s3c_cpu_resume(void);
|
||||
|
||||
#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <mach/regs-pmu.h>
|
||||
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/pm.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
|
|
|
@ -15,8 +15,13 @@
|
|||
|
||||
#define PLAT_PHYS_OFFSET UL(0x40000000)
|
||||
|
||||
#ifndef CONFIG_ARM_LPAE
|
||||
/* Maximum of 256MiB in one bank */
|
||||
#define MAX_PHYSMEM_BITS 32
|
||||
#define SECTION_SIZE_BITS 28
|
||||
#else
|
||||
#define MAX_PHYSMEM_BITS 36
|
||||
#define SECTION_SIZE_BITS 31
|
||||
#endif
|
||||
|
||||
#endif /* __ASM_ARCH_MEMORY_H */
|
||||
|
|
|
@ -217,6 +217,9 @@ static __init int exynos_pm_drvinit(void)
|
|||
struct clk *pll_base;
|
||||
unsigned int tmp;
|
||||
|
||||
if (soc_is_exynos5440())
|
||||
return 0;
|
||||
|
||||
s3c_pm_init();
|
||||
|
||||
/* All wakeup disable */
|
||||
|
@ -340,6 +343,9 @@ static struct syscore_ops exynos_pm_syscore_ops = {
|
|||
|
||||
static __init int exynos_pm_syscore_init(void)
|
||||
{
|
||||
if (soc_is_exynos5440())
|
||||
return 0;
|
||||
|
||||
register_syscore_ops(&exynos_pm_syscore_ops);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -276,8 +276,6 @@ int __init dc21285_setup(int nr, struct pci_sys_data *sys)
|
|||
|
||||
sys->mem_offset = DC21285_PCI_MEM;
|
||||
|
||||
pci_ioremap_io(0, DC21285_PCI_IO);
|
||||
|
||||
pci_add_resource_offset(&sys->resources, &res[0], sys->mem_offset);
|
||||
pci_add_resource_offset(&sys->resources, &res[1], sys->mem_offset);
|
||||
|
||||
|
|
|
@ -115,6 +115,7 @@ static int highbank_platform_notifier(struct notifier_block *nb,
|
|||
{
|
||||
struct resource *res;
|
||||
int reg = -1;
|
||||
u32 val;
|
||||
struct device *dev = __dev;
|
||||
|
||||
if (event != BUS_NOTIFY_ADD_DEVICE)
|
||||
|
@ -141,10 +142,10 @@ static int highbank_platform_notifier(struct notifier_block *nb,
|
|||
return NOTIFY_DONE;
|
||||
|
||||
if (of_property_read_bool(dev->of_node, "dma-coherent")) {
|
||||
writel(0xff31, sregs_base + reg);
|
||||
val = readl(sregs_base + reg);
|
||||
writel(val | 0xff01, sregs_base + reg);
|
||||
set_dma_ops(dev, &arm_coherent_dma_ops);
|
||||
} else
|
||||
writel(0, sregs_base + reg);
|
||||
}
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
|
|
@ -199,7 +199,8 @@ static const char *pcie_axi_sels[] = { "axi", "ahb", };
|
|||
static const char *ssi_sels[] = { "pll3_pfd2_508m", "pll3_pfd3_454m", "pll4_post_div", };
|
||||
static const char *usdhc_sels[] = { "pll2_pfd2_396m", "pll2_pfd0_352m", };
|
||||
static const char *enfc_sels[] = { "pll2_pfd0_352m", "pll2_bus", "pll3_usb_otg", "pll2_pfd2_396m", };
|
||||
static const char *emi_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
|
||||
static const char *emi_sels[] = { "pll2_pfd2_396m", "pll3_usb_otg", "axi", "pll2_pfd0_352m", };
|
||||
static const char *emi_slow_sels[] = { "axi", "pll3_usb_otg", "pll2_pfd2_396m", "pll2_pfd0_352m", };
|
||||
static const char *vdo_axi_sels[] = { "axi", "ahb", };
|
||||
static const char *vpu_axi_sels[] = { "axi", "pll2_pfd2_396m", "pll2_pfd0_352m", };
|
||||
static const char *cko1_sels[] = { "pll3_usb_otg", "pll2_bus", "pll1_sys", "pll5_video_div",
|
||||
|
@ -392,7 +393,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
|
|||
clk[usdhc4_sel] = imx_clk_mux("usdhc4_sel", base + 0x1c, 19, 1, usdhc_sels, ARRAY_SIZE(usdhc_sels));
|
||||
clk[enfc_sel] = imx_clk_mux("enfc_sel", base + 0x2c, 16, 2, enfc_sels, ARRAY_SIZE(enfc_sels));
|
||||
clk[emi_sel] = imx_clk_mux("emi_sel", base + 0x1c, 27, 2, emi_sels, ARRAY_SIZE(emi_sels));
|
||||
clk[emi_slow_sel] = imx_clk_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_sels, ARRAY_SIZE(emi_sels));
|
||||
clk[emi_slow_sel] = imx_clk_mux("emi_slow_sel", base + 0x1c, 29, 2, emi_slow_sels, ARRAY_SIZE(emi_slow_sels));
|
||||
clk[vdo_axi_sel] = imx_clk_mux("vdo_axi_sel", base + 0x18, 11, 1, vdo_axi_sels, ARRAY_SIZE(vdo_axi_sels));
|
||||
clk[vpu_axi_sel] = imx_clk_mux("vpu_axi_sel", base + 0x18, 14, 2, vpu_axi_sels, ARRAY_SIZE(vpu_axi_sels));
|
||||
clk[cko1_sel] = imx_clk_mux("cko1_sel", base + 0x60, 0, 4, cko1_sels, ARRAY_SIZE(cko1_sels));
|
||||
|
|
|
@ -183,6 +183,8 @@ static void __init vf610_clocks_init(struct device_node *ccm_node)
|
|||
clk[VF610_CLK_ENET_TS_SEL] = imx_clk_mux("enet_ts_sel", CCM_CSCMR2, 0, 3, enet_ts_sels, 7);
|
||||
clk[VF610_CLK_ENET] = imx_clk_gate("enet", "enet_sel", CCM_CSCDR1, 24);
|
||||
clk[VF610_CLK_ENET_TS] = imx_clk_gate("enet_ts", "enet_ts_sel", CCM_CSCDR1, 23);
|
||||
clk[VF610_CLK_ENET0] = imx_clk_gate2("enet0", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(0));
|
||||
clk[VF610_CLK_ENET1] = imx_clk_gate2("enet1", "ipg_bus", CCM_CCGR9, CCM_CCGRx_CGn(1));
|
||||
|
||||
clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7));
|
||||
|
||||
|
|
|
@ -135,7 +135,7 @@
|
|||
#define MX27_INT_GPT4 (NR_IRQS_LEGACY + 4)
|
||||
#define MX27_INT_RTIC (NR_IRQS_LEGACY + 5)
|
||||
#define MX27_INT_CSPI3 (NR_IRQS_LEGACY + 6)
|
||||
#define MX27_INT_SDHC (NR_IRQS_LEGACY + 7)
|
||||
#define MX27_INT_MSHC (NR_IRQS_LEGACY + 7)
|
||||
#define MX27_INT_GPIO (NR_IRQS_LEGACY + 8)
|
||||
#define MX27_INT_SDHC3 (NR_IRQS_LEGACY + 9)
|
||||
#define MX27_INT_SDHC2 (NR_IRQS_LEGACY + 10)
|
||||
|
|
|
@ -49,7 +49,7 @@ static const char *keystone_match[] __initconst = {
|
|||
NULL,
|
||||
};
|
||||
|
||||
void keystone_restart(char mode, const char *cmd)
|
||||
void keystone_restart(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
|
|
|
@ -62,7 +62,7 @@ config SOC_OMAP5
|
|||
select HAVE_SMP
|
||||
select COMMON_CLK
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select ARM_ERRATA_798181
|
||||
select ARM_ERRATA_798181 if SMP
|
||||
|
||||
config SOC_AM33XX
|
||||
bool "AM33XX support"
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/of_irq.h>
|
||||
#include <linux/of_platform.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
|
@ -35,6 +36,21 @@ static struct of_device_id omap_dt_match_table[] __initdata = {
|
|||
{ }
|
||||
};
|
||||
|
||||
/*
|
||||
* Create alias for USB host PHY clock.
|
||||
* Remove this when clock phandle can be provided via DT
|
||||
*/
|
||||
static void __init legacy_init_ehci_clk(char *clkname)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = clk_add_alias("main_clk", NULL, clkname, NULL);
|
||||
if (ret) {
|
||||
pr_err("%s:Failed to add main_clk alias to %s :%d\n",
|
||||
__func__, clkname, ret);
|
||||
}
|
||||
}
|
||||
|
||||
static void __init omap_generic_init(void)
|
||||
{
|
||||
omap_sdrc_init(NULL, NULL);
|
||||
|
@ -45,10 +61,15 @@ static void __init omap_generic_init(void)
|
|||
* HACK: call display setup code for selected boards to enable omapdss.
|
||||
* This will be removed when omapdss supports DT.
|
||||
*/
|
||||
if (of_machine_is_compatible("ti,omap4-panda"))
|
||||
if (of_machine_is_compatible("ti,omap4-panda")) {
|
||||
omap4_panda_display_init_of();
|
||||
legacy_init_ehci_clk("auxclk3_ck");
|
||||
|
||||
}
|
||||
else if (of_machine_is_compatible("ti,omap4-sdp"))
|
||||
omap_4430sdp_display_init_of();
|
||||
else if (of_machine_is_compatible("ti,omap5-uevm"))
|
||||
legacy_init_ehci_clk("auxclk1_ck");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SOC_OMAP2420
|
||||
|
|
|
@ -477,16 +477,24 @@ static int em_x270_usb_hub_init(void)
|
|||
/* USB Hub power-on and reset */
|
||||
gpio_direction_output(usb_hub_reset, 1);
|
||||
gpio_direction_output(GPIO9_USB_VBUS_EN, 0);
|
||||
regulator_enable(em_x270_usb_ldo);
|
||||
err = regulator_enable(em_x270_usb_ldo);
|
||||
if (err)
|
||||
goto err_free_rst_gpio;
|
||||
|
||||
gpio_set_value(usb_hub_reset, 0);
|
||||
gpio_set_value(usb_hub_reset, 1);
|
||||
regulator_disable(em_x270_usb_ldo);
|
||||
regulator_enable(em_x270_usb_ldo);
|
||||
err = regulator_enable(em_x270_usb_ldo);
|
||||
if (err)
|
||||
goto err_free_rst_gpio;
|
||||
|
||||
gpio_set_value(usb_hub_reset, 0);
|
||||
gpio_set_value(GPIO9_USB_VBUS_EN, 1);
|
||||
|
||||
return 0;
|
||||
|
||||
err_free_rst_gpio:
|
||||
gpio_free(usb_hub_reset);
|
||||
err_free_vbus_gpio:
|
||||
gpio_free(GPIO9_USB_VBUS_EN);
|
||||
err_free_usb_ldo:
|
||||
|
@ -592,7 +600,7 @@ err_irq:
|
|||
return err;
|
||||
}
|
||||
|
||||
static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
static int em_x270_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
struct pxamci_platform_data* p_d = dev->platform_data;
|
||||
|
||||
|
@ -600,10 +608,11 @@ static void em_x270_mci_setpower(struct device *dev, unsigned int vdd)
|
|||
int vdd_uV = (2000 + (vdd - __ffs(MMC_VDD_20_21)) * 100) * 1000;
|
||||
|
||||
regulator_set_voltage(em_x270_sdio_ldo, vdd_uV, vdd_uV);
|
||||
regulator_enable(em_x270_sdio_ldo);
|
||||
return regulator_enable(em_x270_sdio_ldo);
|
||||
} else {
|
||||
regulator_disable(em_x270_sdio_ldo);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void em_x270_mci_exit(struct device *dev, void *data)
|
||||
|
|
|
@ -408,7 +408,7 @@ static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_in
|
|||
return err;
|
||||
}
|
||||
|
||||
static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
static int mainstone_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
struct pxamci_platform_data* p_d = dev->platform_data;
|
||||
|
||||
|
@ -420,6 +420,7 @@ static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
|
|||
printk(KERN_DEBUG "%s: off\n", __func__);
|
||||
MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void mainstone_mci_exit(struct device *dev, void *data)
|
||||
|
|
|
@ -335,7 +335,7 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
|
|||
return err;
|
||||
}
|
||||
|
||||
static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
static int pcm990_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
struct pxamci_platform_data *p_d = dev->platform_data;
|
||||
u8 val;
|
||||
|
@ -348,6 +348,7 @@ static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
|
|||
val &= ~PCM990_CTRL_MMC2PWR;
|
||||
|
||||
pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pcm990_mci_exit(struct device *dev, void *data)
|
||||
|
|
|
@ -258,7 +258,7 @@ err_free_2:
|
|||
return err;
|
||||
}
|
||||
|
||||
static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
static int poodle_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
struct pxamci_platform_data* p_d = dev->platform_data;
|
||||
|
||||
|
@ -270,6 +270,8 @@ static void poodle_mci_setpower(struct device *dev, unsigned int vdd)
|
|||
gpio_set_value(POODLE_GPIO_SD_PWR1, 0);
|
||||
gpio_set_value(POODLE_GPIO_SD_PWR, 0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void poodle_mci_exit(struct device *dev, void *data)
|
||||
|
|
|
@ -598,7 +598,7 @@ static inline void spitz_spi_init(void) {}
|
|||
* NOTE: The card detect interrupt isn't debounced so we delay it by 250ms to
|
||||
* give the card a chance to fully insert/eject.
|
||||
*/
|
||||
static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
static int spitz_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
struct pxamci_platform_data* p_d = dev->platform_data;
|
||||
|
||||
|
@ -606,6 +606,8 @@ static void spitz_mci_setpower(struct device *dev, unsigned int vdd)
|
|||
spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, SCOOP_CPR_SD_3V);
|
||||
else
|
||||
spitz_card_pwr_ctrl(SCOOP_CPR_SD_3V, 0x0);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct pxamci_platform_data spitz_mci_platform_data = {
|
||||
|
|
|
@ -734,9 +734,10 @@ static int stargate2_mci_init(struct device *dev,
|
|||
*
|
||||
* Very simple control. Either it is on or off and is controlled by
|
||||
* a gpio pin */
|
||||
static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
static int stargate2_mci_setpower(struct device *dev, unsigned int vdd)
|
||||
{
|
||||
gpio_set_value(SG2_SD_POWER_ENABLE, !!vdd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void stargate2_mci_exit(struct device *dev, void *data)
|
||||
|
|
|
@ -119,66 +119,101 @@ static struct clk init_clocks_off[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static struct clk init_clocks[] = {
|
||||
{
|
||||
.name = "lcd",
|
||||
.parent = &clk_h,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_LCDC,
|
||||
}, {
|
||||
.name = "gpio",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_GPIO,
|
||||
}, {
|
||||
.name = "usb-host",
|
||||
.parent = &clk_h,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_USBH,
|
||||
}, {
|
||||
.name = "usb-device",
|
||||
.parent = &clk_h,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_USBD,
|
||||
}, {
|
||||
.name = "timers",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_PWMT,
|
||||
}, {
|
||||
.name = "uart",
|
||||
.devname = "s3c2410-uart.0",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART0,
|
||||
}, {
|
||||
.name = "uart",
|
||||
.devname = "s3c2410-uart.1",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART1,
|
||||
}, {
|
||||
.name = "uart",
|
||||
.devname = "s3c2410-uart.2",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART2,
|
||||
}, {
|
||||
.name = "rtc",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_RTC,
|
||||
}, {
|
||||
.name = "watchdog",
|
||||
.parent = &clk_p,
|
||||
.ctrlbit = 0,
|
||||
}, {
|
||||
.name = "usb-bus-host",
|
||||
.parent = &clk_usb_bus,
|
||||
}, {
|
||||
.name = "usb-bus-gadget",
|
||||
.parent = &clk_usb_bus,
|
||||
},
|
||||
static struct clk clk_lcd = {
|
||||
.name = "lcd",
|
||||
.parent = &clk_h,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_LCDC,
|
||||
};
|
||||
|
||||
static struct clk clk_gpio = {
|
||||
.name = "gpio",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_GPIO,
|
||||
};
|
||||
|
||||
static struct clk clk_usb_host = {
|
||||
.name = "usb-host",
|
||||
.parent = &clk_h,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_USBH,
|
||||
};
|
||||
|
||||
static struct clk clk_usb_device = {
|
||||
.name = "usb-device",
|
||||
.parent = &clk_h,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_USBD,
|
||||
};
|
||||
|
||||
static struct clk clk_timers = {
|
||||
.name = "timers",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_PWMT,
|
||||
};
|
||||
|
||||
struct clk s3c24xx_clk_uart0 = {
|
||||
.name = "uart",
|
||||
.devname = "s3c2410-uart.0",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART0,
|
||||
};
|
||||
|
||||
struct clk s3c24xx_clk_uart1 = {
|
||||
.name = "uart",
|
||||
.devname = "s3c2410-uart.1",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART1,
|
||||
};
|
||||
|
||||
struct clk s3c24xx_clk_uart2 = {
|
||||
.name = "uart",
|
||||
.devname = "s3c2410-uart.2",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_UART2,
|
||||
};
|
||||
|
||||
static struct clk clk_rtc = {
|
||||
.name = "rtc",
|
||||
.parent = &clk_p,
|
||||
.enable = s3c2410_clkcon_enable,
|
||||
.ctrlbit = S3C2410_CLKCON_RTC,
|
||||
};
|
||||
|
||||
static struct clk clk_watchdog = {
|
||||
.name = "watchdog",
|
||||
.parent = &clk_p,
|
||||
.ctrlbit = 0,
|
||||
};
|
||||
|
||||
static struct clk clk_usb_bus_host = {
|
||||
.name = "usb-bus-host",
|
||||
.parent = &clk_usb_bus,
|
||||
};
|
||||
|
||||
static struct clk clk_usb_bus_gadget = {
|
||||
.name = "usb-bus-gadget",
|
||||
.parent = &clk_usb_bus,
|
||||
};
|
||||
|
||||
static struct clk *init_clocks[] = {
|
||||
&clk_lcd,
|
||||
&clk_gpio,
|
||||
&clk_usb_host,
|
||||
&clk_usb_device,
|
||||
&clk_timers,
|
||||
&s3c24xx_clk_uart0,
|
||||
&s3c24xx_clk_uart1,
|
||||
&s3c24xx_clk_uart2,
|
||||
&clk_rtc,
|
||||
&clk_watchdog,
|
||||
&clk_usb_bus_host,
|
||||
&clk_usb_bus_gadget,
|
||||
};
|
||||
|
||||
/* s3c2410_baseclk_add()
|
||||
|
@ -195,7 +230,6 @@ int __init s3c2410_baseclk_add(void)
|
|||
{
|
||||
unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
|
||||
unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
|
||||
struct clk *clkp;
|
||||
struct clk *xtal;
|
||||
int ret;
|
||||
int ptr;
|
||||
|
@ -207,8 +241,9 @@ int __init s3c2410_baseclk_add(void)
|
|||
|
||||
/* register clocks from clock array */
|
||||
|
||||
clkp = init_clocks;
|
||||
for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
|
||||
for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++) {
|
||||
struct clk *clkp = init_clocks[ptr];
|
||||
|
||||
/* ensure that we note the clock state */
|
||||
|
||||
clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
|
||||
|
|
|
@ -166,6 +166,9 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
|
|||
CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
|
||||
CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
|
||||
CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
|
||||
CLKDEV_INIT("s3c2440-uart.0", "uart", &s3c24xx_clk_uart0),
|
||||
CLKDEV_INIT("s3c2440-uart.1", "uart", &s3c24xx_clk_uart1),
|
||||
CLKDEV_INIT("s3c2440-uart.2", "uart", &s3c24xx_clk_uart2),
|
||||
CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll),
|
||||
};
|
||||
|
||||
|
|
|
@ -11,8 +11,9 @@ menuconfig ARCH_STI
|
|||
select HAVE_SMP
|
||||
select HAVE_ARM_SCU if SMP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_ERRATA_720789
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_764369
|
||||
select ARM_ERRATA_775420
|
||||
select PL310_ERRATA_753970 if CACHE_PL310
|
||||
select PL310_ERRATA_769419 if CACHE_PL310
|
||||
help
|
||||
|
|
|
@ -91,7 +91,7 @@ static void __init zynq_map_io(void)
|
|||
zynq_scu_map_io();
|
||||
}
|
||||
|
||||
static void zynq_system_reset(char mode, const char *cmd)
|
||||
static void zynq_system_reset(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
zynq_slcr_system_reset();
|
||||
}
|
||||
|
|
|
@ -29,6 +29,13 @@ config PLAT_S5P
|
|||
help
|
||||
Base platform code for Samsung's S5P series SoC.
|
||||
|
||||
config SAMSUNG_PM
|
||||
bool
|
||||
depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM)
|
||||
default y
|
||||
help
|
||||
Base platform power management code for samsung code
|
||||
|
||||
if PLAT_SAMSUNG
|
||||
|
||||
# boot configurations
|
||||
|
|
|
@ -51,7 +51,7 @@ obj-$(CONFIG_SAMSUNG_DMADEV) += dma-ops.o
|
|||
|
||||
# PM support
|
||||
|
||||
obj-$(CONFIG_PM) += pm.o
|
||||
obj-$(CONFIG_SAMSUNG_PM) += pm.o
|
||||
obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o
|
||||
obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
|
||||
|
||||
|
|
|
@ -83,6 +83,11 @@ extern struct clk clk_ext;
|
|||
extern struct clksrc_clk clk_epllref;
|
||||
extern struct clksrc_clk clk_esysclk;
|
||||
|
||||
/* S3C24XX UART clocks */
|
||||
extern struct clk s3c24xx_clk_uart0;
|
||||
extern struct clk s3c24xx_clk_uart1;
|
||||
extern struct clk s3c24xx_clk_uart2;
|
||||
|
||||
/* S3C64XX specific clocks */
|
||||
extern struct clk clk_h2;
|
||||
extern struct clk clk_27m;
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
|
||||
struct device;
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
#ifdef CONFIG_SAMSUNG_PM
|
||||
|
||||
extern __init int s3c_pm_init(void);
|
||||
extern __init int s3c64xx_pm_init(void);
|
||||
|
@ -58,8 +58,6 @@ extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */
|
|||
|
||||
/* from sleep.S */
|
||||
|
||||
extern void s3c_cpu_resume(void);
|
||||
|
||||
extern int s3c2410_cpu_suspend(unsigned long);
|
||||
|
||||
/* sleep save info */
|
||||
|
@ -106,12 +104,14 @@ extern void s3c_pm_do_save(struct sleep_save *ptr, int count);
|
|||
extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
|
||||
extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
#ifdef CONFIG_SAMSUNG_PM
|
||||
extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
|
||||
extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
|
||||
extern void s3c_cpu_resume(void);
|
||||
#else
|
||||
#define s3c_irq_wake NULL
|
||||
#define s3c_irqext_wake NULL
|
||||
#define s3c_cpu_resume NULL
|
||||
#endif
|
||||
|
||||
/* PM debug functions */
|
||||
|
|
|
@ -80,7 +80,7 @@ unsigned char pm_uart_udivslot;
|
|||
|
||||
#ifdef CONFIG_SAMSUNG_PM_DEBUG
|
||||
|
||||
static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
|
||||
static struct pm_uart_save uart_save;
|
||||
|
||||
static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
|
||||
{
|
||||
|
@ -101,11 +101,7 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
|
|||
|
||||
static void s3c_pm_save_uarts(void)
|
||||
{
|
||||
struct pm_uart_save *save = uart_save;
|
||||
unsigned int uart;
|
||||
|
||||
for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
|
||||
s3c_pm_save_uart(uart, save);
|
||||
s3c_pm_save_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
|
||||
}
|
||||
|
||||
static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
|
||||
|
@ -126,11 +122,7 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
|
|||
|
||||
static void s3c_pm_restore_uarts(void)
|
||||
{
|
||||
struct pm_uart_save *save = uart_save;
|
||||
unsigned int uart;
|
||||
|
||||
for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
|
||||
s3c_pm_restore_uart(uart, save);
|
||||
s3c_pm_restore_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
|
||||
}
|
||||
#else
|
||||
static void s3c_pm_save_uarts(void) { }
|
||||
|
|
|
@ -24,10 +24,10 @@
|
|||
#include <linux/compiler.h>
|
||||
|
||||
#ifndef CONFIG_ARM64_64K_PAGES
|
||||
#define THREAD_SIZE_ORDER 1
|
||||
#define THREAD_SIZE_ORDER 2
|
||||
#endif
|
||||
|
||||
#define THREAD_SIZE 8192
|
||||
#define THREAD_SIZE 16384
|
||||
#define THREAD_START_SP (THREAD_SIZE - 16)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
#define BOOT_CPU_MODE_EL2 (0x0e12b007)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
/*
|
||||
* __boot_cpu_mode records what mode CPUs were booted in.
|
||||
|
@ -36,9 +37,20 @@ extern u32 __boot_cpu_mode[2];
|
|||
void __hyp_set_vectors(phys_addr_t phys_vector_base);
|
||||
phys_addr_t __hyp_get_vectors(void);
|
||||
|
||||
static inline void sync_boot_mode(void)
|
||||
{
|
||||
/*
|
||||
* As secondaries write to __boot_cpu_mode with caches disabled, we
|
||||
* must flush the corresponding cache entries to ensure the visibility
|
||||
* of their writes.
|
||||
*/
|
||||
__flush_dcache_area(__boot_cpu_mode, sizeof(__boot_cpu_mode));
|
||||
}
|
||||
|
||||
/* Reports the availability of HYP mode */
|
||||
static inline bool is_hyp_mode_available(void)
|
||||
{
|
||||
sync_boot_mode();
|
||||
return (__boot_cpu_mode[0] == BOOT_CPU_MODE_EL2 &&
|
||||
__boot_cpu_mode[1] == BOOT_CPU_MODE_EL2);
|
||||
}
|
||||
|
@ -46,6 +58,7 @@ static inline bool is_hyp_mode_available(void)
|
|||
/* Check if the bootloader has booted CPUs in different modes */
|
||||
static inline bool is_hyp_mode_mismatched(void)
|
||||
{
|
||||
sync_boot_mode();
|
||||
return __boot_cpu_mode[0] != __boot_cpu_mode[1];
|
||||
}
|
||||
|
||||
|
|
|
@ -121,7 +121,7 @@
|
|||
|
||||
.macro get_thread_info, rd
|
||||
mov \rd, sp
|
||||
and \rd, \rd, #~((1 << 13) - 1) // top of 8K stack
|
||||
and \rd, \rd, #~(THREAD_SIZE - 1) // top of stack
|
||||
.endm
|
||||
|
||||
/*
|
||||
|
|
|
@ -81,7 +81,7 @@ void soft_restart(unsigned long addr)
|
|||
void (*pm_power_off)(void);
|
||||
EXPORT_SYMBOL_GPL(pm_power_off);
|
||||
|
||||
void (*arm_pm_restart)(char str, const char *cmd);
|
||||
void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
|
||||
EXPORT_SYMBOL_GPL(arm_pm_restart);
|
||||
|
||||
void arch_cpu_idle_prepare(void)
|
||||
|
|
|
@ -55,6 +55,8 @@ struct device_node;
|
|||
#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
|
||||
#define EEH_PE_PHB_DEAD (1 << 2) /* Dead PHB */
|
||||
|
||||
#define EEH_PE_KEEP (1 << 8) /* Keep PE on hotplug */
|
||||
|
||||
struct eeh_pe {
|
||||
int type; /* PE type: PHB/Bus/Device */
|
||||
int state; /* PE EEH dependent mode */
|
||||
|
@ -72,8 +74,8 @@ struct eeh_pe {
|
|||
struct list_head child; /* Child PEs */
|
||||
};
|
||||
|
||||
#define eeh_pe_for_each_dev(pe, edev) \
|
||||
list_for_each_entry(edev, &pe->edevs, list)
|
||||
#define eeh_pe_for_each_dev(pe, edev, tmp) \
|
||||
list_for_each_entry_safe(edev, tmp, &pe->edevs, list)
|
||||
|
||||
/*
|
||||
* The struct is used to trace EEH state for the associated
|
||||
|
@ -82,7 +84,13 @@ struct eeh_pe {
|
|||
* another tree except the currently existing tree of PCI
|
||||
* buses and PCI devices
|
||||
*/
|
||||
#define EEH_DEV_IRQ_DISABLED (1<<0) /* Interrupt disabled */
|
||||
#define EEH_DEV_BRIDGE (1 << 0) /* PCI bridge */
|
||||
#define EEH_DEV_ROOT_PORT (1 << 1) /* PCIe root port */
|
||||
#define EEH_DEV_DS_PORT (1 << 2) /* Downstream port */
|
||||
#define EEH_DEV_IRQ_DISABLED (1 << 3) /* Interrupt disabled */
|
||||
#define EEH_DEV_DISCONNECTED (1 << 4) /* Removing from PE */
|
||||
|
||||
#define EEH_DEV_SYSFS (1 << 8) /* Sysfs created */
|
||||
|
||||
struct eeh_dev {
|
||||
int mode; /* EEH mode */
|
||||
|
@ -90,11 +98,13 @@ struct eeh_dev {
|
|||
int config_addr; /* Config address */
|
||||
int pe_config_addr; /* PE config address */
|
||||
u32 config_space[16]; /* Saved PCI config space */
|
||||
u8 pcie_cap; /* Saved PCIe capability */
|
||||
struct eeh_pe *pe; /* Associated PE */
|
||||
struct list_head list; /* Form link list in the PE */
|
||||
struct pci_controller *phb; /* Associated PHB */
|
||||
struct device_node *dn; /* Associated device node */
|
||||
struct pci_dev *pdev; /* Associated PCI device */
|
||||
struct pci_bus *bus; /* PCI bus for partial hotplug */
|
||||
};
|
||||
|
||||
static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev)
|
||||
|
@ -193,8 +203,10 @@ int eeh_phb_pe_create(struct pci_controller *phb);
|
|||
struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
|
||||
struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
|
||||
int eeh_add_to_parent_pe(struct eeh_dev *edev);
|
||||
int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe);
|
||||
int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
|
||||
void eeh_pe_update_time_stamp(struct eeh_pe *pe);
|
||||
void *eeh_pe_traverse(struct eeh_pe *root,
|
||||
eeh_traverse_func fn, void *flag);
|
||||
void *eeh_pe_dev_traverse(struct eeh_pe *root,
|
||||
eeh_traverse_func fn, void *flag);
|
||||
void eeh_pe_restore_bars(struct eeh_pe *pe);
|
||||
|
@ -209,10 +221,12 @@ unsigned long eeh_check_failure(const volatile void __iomem *token,
|
|||
unsigned long val);
|
||||
int eeh_dev_check_failure(struct eeh_dev *edev);
|
||||
void eeh_addr_cache_build(void);
|
||||
void eeh_add_device_early(struct device_node *);
|
||||
void eeh_add_device_tree_early(struct device_node *);
|
||||
void eeh_add_device_late(struct pci_dev *);
|
||||
void eeh_add_device_tree_late(struct pci_bus *);
|
||||
void eeh_add_sysfs_files(struct pci_bus *);
|
||||
void eeh_remove_bus_device(struct pci_dev *, int);
|
||||
void eeh_remove_device(struct pci_dev *);
|
||||
|
||||
/**
|
||||
* EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
|
||||
|
@ -252,13 +266,17 @@ static inline unsigned long eeh_check_failure(const volatile void __iomem *token
|
|||
|
||||
static inline void eeh_addr_cache_build(void) { }
|
||||
|
||||
static inline void eeh_add_device_early(struct device_node *dn) { }
|
||||
|
||||
static inline void eeh_add_device_tree_early(struct device_node *dn) { }
|
||||
|
||||
static inline void eeh_add_device_late(struct pci_dev *dev) { }
|
||||
|
||||
static inline void eeh_add_device_tree_late(struct pci_bus *bus) { }
|
||||
|
||||
static inline void eeh_add_sysfs_files(struct pci_bus *bus) { }
|
||||
|
||||
static inline void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe) { }
|
||||
static inline void eeh_remove_device(struct pci_dev *dev) { }
|
||||
|
||||
#define EEH_POSSIBLE_ERROR(val, type) (0)
|
||||
#define EEH_IO_ERROR_VALUE(size) (-1UL)
|
||||
|
|
|
@ -96,10 +96,11 @@ static inline bool arch_irqs_disabled(void)
|
|||
#endif
|
||||
|
||||
#define hard_irq_disable() do { \
|
||||
u8 _was_enabled = get_paca()->soft_enabled; \
|
||||
u8 _was_enabled; \
|
||||
__hard_irq_disable(); \
|
||||
get_paca()->soft_enabled = 0; \
|
||||
get_paca()->irq_happened |= PACA_IRQ_HARD_DIS; \
|
||||
_was_enabled = local_paca->soft_enabled; \
|
||||
local_paca->soft_enabled = 0; \
|
||||
local_paca->irq_happened |= PACA_IRQ_HARD_DIS; \
|
||||
if (_was_enabled) \
|
||||
trace_hardirqs_off(); \
|
||||
} while(0)
|
||||
|
|
|
@ -82,10 +82,9 @@ struct exception_table_entry;
|
|||
void sort_ex_table(struct exception_table_entry *start,
|
||||
struct exception_table_entry *finish);
|
||||
|
||||
#ifdef CONFIG_MODVERSIONS
|
||||
#if defined(CONFIG_MODVERSIONS) && defined(CONFIG_PPC64)
|
||||
#define ARCH_RELOCATES_KCRCTAB
|
||||
|
||||
extern const unsigned long reloc_start[];
|
||||
#define reloc_start PHYSICAL_START
|
||||
#endif
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_POWERPC_MODULE_H */
|
||||
|
|
|
@ -209,7 +209,6 @@ static inline struct eeh_dev *of_node_to_eeh_dev(struct device_node *dn)
|
|||
extern struct pci_bus *pcibios_find_pci_bus(struct device_node *dn);
|
||||
|
||||
/** Remove all of the PCI devices under this bus */
|
||||
extern void __pcibios_remove_pci_devices(struct pci_bus *bus, int purge_pe);
|
||||
extern void pcibios_remove_pci_devices(struct pci_bus *bus);
|
||||
|
||||
/** Discover new pci devices under this bus, and add them */
|
||||
|
|
|
@ -1088,7 +1088,8 @@
|
|||
#define PVR_970MP 0x0044
|
||||
#define PVR_970GX 0x0045
|
||||
#define PVR_POWER7p 0x004A
|
||||
#define PVR_POWER8 0x004B
|
||||
#define PVR_POWER8E 0x004B
|
||||
#define PVR_POWER8 0x004D
|
||||
#define PVR_BE 0x0070
|
||||
#define PVR_PA6T 0x0090
|
||||
|
||||
|
|
|
@ -494,9 +494,27 @@ static struct cpu_spec __initdata cpu_specs[] = {
|
|||
.cpu_restore = __restore_cpu_power7,
|
||||
.platform = "power7+",
|
||||
},
|
||||
{ /* Power8 */
|
||||
{ /* Power8E */
|
||||
.pvr_mask = 0xffff0000,
|
||||
.pvr_value = 0x004b0000,
|
||||
.cpu_name = "POWER8E (raw)",
|
||||
.cpu_features = CPU_FTRS_POWER8,
|
||||
.cpu_user_features = COMMON_USER_POWER8,
|
||||
.cpu_user_features2 = COMMON_USER2_POWER8,
|
||||
.mmu_features = MMU_FTRS_POWER8,
|
||||
.icache_bsize = 128,
|
||||
.dcache_bsize = 128,
|
||||
.num_pmcs = 6,
|
||||
.pmc_type = PPC_PMC_IBM,
|
||||
.oprofile_cpu_type = "ppc64/power8",
|
||||
.oprofile_type = PPC_OPROFILE_INVALID,
|
||||
.cpu_setup = __setup_cpu_power8,
|
||||
.cpu_restore = __restore_cpu_power8,
|
||||
.platform = "power8",
|
||||
},
|
||||
{ /* Power8 */
|
||||
.pvr_mask = 0xffff0000,
|
||||
.pvr_value = 0x004d0000,
|
||||
.cpu_name = "POWER8 (raw)",
|
||||
.cpu_features = CPU_FTRS_POWER8,
|
||||
.cpu_user_features = COMMON_USER_POWER8,
|
||||
|
|
|
@ -231,7 +231,7 @@ static size_t eeh_gather_pci_data(struct eeh_dev *edev, char * buf, size_t len)
|
|||
void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
|
||||
{
|
||||
size_t loglen = 0;
|
||||
struct eeh_dev *edev;
|
||||
struct eeh_dev *edev, *tmp;
|
||||
bool valid_cfg_log = true;
|
||||
|
||||
/*
|
||||
|
@ -251,7 +251,7 @@ void eeh_slot_error_detail(struct eeh_pe *pe, int severity)
|
|||
eeh_pe_restore_bars(pe);
|
||||
|
||||
pci_regs_buf[0] = 0;
|
||||
eeh_pe_for_each_dev(pe, edev) {
|
||||
eeh_pe_for_each_dev(pe, edev, tmp) {
|
||||
loglen += eeh_gather_pci_data(edev, pci_regs_buf + loglen,
|
||||
EEH_PCI_REGS_LOG_LEN - loglen);
|
||||
}
|
||||
|
@ -499,8 +499,6 @@ unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned lon
|
|||
}
|
||||
|
||||
eeh_dev_check_failure(edev);
|
||||
|
||||
pci_dev_put(eeh_dev_to_pci_dev(edev));
|
||||
return val;
|
||||
}
|
||||
|
||||
|
@ -838,7 +836,7 @@ core_initcall_sync(eeh_init);
|
|||
* on the CEC architecture, type of the device, on earlier boot
|
||||
* command-line arguments & etc.
|
||||
*/
|
||||
static void eeh_add_device_early(struct device_node *dn)
|
||||
void eeh_add_device_early(struct device_node *dn)
|
||||
{
|
||||
struct pci_controller *phb;
|
||||
|
||||
|
@ -886,7 +884,7 @@ EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
|
|||
* This routine must be used to complete EEH initialization for PCI
|
||||
* devices that were added after system boot (e.g. hotplug, dlpar).
|
||||
*/
|
||||
static void eeh_add_device_late(struct pci_dev *dev)
|
||||
void eeh_add_device_late(struct pci_dev *dev)
|
||||
{
|
||||
struct device_node *dn;
|
||||
struct eeh_dev *edev;
|
||||
|
@ -902,9 +900,23 @@ static void eeh_add_device_late(struct pci_dev *dev)
|
|||
pr_debug("EEH: Already referenced !\n");
|
||||
return;
|
||||
}
|
||||
WARN_ON(edev->pdev);
|
||||
|
||||
pci_dev_get(dev);
|
||||
/*
|
||||
* The EEH cache might not be removed correctly because of
|
||||
* unbalanced kref to the device during unplug time, which
|
||||
* relies on pcibios_release_device(). So we have to remove
|
||||
* that here explicitly.
|
||||
*/
|
||||
if (edev->pdev) {
|
||||
eeh_rmv_from_parent_pe(edev);
|
||||
eeh_addr_cache_rmv_dev(edev->pdev);
|
||||
eeh_sysfs_remove_device(edev->pdev);
|
||||
edev->mode &= ~EEH_DEV_SYSFS;
|
||||
|
||||
edev->pdev = NULL;
|
||||
dev->dev.archdata.edev = NULL;
|
||||
}
|
||||
|
||||
edev->pdev = dev;
|
||||
dev->dev.archdata.edev = edev;
|
||||
|
||||
|
@ -967,7 +979,6 @@ EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
|
|||
/**
|
||||
* eeh_remove_device - Undo EEH setup for the indicated pci device
|
||||
* @dev: pci device to be removed
|
||||
* @purge_pe: remove the PE or not
|
||||
*
|
||||
* This routine should be called when a device is removed from
|
||||
* a running system (e.g. by hotplug or dlpar). It unregisters
|
||||
|
@ -975,7 +986,7 @@ EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
|
|||
* this device will no longer be detected after this call; thus,
|
||||
* i/o errors affecting this slot may leave this device unusable.
|
||||
*/
|
||||
static void eeh_remove_device(struct pci_dev *dev, int purge_pe)
|
||||
void eeh_remove_device(struct pci_dev *dev)
|
||||
{
|
||||
struct eeh_dev *edev;
|
||||
|
||||
|
@ -986,42 +997,29 @@ static void eeh_remove_device(struct pci_dev *dev, int purge_pe)
|
|||
/* Unregister the device with the EEH/PCI address search system */
|
||||
pr_debug("EEH: Removing device %s\n", pci_name(dev));
|
||||
|
||||
if (!edev || !edev->pdev) {
|
||||
if (!edev || !edev->pdev || !edev->pe) {
|
||||
pr_debug("EEH: Not referenced !\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* During the hotplug for EEH error recovery, we need the EEH
|
||||
* device attached to the parent PE in order for BAR restore
|
||||
* a bit later. So we keep it for BAR restore and remove it
|
||||
* from the parent PE during the BAR resotre.
|
||||
*/
|
||||
edev->pdev = NULL;
|
||||
dev->dev.archdata.edev = NULL;
|
||||
pci_dev_put(dev);
|
||||
if (!(edev->pe->state & EEH_PE_KEEP))
|
||||
eeh_rmv_from_parent_pe(edev);
|
||||
else
|
||||
edev->mode |= EEH_DEV_DISCONNECTED;
|
||||
|
||||
eeh_rmv_from_parent_pe(edev, purge_pe);
|
||||
eeh_addr_cache_rmv_dev(dev);
|
||||
eeh_sysfs_remove_device(dev);
|
||||
edev->mode &= ~EEH_DEV_SYSFS;
|
||||
}
|
||||
|
||||
/**
|
||||
* eeh_remove_bus_device - Undo EEH setup for the indicated PCI device
|
||||
* @dev: PCI device
|
||||
* @purge_pe: remove the corresponding PE or not
|
||||
*
|
||||
* This routine must be called when a device is removed from the
|
||||
* running system through hotplug or dlpar. The corresponding
|
||||
* PCI address cache will be removed.
|
||||
*/
|
||||
void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe)
|
||||
{
|
||||
struct pci_bus *bus = dev->subordinate;
|
||||
struct pci_dev *child, *tmp;
|
||||
|
||||
eeh_remove_device(dev, purge_pe);
|
||||
|
||||
if (bus && dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
|
||||
list_for_each_entry_safe(child, tmp, &bus->devices, bus_list)
|
||||
eeh_remove_bus_device(child, purge_pe);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(eeh_remove_bus_device);
|
||||
|
||||
static int proc_eeh_show(struct seq_file *m, void *v)
|
||||
{
|
||||
if (0 == eeh_subsystem_enabled) {
|
||||
|
|
|
@ -68,16 +68,12 @@ static inline struct eeh_dev *__eeh_addr_cache_get_device(unsigned long addr)
|
|||
struct pci_io_addr_range *piar;
|
||||
piar = rb_entry(n, struct pci_io_addr_range, rb_node);
|
||||
|
||||
if (addr < piar->addr_lo) {
|
||||
if (addr < piar->addr_lo)
|
||||
n = n->rb_left;
|
||||
} else {
|
||||
if (addr > piar->addr_hi) {
|
||||
n = n->rb_right;
|
||||
} else {
|
||||
pci_dev_get(piar->pcidev);
|
||||
return piar->edev;
|
||||
}
|
||||
}
|
||||
else if (addr > piar->addr_hi)
|
||||
n = n->rb_right;
|
||||
else
|
||||
return piar->edev;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
|
@ -156,7 +152,6 @@ eeh_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
|
|||
if (!piar)
|
||||
return NULL;
|
||||
|
||||
pci_dev_get(dev);
|
||||
piar->addr_lo = alo;
|
||||
piar->addr_hi = ahi;
|
||||
piar->edev = pci_dev_to_eeh_dev(dev);
|
||||
|
@ -250,7 +245,6 @@ restart:
|
|||
|
||||
if (piar->pcidev == dev) {
|
||||
rb_erase(n, &pci_io_addr_cache_root.rb_root);
|
||||
pci_dev_put(piar->pcidev);
|
||||
kfree(piar);
|
||||
goto restart;
|
||||
}
|
||||
|
@ -302,12 +296,10 @@ void eeh_addr_cache_build(void)
|
|||
if (!edev)
|
||||
continue;
|
||||
|
||||
pci_dev_get(dev); /* matching put is in eeh_remove_device() */
|
||||
dev->dev.archdata.edev = edev;
|
||||
edev->pdev = dev;
|
||||
|
||||
eeh_addr_cache_insert_dev(dev);
|
||||
|
||||
eeh_sysfs_add_device(dev);
|
||||
}
|
||||
|
||||
|
|
|
@ -143,10 +143,14 @@ static void eeh_disable_irq(struct pci_dev *dev)
|
|||
static void eeh_enable_irq(struct pci_dev *dev)
|
||||
{
|
||||
struct eeh_dev *edev = pci_dev_to_eeh_dev(dev);
|
||||
struct irq_desc *desc;
|
||||
|
||||
if ((edev->mode) & EEH_DEV_IRQ_DISABLED) {
|
||||
edev->mode &= ~EEH_DEV_IRQ_DISABLED;
|
||||
enable_irq(dev->irq);
|
||||
|
||||
desc = irq_to_desc(dev->irq);
|
||||
if (desc && desc->depth > 0)
|
||||
enable_irq(dev->irq);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -338,6 +342,54 @@ static void *eeh_report_failure(void *data, void *userdata)
|
|||
return NULL;
|
||||
}
|
||||
|
||||
static void *eeh_rmv_device(void *data, void *userdata)
|
||||
{
|
||||
struct pci_driver *driver;
|
||||
struct eeh_dev *edev = (struct eeh_dev *)data;
|
||||
struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
|
||||
int *removed = (int *)userdata;
|
||||
|
||||
/*
|
||||
* Actually, we should remove the PCI bridges as well.
|
||||
* However, that's lots of complexity to do that,
|
||||
* particularly some of devices under the bridge might
|
||||
* support EEH. So we just care about PCI devices for
|
||||
* simplicity here.
|
||||
*/
|
||||
if (!dev || (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE))
|
||||
return NULL;
|
||||
driver = eeh_pcid_get(dev);
|
||||
if (driver && driver->err_handler)
|
||||
return NULL;
|
||||
|
||||
/* Remove it from PCI subsystem */
|
||||
pr_debug("EEH: Removing %s without EEH sensitive driver\n",
|
||||
pci_name(dev));
|
||||
edev->bus = dev->bus;
|
||||
edev->mode |= EEH_DEV_DISCONNECTED;
|
||||
(*removed)++;
|
||||
|
||||
pci_stop_and_remove_bus_device(dev);
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void *eeh_pe_detach_dev(void *data, void *userdata)
|
||||
{
|
||||
struct eeh_pe *pe = (struct eeh_pe *)data;
|
||||
struct eeh_dev *edev, *tmp;
|
||||
|
||||
eeh_pe_for_each_dev(pe, edev, tmp) {
|
||||
if (!(edev->mode & EEH_DEV_DISCONNECTED))
|
||||
continue;
|
||||
|
||||
edev->mode &= ~(EEH_DEV_DISCONNECTED | EEH_DEV_IRQ_DISABLED);
|
||||
eeh_rmv_from_parent_pe(edev);
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* eeh_reset_device - Perform actual reset of a pci slot
|
||||
* @pe: EEH PE
|
||||
|
@ -349,8 +401,9 @@ static void *eeh_report_failure(void *data, void *userdata)
|
|||
*/
|
||||
static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
|
||||
{
|
||||
struct pci_bus *frozen_bus = eeh_pe_bus_get(pe);
|
||||
struct timeval tstamp;
|
||||
int cnt, rc;
|
||||
int cnt, rc, removed = 0;
|
||||
|
||||
/* pcibios will clear the counter; save the value */
|
||||
cnt = pe->freeze_count;
|
||||
|
@ -362,8 +415,11 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
|
|||
* devices are expected to be attached soon when calling
|
||||
* into pcibios_add_pci_devices().
|
||||
*/
|
||||
eeh_pe_state_mark(pe, EEH_PE_KEEP);
|
||||
if (bus)
|
||||
__pcibios_remove_pci_devices(bus, 0);
|
||||
pcibios_remove_pci_devices(bus);
|
||||
else if (frozen_bus)
|
||||
eeh_pe_dev_traverse(pe, eeh_rmv_device, &removed);
|
||||
|
||||
/* Reset the pci controller. (Asserts RST#; resets config space).
|
||||
* Reconfigure bridges and devices. Don't try to bring the system
|
||||
|
@ -384,9 +440,24 @@ static int eeh_reset_device(struct eeh_pe *pe, struct pci_bus *bus)
|
|||
* potentially weird things happen.
|
||||
*/
|
||||
if (bus) {
|
||||
pr_info("EEH: Sleep 5s ahead of complete hotplug\n");
|
||||
ssleep(5);
|
||||
|
||||
/*
|
||||
* The EEH device is still connected with its parent
|
||||
* PE. We should disconnect it so the binding can be
|
||||
* rebuilt when adding PCI devices.
|
||||
*/
|
||||
eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL);
|
||||
pcibios_add_pci_devices(bus);
|
||||
} else if (frozen_bus && removed) {
|
||||
pr_info("EEH: Sleep 5s ahead of partial hotplug\n");
|
||||
ssleep(5);
|
||||
|
||||
eeh_pe_traverse(pe, eeh_pe_detach_dev, NULL);
|
||||
pcibios_add_pci_devices(frozen_bus);
|
||||
}
|
||||
eeh_pe_state_clear(pe, EEH_PE_KEEP);
|
||||
|
||||
pe->tstamp = tstamp;
|
||||
pe->freeze_count = cnt;
|
||||
|
|
|
@ -149,8 +149,8 @@ static struct eeh_pe *eeh_pe_next(struct eeh_pe *pe,
|
|||
* callback returns something other than NULL, or no more PEs
|
||||
* to be traversed.
|
||||
*/
|
||||
static void *eeh_pe_traverse(struct eeh_pe *root,
|
||||
eeh_traverse_func fn, void *flag)
|
||||
void *eeh_pe_traverse(struct eeh_pe *root,
|
||||
eeh_traverse_func fn, void *flag)
|
||||
{
|
||||
struct eeh_pe *pe;
|
||||
void *ret;
|
||||
|
@ -176,7 +176,7 @@ void *eeh_pe_dev_traverse(struct eeh_pe *root,
|
|||
eeh_traverse_func fn, void *flag)
|
||||
{
|
||||
struct eeh_pe *pe;
|
||||
struct eeh_dev *edev;
|
||||
struct eeh_dev *edev, *tmp;
|
||||
void *ret;
|
||||
|
||||
if (!root) {
|
||||
|
@ -186,7 +186,7 @@ void *eeh_pe_dev_traverse(struct eeh_pe *root,
|
|||
|
||||
/* Traverse root PE */
|
||||
for (pe = root; pe; pe = eeh_pe_next(pe, root)) {
|
||||
eeh_pe_for_each_dev(pe, edev) {
|
||||
eeh_pe_for_each_dev(pe, edev, tmp) {
|
||||
ret = fn(edev, flag);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
@ -333,7 +333,7 @@ int eeh_add_to_parent_pe(struct eeh_dev *edev)
|
|||
while (parent) {
|
||||
if (!(parent->type & EEH_PE_INVALID))
|
||||
break;
|
||||
parent->type &= ~EEH_PE_INVALID;
|
||||
parent->type &= ~(EEH_PE_INVALID | EEH_PE_KEEP);
|
||||
parent = parent->parent;
|
||||
}
|
||||
pr_debug("EEH: Add %s to Device PE#%x, Parent PE#%x\n",
|
||||
|
@ -397,21 +397,20 @@ int eeh_add_to_parent_pe(struct eeh_dev *edev)
|
|||
/**
|
||||
* eeh_rmv_from_parent_pe - Remove one EEH device from the associated PE
|
||||
* @edev: EEH device
|
||||
* @purge_pe: remove PE or not
|
||||
*
|
||||
* The PE hierarchy tree might be changed when doing PCI hotplug.
|
||||
* Also, the PCI devices or buses could be removed from the system
|
||||
* during EEH recovery. So we have to call the function remove the
|
||||
* corresponding PE accordingly if necessary.
|
||||
*/
|
||||
int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
|
||||
int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
|
||||
{
|
||||
struct eeh_pe *pe, *parent, *child;
|
||||
int cnt;
|
||||
|
||||
if (!edev->pe) {
|
||||
pr_warning("%s: No PE found for EEH device %s\n",
|
||||
__func__, edev->dn->full_name);
|
||||
pr_debug("%s: No PE found for EEH device %s\n",
|
||||
__func__, edev->dn->full_name);
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
|
@ -431,7 +430,7 @@ int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe)
|
|||
if (pe->type & EEH_PE_PHB)
|
||||
break;
|
||||
|
||||
if (purge_pe) {
|
||||
if (!(pe->state & EEH_PE_KEEP)) {
|
||||
if (list_empty(&pe->edevs) &&
|
||||
list_empty(&pe->child_list)) {
|
||||
list_del(&pe->child);
|
||||
|
@ -502,7 +501,7 @@ static void *__eeh_pe_state_mark(void *data, void *flag)
|
|||
{
|
||||
struct eeh_pe *pe = (struct eeh_pe *)data;
|
||||
int state = *((int *)flag);
|
||||
struct eeh_dev *tmp;
|
||||
struct eeh_dev *edev, *tmp;
|
||||
struct pci_dev *pdev;
|
||||
|
||||
/*
|
||||
|
@ -512,8 +511,8 @@ static void *__eeh_pe_state_mark(void *data, void *flag)
|
|||
* the PCI device driver.
|
||||
*/
|
||||
pe->state |= state;
|
||||
eeh_pe_for_each_dev(pe, tmp) {
|
||||
pdev = eeh_dev_to_pci_dev(tmp);
|
||||
eeh_pe_for_each_dev(pe, edev, tmp) {
|
||||
pdev = eeh_dev_to_pci_dev(edev);
|
||||
if (pdev)
|
||||
pdev->error_state = pci_channel_io_frozen;
|
||||
}
|
||||
|
@ -579,7 +578,7 @@ void eeh_pe_state_clear(struct eeh_pe *pe, int state)
|
|||
* blocked on normal path during the stage. So we need utilize
|
||||
* eeh operations, which is always permitted.
|
||||
*/
|
||||
static void eeh_bridge_check_link(struct pci_dev *pdev,
|
||||
static void eeh_bridge_check_link(struct eeh_dev *edev,
|
||||
struct device_node *dn)
|
||||
{
|
||||
int cap;
|
||||
|
@ -590,16 +589,17 @@ static void eeh_bridge_check_link(struct pci_dev *pdev,
|
|||
* We only check root port and downstream ports of
|
||||
* PCIe switches
|
||||
*/
|
||||
if (!pci_is_pcie(pdev) ||
|
||||
(pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT &&
|
||||
pci_pcie_type(pdev) != PCI_EXP_TYPE_DOWNSTREAM))
|
||||
if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT)))
|
||||
return;
|
||||
|
||||
pr_debug("%s: Check PCIe link for %s ...\n",
|
||||
__func__, pci_name(pdev));
|
||||
pr_debug("%s: Check PCIe link for %04x:%02x:%02x.%01x ...\n",
|
||||
__func__, edev->phb->global_number,
|
||||
edev->config_addr >> 8,
|
||||
PCI_SLOT(edev->config_addr & 0xFF),
|
||||
PCI_FUNC(edev->config_addr & 0xFF));
|
||||
|
||||
/* Check slot status */
|
||||
cap = pdev->pcie_cap;
|
||||
cap = edev->pcie_cap;
|
||||
eeh_ops->read_config(dn, cap + PCI_EXP_SLTSTA, 2, &val);
|
||||
if (!(val & PCI_EXP_SLTSTA_PDS)) {
|
||||
pr_debug(" No card in the slot (0x%04x) !\n", val);
|
||||
|
@ -653,8 +653,7 @@ static void eeh_bridge_check_link(struct pci_dev *pdev,
|
|||
#define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
|
||||
#define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
|
||||
|
||||
static void eeh_restore_bridge_bars(struct pci_dev *pdev,
|
||||
struct eeh_dev *edev,
|
||||
static void eeh_restore_bridge_bars(struct eeh_dev *edev,
|
||||
struct device_node *dn)
|
||||
{
|
||||
int i;
|
||||
|
@ -680,7 +679,7 @@ static void eeh_restore_bridge_bars(struct pci_dev *pdev,
|
|||
eeh_ops->write_config(dn, PCI_COMMAND, 4, edev->config_space[1]);
|
||||
|
||||
/* Check the PCIe link is ready */
|
||||
eeh_bridge_check_link(pdev, dn);
|
||||
eeh_bridge_check_link(edev, dn);
|
||||
}
|
||||
|
||||
static void eeh_restore_device_bars(struct eeh_dev *edev,
|
||||
|
@ -729,19 +728,12 @@ static void eeh_restore_device_bars(struct eeh_dev *edev,
|
|||
*/
|
||||
static void *eeh_restore_one_device_bars(void *data, void *flag)
|
||||
{
|
||||
struct pci_dev *pdev = NULL;
|
||||
struct eeh_dev *edev = (struct eeh_dev *)data;
|
||||
struct device_node *dn = eeh_dev_to_of_node(edev);
|
||||
|
||||
/* Trace the PCI bridge */
|
||||
if (eeh_probe_mode_dev()) {
|
||||
pdev = eeh_dev_to_pci_dev(edev);
|
||||
if (pdev->hdr_type != PCI_HEADER_TYPE_BRIDGE)
|
||||
pdev = NULL;
|
||||
}
|
||||
|
||||
if (pdev)
|
||||
eeh_restore_bridge_bars(pdev, edev, dn);
|
||||
/* Do special restore for bridges */
|
||||
if (edev->mode & EEH_DEV_BRIDGE)
|
||||
eeh_restore_bridge_bars(edev, dn);
|
||||
else
|
||||
eeh_restore_device_bars(edev, dn);
|
||||
|
||||
|
|
|
@ -56,19 +56,40 @@ EEH_SHOW_ATTR(eeh_pe_config_addr, pe_config_addr, "0x%x");
|
|||
|
||||
void eeh_sysfs_add_device(struct pci_dev *pdev)
|
||||
{
|
||||
struct eeh_dev *edev = pci_dev_to_eeh_dev(pdev);
|
||||
int rc=0;
|
||||
|
||||
if (edev && (edev->mode & EEH_DEV_SYSFS))
|
||||
return;
|
||||
|
||||
rc += device_create_file(&pdev->dev, &dev_attr_eeh_mode);
|
||||
rc += device_create_file(&pdev->dev, &dev_attr_eeh_config_addr);
|
||||
rc += device_create_file(&pdev->dev, &dev_attr_eeh_pe_config_addr);
|
||||
|
||||
if (rc)
|
||||
printk(KERN_WARNING "EEH: Unable to create sysfs entries\n");
|
||||
else if (edev)
|
||||
edev->mode |= EEH_DEV_SYSFS;
|
||||
}
|
||||
|
||||
void eeh_sysfs_remove_device(struct pci_dev *pdev)
|
||||
{
|
||||
struct eeh_dev *edev = pci_dev_to_eeh_dev(pdev);
|
||||
|
||||
/*
|
||||
* The parent directory might have been removed. We needn't
|
||||
* continue for that case.
|
||||
*/
|
||||
if (!pdev->dev.kobj.sd) {
|
||||
if (edev)
|
||||
edev->mode &= ~EEH_DEV_SYSFS;
|
||||
return;
|
||||
}
|
||||
|
||||
device_remove_file(&pdev->dev, &dev_attr_eeh_mode);
|
||||
device_remove_file(&pdev->dev, &dev_attr_eeh_config_addr);
|
||||
device_remove_file(&pdev->dev, &dev_attr_eeh_pe_config_addr);
|
||||
|
||||
if (edev)
|
||||
edev->mode &= ~EEH_DEV_SYSFS;
|
||||
}
|
||||
|
|
|
@ -1462,6 +1462,8 @@ void pcibios_finish_adding_to_bus(struct pci_bus *bus)
|
|||
/* Allocate bus and devices resources */
|
||||
pcibios_allocate_bus_resources(bus);
|
||||
pcibios_claim_one_bus(bus);
|
||||
if (!pci_has_flag(PCI_PROBE_ONLY))
|
||||
pci_assign_unassigned_bus_resources(bus);
|
||||
|
||||
/* Fixup EEH */
|
||||
eeh_add_device_tree_late(bus);
|
||||
|
|
|
@ -22,32 +22,14 @@
|
|||
#include <asm/eeh.h>
|
||||
|
||||
/**
|
||||
* __pcibios_remove_pci_devices - remove all devices under this bus
|
||||
* @bus: the indicated PCI bus
|
||||
* @purge_pe: destroy the PE on removal of PCI devices
|
||||
* pcibios_release_device - release PCI device
|
||||
* @dev: PCI device
|
||||
*
|
||||
* Remove all of the PCI devices under this bus both from the
|
||||
* linux pci device tree, and from the powerpc EEH address cache.
|
||||
* By default, the corresponding PE will be destroied during the
|
||||
* normal PCI hotplug path. For PCI hotplug during EEH recovery,
|
||||
* the corresponding PE won't be destroied and deallocated.
|
||||
* The function is called before releasing the indicated PCI device.
|
||||
*/
|
||||
void __pcibios_remove_pci_devices(struct pci_bus *bus, int purge_pe)
|
||||
void pcibios_release_device(struct pci_dev *dev)
|
||||
{
|
||||
struct pci_dev *dev, *tmp;
|
||||
struct pci_bus *child_bus;
|
||||
|
||||
/* First go down child busses */
|
||||
list_for_each_entry(child_bus, &bus->children, node)
|
||||
__pcibios_remove_pci_devices(child_bus, purge_pe);
|
||||
|
||||
pr_debug("PCI: Removing devices on bus %04x:%02x\n",
|
||||
pci_domain_nr(bus), bus->number);
|
||||
list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
|
||||
pr_debug(" * Removing %s...\n", pci_name(dev));
|
||||
eeh_remove_bus_device(dev, purge_pe);
|
||||
pci_stop_and_remove_bus_device(dev);
|
||||
}
|
||||
eeh_remove_device(dev);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -59,8 +41,21 @@ void __pcibios_remove_pci_devices(struct pci_bus *bus, int purge_pe)
|
|||
*/
|
||||
void pcibios_remove_pci_devices(struct pci_bus *bus)
|
||||
{
|
||||
__pcibios_remove_pci_devices(bus, 1);
|
||||
struct pci_dev *dev, *tmp;
|
||||
struct pci_bus *child_bus;
|
||||
|
||||
/* First go down child busses */
|
||||
list_for_each_entry(child_bus, &bus->children, node)
|
||||
pcibios_remove_pci_devices(child_bus);
|
||||
|
||||
pr_debug("PCI: Removing devices on bus %04x:%02x\n",
|
||||
pci_domain_nr(bus), bus->number);
|
||||
list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
|
||||
pr_debug(" Removing %s...\n", pci_name(dev));
|
||||
pci_stop_and_remove_bus_device(dev);
|
||||
}
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices);
|
||||
|
||||
/**
|
||||
|
@ -76,7 +71,7 @@ EXPORT_SYMBOL_GPL(pcibios_remove_pci_devices);
|
|||
*/
|
||||
void pcibios_add_pci_devices(struct pci_bus * bus)
|
||||
{
|
||||
int slotno, num, mode, pass, max;
|
||||
int slotno, mode, pass, max;
|
||||
struct pci_dev *dev;
|
||||
struct device_node *dn = pci_bus_to_OF_node(bus);
|
||||
|
||||
|
@ -90,11 +85,15 @@ void pcibios_add_pci_devices(struct pci_bus * bus)
|
|||
/* use ofdt-based probe */
|
||||
of_rescan_bus(dn, bus);
|
||||
} else if (mode == PCI_PROBE_NORMAL) {
|
||||
/* use legacy probe */
|
||||
/*
|
||||
* Use legacy probe. In the partial hotplug case, we
|
||||
* probably have grandchildren devices unplugged. So
|
||||
* we don't check the return value from pci_scan_slot() in
|
||||
* order for fully rescan all the way down to pick them up.
|
||||
* They can have been removed during partial hotplug.
|
||||
*/
|
||||
slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
|
||||
num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
|
||||
if (!num)
|
||||
return;
|
||||
pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
|
||||
pcibios_setup_bus_devices(bus);
|
||||
max = bus->busn_res.start;
|
||||
for (pass = 0; pass < 2; pass++) {
|
||||
|
|
|
@ -230,11 +230,14 @@ void of_scan_pci_bridge(struct pci_dev *dev)
|
|||
return;
|
||||
}
|
||||
|
||||
bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
|
||||
bus = pci_find_bus(pci_domain_nr(dev->bus), busrange[0]);
|
||||
if (!bus) {
|
||||
printk(KERN_ERR "Failed to create pci bus for %s\n",
|
||||
node->full_name);
|
||||
return;
|
||||
bus = pci_add_new_bus(dev->bus, dev, busrange[0]);
|
||||
if (!bus) {
|
||||
printk(KERN_ERR "Failed to create pci bus for %s\n",
|
||||
node->full_name);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
bus->primary = dev->bus->number;
|
||||
|
@ -292,6 +295,38 @@ void of_scan_pci_bridge(struct pci_dev *dev)
|
|||
}
|
||||
EXPORT_SYMBOL(of_scan_pci_bridge);
|
||||
|
||||
static struct pci_dev *of_scan_pci_dev(struct pci_bus *bus,
|
||||
struct device_node *dn)
|
||||
{
|
||||
struct pci_dev *dev = NULL;
|
||||
const u32 *reg;
|
||||
int reglen, devfn;
|
||||
|
||||
pr_debug(" * %s\n", dn->full_name);
|
||||
if (!of_device_is_available(dn))
|
||||
return NULL;
|
||||
|
||||
reg = of_get_property(dn, "reg", ®len);
|
||||
if (reg == NULL || reglen < 20)
|
||||
return NULL;
|
||||
devfn = (reg[0] >> 8) & 0xff;
|
||||
|
||||
/* Check if the PCI device is already there */
|
||||
dev = pci_get_slot(bus, devfn);
|
||||
if (dev) {
|
||||
pci_dev_put(dev);
|
||||
return dev;
|
||||
}
|
||||
|
||||
/* create a new pci_dev for this device */
|
||||
dev = of_create_pci_dev(dn, bus, devfn);
|
||||
if (!dev)
|
||||
return NULL;
|
||||
|
||||
pr_debug(" dev header type: %x\n", dev->hdr_type);
|
||||
return dev;
|
||||
}
|
||||
|
||||
/**
|
||||
* __of_scan_bus - given a PCI bus node, setup bus and scan for child devices
|
||||
* @node: device tree node for the PCI bus
|
||||
|
@ -302,8 +337,6 @@ static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
|
|||
int rescan_existing)
|
||||
{
|
||||
struct device_node *child;
|
||||
const u32 *reg;
|
||||
int reglen, devfn;
|
||||
struct pci_dev *dev;
|
||||
|
||||
pr_debug("of_scan_bus(%s) bus no %d...\n",
|
||||
|
@ -311,16 +344,7 @@ static void __of_scan_bus(struct device_node *node, struct pci_bus *bus,
|
|||
|
||||
/* Scan direct children */
|
||||
for_each_child_of_node(node, child) {
|
||||
pr_debug(" * %s\n", child->full_name);
|
||||
if (!of_device_is_available(child))
|
||||
continue;
|
||||
reg = of_get_property(child, "reg", ®len);
|
||||
if (reg == NULL || reglen < 20)
|
||||
continue;
|
||||
devfn = (reg[0] >> 8) & 0xff;
|
||||
|
||||
/* create a new pci_dev for this device */
|
||||
dev = of_create_pci_dev(child, bus, devfn);
|
||||
dev = of_scan_pci_dev(bus, child);
|
||||
if (!dev)
|
||||
continue;
|
||||
pr_debug(" dev header type: %x\n", dev->hdr_type);
|
||||
|
|
|
@ -644,7 +644,8 @@ unsigned char ibm_architecture_vec[] = {
|
|||
W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
|
||||
W(0xffff0000), W(0x003e0000), /* POWER6 */
|
||||
W(0xffff0000), W(0x003f0000), /* POWER7 */
|
||||
W(0xffff0000), W(0x004b0000), /* POWER8 */
|
||||
W(0xffff0000), W(0x004b0000), /* POWER8E */
|
||||
W(0xffff0000), W(0x004d0000), /* POWER8 */
|
||||
W(0xffffffff), W(0x0f000004), /* all 2.07-compliant */
|
||||
W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */
|
||||
W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
|
||||
|
@ -706,7 +707,7 @@ unsigned char ibm_architecture_vec[] = {
|
|||
* must match by the macro below. Update the definition if
|
||||
* the structure layout changes.
|
||||
*/
|
||||
#define IBM_ARCH_VEC_NRCORES_OFFSET 117
|
||||
#define IBM_ARCH_VEC_NRCORES_OFFSET 125
|
||||
W(NR_CPUS), /* number of cores supported */
|
||||
0,
|
||||
0,
|
||||
|
|
|
@ -38,9 +38,6 @@ jiffies = jiffies_64 + 4;
|
|||
#endif
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
reloc_start = .;
|
||||
|
||||
. = KERNELBASE;
|
||||
|
||||
/*
|
||||
|
|
|
@ -43,6 +43,7 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
|
|||
{
|
||||
unsigned long va;
|
||||
unsigned int penc;
|
||||
unsigned long sllp;
|
||||
|
||||
/*
|
||||
* We need 14 to 65 bits of va for a tlibe of 4K page
|
||||
|
@ -64,7 +65,9 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
|
|||
/* clear out bits after (52) [0....52.....63] */
|
||||
va &= ~((1ul << (64 - 52)) - 1);
|
||||
va |= ssize << 8;
|
||||
va |= mmu_psize_defs[apsize].sllp << 6;
|
||||
sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) |
|
||||
((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4);
|
||||
va |= sllp << 5;
|
||||
asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2)
|
||||
: : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
|
||||
: "memory");
|
||||
|
@ -98,6 +101,7 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
|
|||
{
|
||||
unsigned long va;
|
||||
unsigned int penc;
|
||||
unsigned long sllp;
|
||||
|
||||
/* VPN_SHIFT can be atmost 12 */
|
||||
va = vpn << VPN_SHIFT;
|
||||
|
@ -113,7 +117,9 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
|
|||
/* clear out bits after(52) [0....52.....63] */
|
||||
va &= ~((1ul << (64 - 52)) - 1);
|
||||
va |= ssize << 8;
|
||||
va |= mmu_psize_defs[apsize].sllp << 6;
|
||||
sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) |
|
||||
((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4);
|
||||
va |= sllp << 5;
|
||||
asm volatile(".long 0x7c000224 | (%0 << 11) | (0 << 21)"
|
||||
: : "r"(va) : "memory");
|
||||
break;
|
||||
|
@ -554,6 +560,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
|
|||
seg_off |= vpi << shift;
|
||||
}
|
||||
*vpn = vsid << (SID_SHIFT - VPN_SHIFT) | seg_off >> VPN_SHIFT;
|
||||
break;
|
||||
case MMU_SEGSIZE_1T:
|
||||
/* We only have 40 - 23 bits of seg_off in avpn */
|
||||
seg_off = (avpn & 0x1ffff) << 23;
|
||||
|
@ -563,6 +570,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
|
|||
seg_off |= vpi << shift;
|
||||
}
|
||||
*vpn = vsid << (SID_SHIFT_1T - VPN_SHIFT) | seg_off >> VPN_SHIFT;
|
||||
break;
|
||||
default:
|
||||
*vpn = size = 0;
|
||||
}
|
||||
|
|
|
@ -1252,8 +1252,11 @@ nocheck:
|
|||
|
||||
ret = 0;
|
||||
out:
|
||||
if (has_branch_stack(event))
|
||||
if (has_branch_stack(event)) {
|
||||
power_pmu_bhrb_enable(event);
|
||||
cpuhw->bhrb_filter = ppmu->bhrb_filter_map(
|
||||
event->attr.branch_sample_type);
|
||||
}
|
||||
|
||||
perf_pmu_enable(event->pmu);
|
||||
local_irq_restore(flags);
|
||||
|
|
|
@ -561,18 +561,13 @@ static int power8_generic_events[] = {
|
|||
static u64 power8_bhrb_filter_map(u64 branch_sample_type)
|
||||
{
|
||||
u64 pmu_bhrb_filter = 0;
|
||||
u64 br_privilege = branch_sample_type & ONLY_PLM;
|
||||
|
||||
/* BHRB and regular PMU events share the same prvillege state
|
||||
/* BHRB and regular PMU events share the same privilege state
|
||||
* filter configuration. BHRB is always recorded along with a
|
||||
* regular PMU event. So privilege state filter criteria for BHRB
|
||||
* and the companion PMU events has to be the same. As a default
|
||||
* "perf record" tool sets all privillege bits ON when no filter
|
||||
* criteria is provided in the command line. So as along as all
|
||||
* privillege bits are ON or they are OFF, we are good to go.
|
||||
* regular PMU event. As the privilege state filter is handled
|
||||
* in the basic PMC configuration of the accompanying regular
|
||||
* PMU event, we ignore any separate BHRB specific request.
|
||||
*/
|
||||
if ((br_privilege != 7) && (br_privilege != 0))
|
||||
return -1;
|
||||
|
||||
/* No branch filter requested */
|
||||
if (branch_sample_type & PERF_SAMPLE_BRANCH_ANY)
|
||||
|
@ -621,10 +616,19 @@ static struct power_pmu power8_pmu = {
|
|||
|
||||
static int __init init_power8_pmu(void)
|
||||
{
|
||||
int rc;
|
||||
|
||||
if (!cur_cpu_spec->oprofile_cpu_type ||
|
||||
strcmp(cur_cpu_spec->oprofile_cpu_type, "ppc64/power8"))
|
||||
return -ENODEV;
|
||||
|
||||
return register_power_pmu(&power8_pmu);
|
||||
rc = register_power_pmu(&power8_pmu);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* Tell userspace that EBB is supported */
|
||||
cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_EBB;
|
||||
|
||||
return 0;
|
||||
}
|
||||
early_initcall(init_power8_pmu);
|
||||
|
|
|
@ -114,7 +114,7 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
|
|||
* the root bridge. So it's not reasonable to continue
|
||||
* the probing.
|
||||
*/
|
||||
if (!dn || !edev)
|
||||
if (!dn || !edev || edev->pe)
|
||||
return 0;
|
||||
|
||||
/* Skip for PCI-ISA bridge */
|
||||
|
@ -122,8 +122,19 @@ static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
|
|||
return 0;
|
||||
|
||||
/* Initialize eeh device */
|
||||
edev->class_code = dev->class;
|
||||
edev->mode = 0;
|
||||
edev->class_code = dev->class;
|
||||
edev->mode &= 0xFFFFFF00;
|
||||
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
|
||||
edev->mode |= EEH_DEV_BRIDGE;
|
||||
if (pci_is_pcie(dev)) {
|
||||
edev->pcie_cap = pci_pcie_cap(dev);
|
||||
|
||||
if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
|
||||
edev->mode |= EEH_DEV_ROOT_PORT;
|
||||
else if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)
|
||||
edev->mode |= EEH_DEV_DS_PORT;
|
||||
}
|
||||
|
||||
edev->config_addr = ((dev->bus->number << 8) | dev->devfn);
|
||||
edev->pe_config_addr = phb->bdfn_to_pe(phb, dev->bus, dev->devfn & 0xff);
|
||||
|
||||
|
|
|
@ -1266,7 +1266,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
|
|||
opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
|
||||
}
|
||||
|
||||
void pnv_pci_init_ioda2_phb(struct device_node *np)
|
||||
void __init pnv_pci_init_ioda2_phb(struct device_node *np)
|
||||
{
|
||||
pnv_pci_init_ioda_phb(np, 0, PNV_PHB_IODA2);
|
||||
}
|
||||
|
|
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