Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband
This commit is contained in:
Коммит
9c637646da
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@ -301,7 +301,8 @@ static void ib_cache_event(struct ib_event_handler *handler,
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event->event == IB_EVENT_PORT_ACTIVE ||
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event->event == IB_EVENT_LID_CHANGE ||
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event->event == IB_EVENT_PKEY_CHANGE ||
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event->event == IB_EVENT_SM_CHANGE) {
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event->event == IB_EVENT_SM_CHANGE ||
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event->event == IB_EVENT_CLIENT_REREGISTER) {
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work = kmalloc(sizeof *work, GFP_ATOMIC);
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if (work) {
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INIT_WORK(&work->work, ib_cache_task, work);
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@ -405,7 +405,8 @@ static void ib_sa_event(struct ib_event_handler *handler, struct ib_event *event
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event->event == IB_EVENT_PORT_ACTIVE ||
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event->event == IB_EVENT_LID_CHANGE ||
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event->event == IB_EVENT_PKEY_CHANGE ||
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event->event == IB_EVENT_SM_CHANGE) {
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event->event == IB_EVENT_SM_CHANGE ||
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event->event == IB_EVENT_CLIENT_REREGISTER) {
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struct ib_sa_device *sa_dev;
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sa_dev = container_of(handler, typeof(*sa_dev), event_handler);
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@ -967,12 +967,12 @@ static struct {
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} mthca_hca_table[] = {
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[TAVOR] = { .latest_fw = MTHCA_FW_VER(3, 4, 0),
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.flags = 0 },
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[ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 400),
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[ARBEL_COMPAT] = { .latest_fw = MTHCA_FW_VER(4, 7, 600),
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.flags = MTHCA_FLAG_PCIE },
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[ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 0),
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[ARBEL_NATIVE] = { .latest_fw = MTHCA_FW_VER(5, 1, 400),
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.flags = MTHCA_FLAG_MEMFREE |
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MTHCA_FLAG_PCIE },
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[SINAI] = { .latest_fw = MTHCA_FW_VER(1, 0, 800),
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[SINAI] = { .latest_fw = MTHCA_FW_VER(1, 1, 0),
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.flags = MTHCA_FLAG_MEMFREE |
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MTHCA_FLAG_PCIE |
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MTHCA_FLAG_SINAI_OPT }
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@ -1287,11 +1287,7 @@ int mthca_register_device(struct mthca_dev *dev)
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(1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
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(1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
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(1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
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(1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
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(1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
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(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
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(1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
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(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
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(1ull << IB_USER_VERBS_CMD_DETACH_MCAST);
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dev->ib_dev.node_type = IB_NODE_CA;
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dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
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dev->ib_dev.dma_device = &dev->pdev->dev;
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@ -1316,6 +1312,11 @@ int mthca_register_device(struct mthca_dev *dev)
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dev->ib_dev.modify_srq = mthca_modify_srq;
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dev->ib_dev.query_srq = mthca_query_srq;
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dev->ib_dev.destroy_srq = mthca_destroy_srq;
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dev->ib_dev.uverbs_cmd_mask |=
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(1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
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(1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
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(1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
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(1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
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if (mthca_is_memfree(dev))
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dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
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@ -136,8 +136,8 @@ struct mthca_ah {
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* We have one global lock that protects dev->cq/qp_table. Each
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* struct mthca_cq/qp also has its own lock. An individual qp lock
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* may be taken inside of an individual cq lock. Both cqs attached to
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* a qp may be locked, with the send cq locked first. No other
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* nesting should be done.
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* a qp may be locked, with the cq with the lower cqn locked first.
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* No other nesting should be done.
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*
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* Each struct mthca_cq/qp also has an ref count, protected by the
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* corresponding table lock. The pointer from the cq/qp_table to the
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@ -99,6 +99,10 @@ enum {
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MTHCA_QP_BIT_RSC = 1 << 3
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};
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enum {
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MTHCA_SEND_DOORBELL_FENCE = 1 << 5
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};
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struct mthca_qp_path {
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__be32 port_pkey;
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u8 rnr_retry;
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@ -1259,6 +1263,32 @@ int mthca_alloc_qp(struct mthca_dev *dev,
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return 0;
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}
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static void mthca_lock_cqs(struct mthca_cq *send_cq, struct mthca_cq *recv_cq)
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{
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if (send_cq == recv_cq)
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spin_lock_irq(&send_cq->lock);
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else if (send_cq->cqn < recv_cq->cqn) {
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spin_lock_irq(&send_cq->lock);
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spin_lock_nested(&recv_cq->lock, SINGLE_DEPTH_NESTING);
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} else {
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spin_lock_irq(&recv_cq->lock);
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spin_lock_nested(&send_cq->lock, SINGLE_DEPTH_NESTING);
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}
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}
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static void mthca_unlock_cqs(struct mthca_cq *send_cq, struct mthca_cq *recv_cq)
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{
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if (send_cq == recv_cq)
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spin_unlock_irq(&send_cq->lock);
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else if (send_cq->cqn < recv_cq->cqn) {
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spin_unlock(&recv_cq->lock);
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spin_unlock_irq(&send_cq->lock);
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} else {
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spin_unlock(&send_cq->lock);
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spin_unlock_irq(&recv_cq->lock);
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}
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}
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int mthca_alloc_sqp(struct mthca_dev *dev,
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struct mthca_pd *pd,
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struct mthca_cq *send_cq,
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@ -1311,17 +1341,13 @@ int mthca_alloc_sqp(struct mthca_dev *dev,
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* Lock CQs here, so that CQ polling code can do QP lookup
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* without taking a lock.
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*/
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spin_lock_irq(&send_cq->lock);
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if (send_cq != recv_cq)
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spin_lock(&recv_cq->lock);
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mthca_lock_cqs(send_cq, recv_cq);
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spin_lock(&dev->qp_table.lock);
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mthca_array_clear(&dev->qp_table.qp, mqpn);
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spin_unlock(&dev->qp_table.lock);
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if (send_cq != recv_cq)
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spin_unlock(&recv_cq->lock);
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spin_unlock_irq(&send_cq->lock);
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mthca_unlock_cqs(send_cq, recv_cq);
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err_out:
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dma_free_coherent(&dev->pdev->dev, sqp->header_buf_size,
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@ -1355,9 +1381,7 @@ void mthca_free_qp(struct mthca_dev *dev,
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* Lock CQs here, so that CQ polling code can do QP lookup
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* without taking a lock.
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*/
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spin_lock_irq(&send_cq->lock);
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if (send_cq != recv_cq)
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spin_lock(&recv_cq->lock);
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mthca_lock_cqs(send_cq, recv_cq);
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spin_lock(&dev->qp_table.lock);
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mthca_array_clear(&dev->qp_table.qp,
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@ -1365,9 +1389,7 @@ void mthca_free_qp(struct mthca_dev *dev,
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--qp->refcount;
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spin_unlock(&dev->qp_table.lock);
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if (send_cq != recv_cq)
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spin_unlock(&recv_cq->lock);
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spin_unlock_irq(&send_cq->lock);
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mthca_unlock_cqs(send_cq, recv_cq);
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wait_event(qp->wait, !get_qp_refcount(dev, qp));
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@ -1502,7 +1524,7 @@ int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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int i;
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int size;
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int size0 = 0;
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u32 f0 = 0;
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u32 f0;
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int ind;
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u8 op0 = 0;
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@ -1686,6 +1708,8 @@ int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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if (!size0) {
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size0 = size;
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op0 = mthca_opcode[wr->opcode];
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f0 = wr->send_flags & IB_SEND_FENCE ?
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MTHCA_SEND_DOORBELL_FENCE : 0;
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}
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++ind;
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@ -1843,7 +1867,7 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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int i;
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int size;
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int size0 = 0;
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u32 f0 = 0;
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u32 f0;
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int ind;
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u8 op0 = 0;
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@ -2051,6 +2075,8 @@ int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
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if (!size0) {
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size0 = size;
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op0 = mthca_opcode[wr->opcode];
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f0 = wr->send_flags & IB_SEND_FENCE ?
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MTHCA_SEND_DOORBELL_FENCE : 0;
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}
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++ind;
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