x86/cpu: Don't write CSTAR MSR on Intel CPUs
Intel CPUs do not support SYSCALL in 32-bit mode, but the kernel initializes MSR_CSTAR unconditionally. That MSR write is normally ignored by the CPU, but in a TDX guest it raises a #VE trap. Exclude Intel CPUs from the MSR_CSTAR initialization. [ tglx: Fixed the subject line and removed the redundant comment. ] Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/r/20211119035803.4012145-1-sathyanarayanan.kuppuswamy@linux.intel.com
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@ -1787,6 +1787,17 @@ EXPORT_PER_CPU_SYMBOL(__preempt_count);
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DEFINE_PER_CPU(unsigned long, cpu_current_top_of_stack) = TOP_OF_INIT_STACK;
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static void wrmsrl_cstar(unsigned long val)
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{
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/*
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* Intel CPUs do not support 32-bit SYSCALL. Writing to MSR_CSTAR
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* is so far ignored by the CPU, but raises a #VE trap in a TDX
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* guest. Avoid the pointless write on all Intel CPUs.
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*/
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if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
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wrmsrl(MSR_CSTAR, val);
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}
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/* May not be marked __init: used by software suspend */
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void syscall_init(void)
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{
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@ -1794,7 +1805,7 @@ void syscall_init(void)
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wrmsrl(MSR_LSTAR, (unsigned long)entry_SYSCALL_64);
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#ifdef CONFIG_IA32_EMULATION
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wrmsrl(MSR_CSTAR, (unsigned long)entry_SYSCALL_compat);
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wrmsrl_cstar((unsigned long)entry_SYSCALL_compat);
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/*
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* This only works on Intel CPUs.
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* On AMD CPUs these MSRs are 32-bit, CPU truncates MSR_IA32_SYSENTER_EIP.
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@ -1806,7 +1817,7 @@ void syscall_init(void)
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(unsigned long)(cpu_entry_stack(smp_processor_id()) + 1));
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wrmsrl_safe(MSR_IA32_SYSENTER_EIP, (u64)entry_SYSENTER_compat);
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#else
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wrmsrl(MSR_CSTAR, (unsigned long)ignore_sysret);
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wrmsrl_cstar((unsigned long)ignore_sysret);
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wrmsrl_safe(MSR_IA32_SYSENTER_CS, (u64)GDT_ENTRY_INVALID_SEG);
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wrmsrl_safe(MSR_IA32_SYSENTER_ESP, 0ULL);
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wrmsrl_safe(MSR_IA32_SYSENTER_EIP, 0ULL);
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