spi: stm32: fix stm32_spi_prepare_mbr in case of odd clk_rate
Fix spi->clk_rate when it is odd to the nearest lowest even value because minimum SPI divider is 2. Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Alain Volmat <alain.volmat@st.com> Link: https://lore.kernel.org/r/1597043558-29668-4-git-send-email-alain.volmat@st.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -441,7 +441,8 @@ static int stm32_spi_prepare_mbr(struct stm32_spi *spi, u32 speed_hz,
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{
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u32 div, mbrdiv;
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div = DIV_ROUND_UP(spi->clk_rate, speed_hz);
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/* Ensure spi->clk_rate is even */
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div = DIV_ROUND_UP(spi->clk_rate & ~0x1, speed_hz);
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/*
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* SPI framework set xfer->speed_hz to master->max_speed_hz if
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