phy: fixes for 5.17
Fixes for bunch of drivers: - clk params for dphy - arg fix for mtk-tphy - refcount leak fix for stm32 - bus width fix for zynqmp - sentinel fix ti - PHY_BRCM_USB Kconfig fix - clk fix for usb phy -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAmH9V/0ACgkQfBQHDyUj g0edyQ//bJjAoEnUWNcUjS4FYn/tAFAcsDD7pXQFoQoxWcQ3OxLGUulakIirmSgH 4PNxI6IPvYzWLRKfiqIF6gSPQC8SVc1pfXH10KbouSOk7ss9uynyBrnS44q9lzFe dLIVwSFSyXCBWP9jGQx/0Y7iIS4FtIrfxaYlDkJwt4JGWh4u5JTwNFhzhRGf6jee 8+hm6zEPNWKFYuMpfS+v45COJbcZ68WLJQOltZHHxqaKT1m8CSh3eWJOSTwCqtju iADLEOu8S/oJ3PGBHT+PZIk2hI7udgVlTxjPx0ENTcXyC5oq/3b77Xxelrp0+3dI M+wM8mfN49xW/YyM/Ya0H0pDFyLLnujoT+tDeHlVVPz6rt/KyKowwyQPnTHxUA8u HYf2Nbfs/Hxx52eYP1+JB4r5OYeX4zzWr5itPN3FXwGmHWtKJcaDVTdon/H5I9ag airSy8IDIZPRHGGEFnecBFG6geSsbIFKv3Hvk2v2OpxKRbMMxptOoCfqvZSoNwi8 WV+JyuyVH8E3QIxAGa5TUvkyweMHwJ97HYmTJwcvPDz23yVIRtxkhxwuxLFzNPnl 57U2uYd/3rYpLCyRMlnjizhjzLd/D/Mnbs3u35xp2OZPp6qCffmUx4+0n7xvFu4+ 2jpa1Liob4gPtxhMD7usAhPDv25uPF6cUBCYQfzh+BeHlWp5bvs= =Av3W -----END PGP SIGNATURE----- Merge tag 'phy-fixes-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next Vinod writes: phy: fixes for 5.17 Fixes for bunch of drivers: - clk params for dphy - arg fix for mtk-tphy - refcount leak fix for stm32 - bus width fix for zynqmp - sentinel fix ti - PHY_BRCM_USB Kconfig fix - clk fix for usb phy * tag 'phy-fixes-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: phy: dphy: Correct clk_pre parameter phy: phy-mtk-tphy: Fix duplicated argument in phy-mtk-tphy phy: stm32: fix a refcount leak in stm32_usbphyc_pll_enable() phy: xilinx: zynqmp: Fix bus width setting for SGMII phy: cadence: Sierra: fix error handling bugs in probe() phy: ti: Fix missing sentinel for clk_div_table phy: broadcom: Kconfig: Fix PHY_BRCM_USB config option phy: usb: Leave some clocks running during suspend
This commit is contained in:
Greg Kroah-Hartman
Коммит
9ccdcc73d3
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@ -7,6 +7,7 @@
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/clk.h>
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#include <linux/irq.h>
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#include <linux/math64.h>
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@ -196,12 +197,9 @@ static u32 ps2bc(struct nwl_dsi *dsi, unsigned long long ps)
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/*
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* ui2bc - UI time periods to byte clock cycles
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*/
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static u32 ui2bc(struct nwl_dsi *dsi, unsigned long long ui)
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static u32 ui2bc(unsigned int ui)
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{
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u32 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
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return DIV64_U64_ROUND_UP(ui * dsi->lanes,
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dsi->mode.clock * 1000 * bpp);
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return DIV_ROUND_UP(ui, BITS_PER_BYTE);
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}
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/*
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@ -232,12 +230,12 @@ static int nwl_dsi_config_host(struct nwl_dsi *dsi)
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}
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/* values in byte clock cycles */
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cycles = ui2bc(dsi, cfg->clk_pre);
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cycles = ui2bc(cfg->clk_pre);
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DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_pre: 0x%x\n", cycles);
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nwl_dsi_write(dsi, NWL_DSI_CFG_T_PRE, cycles);
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cycles = ps2bc(dsi, cfg->lpx + cfg->clk_prepare + cfg->clk_zero);
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DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_tx_gap (pre): 0x%x\n", cycles);
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cycles += ui2bc(dsi, cfg->clk_pre);
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cycles += ui2bc(cfg->clk_pre);
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DRM_DEV_DEBUG_DRIVER(dsi->dev, "cfg_t_post: 0x%x\n", cycles);
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nwl_dsi_write(dsi, NWL_DSI_CFG_T_POST, cycles);
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cycles = ps2bc(dsi, cfg->hs_exit);
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@ -9,6 +9,7 @@
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/bits.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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@ -250,7 +251,7 @@ static int phy_meson_axg_mipi_dphy_power_on(struct phy *phy)
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(DIV_ROUND_UP(priv->config.clk_zero, temp) << 16) |
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(DIV_ROUND_UP(priv->config.clk_prepare, temp) << 24));
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regmap_write(priv->regmap, MIPI_DSI_CLK_TIM1,
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DIV_ROUND_UP(priv->config.clk_pre, temp));
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DIV_ROUND_UP(priv->config.clk_pre, BITS_PER_BYTE));
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regmap_write(priv->regmap, MIPI_DSI_HS_TIM,
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DIV_ROUND_UP(priv->config.hs_exit, temp) |
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@ -97,8 +97,7 @@ config PHY_BRCM_USB
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depends on OF
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select GENERIC_PHY
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select SOC_BRCMSTB if ARCH_BRCMSTB
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default ARCH_BCM4908
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default ARCH_BRCMSTB
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default ARCH_BCM4908 || ARCH_BRCMSTB
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help
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Enable this to support the Broadcom STB USB PHY.
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This driver is required by the USB XHCI, EHCI and OHCI
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@ -18,6 +18,7 @@
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#include <linux/soc/brcmstb/brcmstb.h>
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#include <dt-bindings/phy/phy.h>
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#include <linux/mfd/syscon.h>
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#include <linux/suspend.h>
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#include "phy-brcm-usb-init.h"
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@ -70,12 +71,35 @@ struct brcm_usb_phy_data {
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int init_count;
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int wake_irq;
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struct brcm_usb_phy phys[BRCM_USB_PHY_ID_MAX];
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struct notifier_block pm_notifier;
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bool pm_active;
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};
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static s8 *node_reg_names[BRCM_REGS_MAX] = {
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"crtl", "xhci_ec", "xhci_gbl", "usb_phy", "usb_mdio", "bdc_ec"
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};
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static int brcm_pm_notifier(struct notifier_block *notifier,
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unsigned long pm_event,
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void *unused)
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{
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struct brcm_usb_phy_data *priv =
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container_of(notifier, struct brcm_usb_phy_data, pm_notifier);
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switch (pm_event) {
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case PM_HIBERNATION_PREPARE:
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case PM_SUSPEND_PREPARE:
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priv->pm_active = true;
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break;
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case PM_POST_RESTORE:
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case PM_POST_HIBERNATION:
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case PM_POST_SUSPEND:
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priv->pm_active = false;
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break;
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}
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return NOTIFY_DONE;
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}
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static irqreturn_t brcm_usb_phy_wake_isr(int irq, void *dev_id)
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{
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struct phy *gphy = dev_id;
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@ -91,6 +115,9 @@ static int brcm_usb_phy_init(struct phy *gphy)
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struct brcm_usb_phy_data *priv =
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container_of(phy, struct brcm_usb_phy_data, phys[phy->id]);
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if (priv->pm_active)
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return 0;
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/*
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* Use a lock to make sure a second caller waits until
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* the base phy is inited before using it.
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@ -120,6 +147,9 @@ static int brcm_usb_phy_exit(struct phy *gphy)
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struct brcm_usb_phy_data *priv =
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container_of(phy, struct brcm_usb_phy_data, phys[phy->id]);
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if (priv->pm_active)
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return 0;
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dev_dbg(&gphy->dev, "EXIT\n");
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if (phy->id == BRCM_USB_PHY_2_0)
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brcm_usb_uninit_eohci(&priv->ini);
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@ -488,6 +518,9 @@ static int brcm_usb_phy_probe(struct platform_device *pdev)
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if (err)
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return err;
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priv->pm_notifier.notifier_call = brcm_pm_notifier;
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register_pm_notifier(&priv->pm_notifier);
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mutex_init(&priv->mutex);
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/* make sure invert settings are correct */
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@ -528,7 +561,10 @@ static int brcm_usb_phy_probe(struct platform_device *pdev)
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static int brcm_usb_phy_remove(struct platform_device *pdev)
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{
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struct brcm_usb_phy_data *priv = dev_get_drvdata(&pdev->dev);
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sysfs_remove_group(&pdev->dev.kobj, &brcm_usb_phy_group);
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unregister_pm_notifier(&priv->pm_notifier);
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return 0;
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}
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@ -539,6 +575,7 @@ static int brcm_usb_phy_suspend(struct device *dev)
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struct brcm_usb_phy_data *priv = dev_get_drvdata(dev);
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if (priv->init_count) {
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dev_dbg(dev, "SUSPEND\n");
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priv->ini.wake_enabled = device_may_wakeup(dev);
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if (priv->phys[BRCM_USB_PHY_3_0].inited)
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brcm_usb_uninit_xhci(&priv->ini);
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@ -578,6 +615,7 @@ static int brcm_usb_phy_resume(struct device *dev)
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* Uninitialize anything that wasn't previously initialized.
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*/
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if (priv->init_count) {
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dev_dbg(dev, "RESUME\n");
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if (priv->wake_irq >= 0)
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disable_irq_wake(priv->wake_irq);
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brcm_usb_init_common(&priv->ini);
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@ -1338,7 +1338,7 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev)
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struct device *dev = &pdev->dev;
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const struct cdns_sierra_data *data;
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unsigned int id_value;
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int i, ret, node = 0;
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int ret, node = 0;
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void __iomem *base;
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struct device_node *dn = dev->of_node, *child;
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@ -1416,7 +1416,8 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev)
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dev_err(dev, "failed to get reset %s\n",
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child->full_name);
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ret = PTR_ERR(sp->phys[node].lnk_rst);
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goto put_child2;
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of_node_put(child);
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goto put_control;
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}
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if (!sp->autoconf) {
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@ -1424,7 +1425,9 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev)
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if (ret) {
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dev_err(dev, "missing property in node %s\n",
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child->name);
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goto put_child;
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of_node_put(child);
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reset_control_put(sp->phys[node].lnk_rst);
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goto put_control;
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}
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}
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@ -1434,7 +1437,9 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev)
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if (IS_ERR(gphy)) {
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ret = PTR_ERR(gphy);
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goto put_child;
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of_node_put(child);
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reset_control_put(sp->phys[node].lnk_rst);
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goto put_control;
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}
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sp->phys[node].phy = gphy;
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phy_set_drvdata(gphy, &sp->phys[node]);
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@ -1446,26 +1451,28 @@ static int cdns_sierra_phy_probe(struct platform_device *pdev)
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if (sp->num_lanes > SIERRA_MAX_LANES) {
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ret = -EINVAL;
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dev_err(dev, "Invalid lane configuration\n");
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goto put_child2;
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goto put_control;
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}
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/* If more than one subnode, configure the PHY as multilink */
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if (!sp->autoconf && sp->nsubnodes > 1) {
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ret = cdns_sierra_phy_configure_multilink(sp);
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if (ret)
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goto put_child2;
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goto put_control;
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}
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pm_runtime_enable(dev);
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phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
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return PTR_ERR_OR_ZERO(phy_provider);
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if (IS_ERR(phy_provider)) {
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ret = PTR_ERR(phy_provider);
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goto put_control;
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}
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put_child:
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node++;
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put_child2:
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for (i = 0; i < node; i++)
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reset_control_put(sp->phys[i].lnk_rst);
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of_node_put(child);
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return 0;
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put_control:
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while (--node >= 0)
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reset_control_put(sp->phys[node].lnk_rst);
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clk_disable:
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cdns_sierra_phy_disable_clocks(sp);
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reset_control_assert(sp->apb_rst);
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@ -992,7 +992,7 @@ static int phy_efuse_get(struct mtk_tphy *tphy, struct mtk_phy_instance *instanc
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/* no efuse, ignore it */
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if (!instance->efuse_intr &&
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!instance->efuse_rx_imp &&
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!instance->efuse_rx_imp) {
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!instance->efuse_tx_imp) {
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dev_warn(dev, "no u3 intr efuse, but dts enable it\n");
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instance->efuse_sw_en = 0;
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break;
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@ -36,7 +36,7 @@ int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
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cfg->clk_miss = 0;
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cfg->clk_post = 60000 + 52 * ui;
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cfg->clk_pre = 8000;
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cfg->clk_pre = 8;
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cfg->clk_prepare = 38000;
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cfg->clk_settle = 95000;
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cfg->clk_term_en = 0;
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@ -97,7 +97,7 @@ int phy_mipi_dphy_config_validate(struct phy_configure_opts_mipi_dphy *cfg)
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if (cfg->clk_post < (60000 + 52 * ui))
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return -EINVAL;
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if (cfg->clk_pre < 8000)
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if (cfg->clk_pre < 8)
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return -EINVAL;
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if (cfg->clk_prepare < 38000 || cfg->clk_prepare > 95000)
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|
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@ -5,6 +5,7 @@
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* Author: Wyon Bi <bivvy.bi@rock-chips.com>
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*/
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#include <linux/bits.h>
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#include <linux/kernel.h>
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#include <linux/clk.h>
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#include <linux/iopoll.h>
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|
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@ -364,7 +365,7 @@ static void inno_dsidphy_mipi_mode_enable(struct inno_dsidphy *inno)
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* The value of counter for HS Tclk-pre
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* Tclk-pre = Tpin_txbyteclkhs * value
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*/
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clk_pre = DIV_ROUND_UP(cfg->clk_pre, t_txbyteclkhs);
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clk_pre = DIV_ROUND_UP(cfg->clk_pre, BITS_PER_BYTE);
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|
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/*
|
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* The value of counter for HS Tlpx Time
|
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|
|
|
|||
|
|
@ -304,7 +304,7 @@ static int stm32_usbphyc_pll_enable(struct stm32_usbphyc *usbphyc)
|
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|
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ret = __stm32_usbphyc_pll_disable(usbphyc);
|
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if (ret)
|
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return ret;
|
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goto dec_n_pll_cons;
|
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}
|
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|
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ret = stm32_usbphyc_regulators_enable(usbphyc);
|
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|
|
|
|||
|
|
@ -233,6 +233,7 @@ static const struct clk_div_table clk_div_table[] = {
|
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{ .val = 1, .div = 2, },
|
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{ .val = 2, .div = 4, },
|
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{ .val = 3, .div = 8, },
|
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{ /* sentinel */ },
|
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};
|
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|
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static const struct wiz_clk_div_sel clk_div_sel[] = {
|
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|
|
|
|||
|
|
@ -134,7 +134,8 @@
|
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#define PROT_BUS_WIDTH_10 0x0
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#define PROT_BUS_WIDTH_20 0x1
|
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#define PROT_BUS_WIDTH_40 0x2
|
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#define PROT_BUS_WIDTH_SHIFT 2
|
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#define PROT_BUS_WIDTH_SHIFT(n) ((n) * 2)
|
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#define PROT_BUS_WIDTH_MASK(n) GENMASK((n) * 2 + 1, (n) * 2)
|
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|
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/* Number of GT lanes */
|
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#define NUM_LANES 4
|
||||
|
|
@ -445,12 +446,12 @@ static void xpsgtr_phy_init_sata(struct xpsgtr_phy *gtr_phy)
|
|||
static void xpsgtr_phy_init_sgmii(struct xpsgtr_phy *gtr_phy)
|
||||
{
|
||||
struct xpsgtr_dev *gtr_dev = gtr_phy->dev;
|
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u32 mask = PROT_BUS_WIDTH_MASK(gtr_phy->lane);
|
||||
u32 val = PROT_BUS_WIDTH_10 << PROT_BUS_WIDTH_SHIFT(gtr_phy->lane);
|
||||
|
||||
/* Set SGMII protocol TX and RX bus width to 10 bits. */
|
||||
xpsgtr_write(gtr_dev, TX_PROT_BUS_WIDTH,
|
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PROT_BUS_WIDTH_10 << (gtr_phy->lane * PROT_BUS_WIDTH_SHIFT));
|
||||
xpsgtr_write(gtr_dev, RX_PROT_BUS_WIDTH,
|
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PROT_BUS_WIDTH_10 << (gtr_phy->lane * PROT_BUS_WIDTH_SHIFT));
|
||||
xpsgtr_clr_set(gtr_dev, TX_PROT_BUS_WIDTH, mask, val);
|
||||
xpsgtr_clr_set(gtr_dev, RX_PROT_BUS_WIDTH, mask, val);
|
||||
|
||||
xpsgtr_bypass_scrambler_8b10b(gtr_phy);
|
||||
}
|
||||
|
|
|
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