iommu/omap: Add support to program multiple iommus
A client user instantiates and attaches to an iommu_domain to program the OMAP IOMMU associated with the domain. The iommus programmed by a client user are bound with the iommu_domain through the user's device archdata. The OMAP IOMMU driver currently supports only one IOMMU per IOMMU domain per user. The OMAP IOMMU driver has been enhanced to support allowing multiple IOMMUs to be programmed by a single client user. This support is being added mainly to handle the DSP subsystems on the DRA7xx SoCs, which have two MMUs within the same subsystem. These MMUs provide translations for a processor core port and an internal EDMA port. This support allows both the MMUs to be programmed together, but with each one retaining it's own internal state objects. The internal EDMA block is managed by the software running on the DSPs, and this design provides on-par functionality with previous generation OMAP DSPs where the EDMA and the DSP core shared the same MMU. The multiple iommus are expected to be provided through a sentinel terminated array of omap_iommu_arch_data objects through the client user's device archdata. The OMAP driver core is enhanced to loop through the array of attached iommus and program them for all common operations. The sentinel-terminated logic is used so as to not change the omap_iommu_arch_data structure. NOTE: 1. The IOMMU group and IOMMU core registration is done only for the DSP processor core MMU even though both MMUs are represented by their own platform device and are probed individually. The IOMMU device linking uses this registered MMU device. The struct iommu_device for the second MMU is not used even though memory for it is allocated. 2. The OMAP IOMMU debugfs code still continues to operate on individual IOMMU objects. Signed-off-by: Suman Anna <s-anna@ti.com> [t-kristo@ti.com: ported support to 4.13 based kernel] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
This commit is contained in:
Suman Anna
Joerg Roedel
Родитель
0d3642883b
Коммит
9d5018deec
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@ -2,6 +2,7 @@
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* omap iommu: tlb and pagetable primitives
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*
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* Copyright (C) 2008-2010 Nokia Corporation
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* Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>,
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* Paul Mundt and Toshihiro Kobayashi
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@ -71,13 +72,23 @@ static struct omap_iommu_domain *to_omap_domain(struct iommu_domain *dom)
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**/
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void omap_iommu_save_ctx(struct device *dev)
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{
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struct omap_iommu *obj = dev_to_omap_iommu(dev);
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u32 *p = obj->ctx;
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struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
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struct omap_iommu *obj;
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u32 *p;
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int i;
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for (i = 0; i < (MMU_REG_SIZE / sizeof(u32)); i++) {
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p[i] = iommu_read_reg(obj, i * sizeof(u32));
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dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i, p[i]);
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if (!arch_data)
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return;
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while (arch_data->iommu_dev) {
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obj = arch_data->iommu_dev;
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p = obj->ctx;
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for (i = 0; i < (MMU_REG_SIZE / sizeof(u32)); i++) {
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p[i] = iommu_read_reg(obj, i * sizeof(u32));
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dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i,
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p[i]);
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}
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arch_data++;
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}
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}
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EXPORT_SYMBOL_GPL(omap_iommu_save_ctx);
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@ -88,13 +99,23 @@ EXPORT_SYMBOL_GPL(omap_iommu_save_ctx);
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**/
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void omap_iommu_restore_ctx(struct device *dev)
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{
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struct omap_iommu *obj = dev_to_omap_iommu(dev);
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u32 *p = obj->ctx;
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struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
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struct omap_iommu *obj;
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u32 *p;
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int i;
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for (i = 0; i < (MMU_REG_SIZE / sizeof(u32)); i++) {
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iommu_write_reg(obj, p[i], i * sizeof(u32));
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dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i, p[i]);
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if (!arch_data)
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return;
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while (arch_data->iommu_dev) {
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obj = arch_data->iommu_dev;
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p = obj->ctx;
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for (i = 0; i < (MMU_REG_SIZE / sizeof(u32)); i++) {
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iommu_write_reg(obj, p[i], i * sizeof(u32));
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dev_dbg(obj->dev, "%s\t[%02d] %08x\n", __func__, i,
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p[i]);
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}
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arch_data++;
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}
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}
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EXPORT_SYMBOL_GPL(omap_iommu_restore_ctx);
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@ -893,6 +914,24 @@ static void omap_iommu_detach(struct omap_iommu *obj)
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dev_dbg(obj->dev, "%s: %s\n", __func__, obj->name);
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}
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static bool omap_iommu_can_register(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu"))
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return true;
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/*
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* restrict IOMMU core registration only for processor-port MDMA MMUs
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* on DRA7 DSPs
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*/
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if ((!strcmp(dev_name(&pdev->dev), "40d01000.mmu")) ||
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(!strcmp(dev_name(&pdev->dev), "41501000.mmu")))
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return true;
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return false;
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}
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static int omap_iommu_dra7_get_dsp_system_cfg(struct platform_device *pdev,
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struct omap_iommu *obj)
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{
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@ -984,19 +1023,22 @@ static int omap_iommu_probe(struct platform_device *pdev)
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return err;
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platform_set_drvdata(pdev, obj);
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obj->group = iommu_group_alloc();
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if (IS_ERR(obj->group))
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return PTR_ERR(obj->group);
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if (omap_iommu_can_register(pdev)) {
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obj->group = iommu_group_alloc();
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if (IS_ERR(obj->group))
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return PTR_ERR(obj->group);
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err = iommu_device_sysfs_add(&obj->iommu, obj->dev, NULL, obj->name);
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if (err)
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goto out_group;
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err = iommu_device_sysfs_add(&obj->iommu, obj->dev, NULL,
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obj->name);
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if (err)
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goto out_group;
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iommu_device_set_ops(&obj->iommu, &omap_iommu_ops);
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iommu_device_set_ops(&obj->iommu, &omap_iommu_ops);
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err = iommu_device_register(&obj->iommu);
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if (err)
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goto out_sysfs;
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err = iommu_device_register(&obj->iommu);
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if (err)
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goto out_sysfs;
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}
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pm_runtime_irq_safe(obj->dev);
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pm_runtime_enable(obj->dev);
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@ -1018,11 +1060,13 @@ static int omap_iommu_remove(struct platform_device *pdev)
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{
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struct omap_iommu *obj = platform_get_drvdata(pdev);
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iommu_group_put(obj->group);
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obj->group = NULL;
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if (obj->group) {
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iommu_group_put(obj->group);
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obj->group = NULL;
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iommu_device_sysfs_remove(&obj->iommu);
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iommu_device_unregister(&obj->iommu);
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iommu_device_sysfs_remove(&obj->iommu);
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iommu_device_unregister(&obj->iommu);
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}
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omap_iommu_debugfs_remove(obj);
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@ -1068,11 +1112,13 @@ static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
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phys_addr_t pa, size_t bytes, int prot)
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{
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struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
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struct omap_iommu *oiommu = omap_domain->iommu_dev;
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struct device *dev = oiommu->dev;
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struct device *dev = omap_domain->dev;
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struct omap_iommu_device *iommu;
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struct omap_iommu *oiommu;
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struct iotlb_entry e;
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int omap_pgsz;
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u32 ret;
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u32 ret = -EINVAL;
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int i;
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omap_pgsz = bytes_to_iopgsz(bytes);
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if (omap_pgsz < 0) {
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@ -1084,9 +1130,24 @@ static int omap_iommu_map(struct iommu_domain *domain, unsigned long da,
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iotlb_init_entry(&e, da, pa, omap_pgsz);
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ret = omap_iopgtable_store_entry(oiommu, &e);
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if (ret)
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dev_err(dev, "omap_iopgtable_store_entry failed: %d\n", ret);
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iommu = omap_domain->iommus;
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for (i = 0; i < omap_domain->num_iommus; i++, iommu++) {
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oiommu = iommu->iommu_dev;
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ret = omap_iopgtable_store_entry(oiommu, &e);
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if (ret) {
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dev_err(dev, "omap_iopgtable_store_entry failed: %d\n",
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ret);
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break;
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}
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}
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if (ret) {
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while (i--) {
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iommu--;
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oiommu = iommu->iommu_dev;
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iopgtable_clear_entry(oiommu, da);
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}
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}
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return ret;
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}
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@ -1095,12 +1156,90 @@ static size_t omap_iommu_unmap(struct iommu_domain *domain, unsigned long da,
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size_t size)
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{
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struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
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struct omap_iommu *oiommu = omap_domain->iommu_dev;
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struct device *dev = oiommu->dev;
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struct device *dev = omap_domain->dev;
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struct omap_iommu_device *iommu;
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struct omap_iommu *oiommu;
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bool error = false;
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size_t bytes = 0;
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int i;
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dev_dbg(dev, "unmapping da 0x%lx size %u\n", da, size);
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return iopgtable_clear_entry(oiommu, da);
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iommu = omap_domain->iommus;
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for (i = 0; i < omap_domain->num_iommus; i++, iommu++) {
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oiommu = iommu->iommu_dev;
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bytes = iopgtable_clear_entry(oiommu, da);
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if (!bytes)
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error = true;
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}
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/*
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* simplify return - we are only checking if any of the iommus
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* reported an error, but not if all of them are unmapping the
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* same number of entries. This should not occur due to the
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* mirror programming.
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*/
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return error ? 0 : bytes;
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}
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static int omap_iommu_count(struct device *dev)
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{
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struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
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int count = 0;
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while (arch_data->iommu_dev) {
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count++;
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arch_data++;
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}
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return count;
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}
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/* caller should call cleanup if this function fails */
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static int omap_iommu_attach_init(struct device *dev,
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struct omap_iommu_domain *odomain)
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{
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struct omap_iommu_device *iommu;
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int i;
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odomain->num_iommus = omap_iommu_count(dev);
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if (!odomain->num_iommus)
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return -EINVAL;
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odomain->iommus = kcalloc(odomain->num_iommus, sizeof(*iommu),
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GFP_ATOMIC);
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if (!odomain->iommus)
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return -ENOMEM;
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iommu = odomain->iommus;
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for (i = 0; i < odomain->num_iommus; i++, iommu++) {
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iommu->pgtable = kzalloc(IOPGD_TABLE_SIZE, GFP_ATOMIC);
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if (!iommu->pgtable)
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return -ENOMEM;
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/*
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* should never fail, but please keep this around to ensure
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* we keep the hardware happy
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*/
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if (WARN_ON(!IS_ALIGNED((long)iommu->pgtable,
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IOPGD_TABLE_SIZE)))
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return -EINVAL;
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}
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return 0;
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}
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static void omap_iommu_detach_fini(struct omap_iommu_domain *odomain)
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{
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int i;
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struct omap_iommu_device *iommu = odomain->iommus;
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for (i = 0; iommu && i < odomain->num_iommus; i++, iommu++)
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kfree(iommu->pgtable);
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kfree(odomain->iommus);
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odomain->num_iommus = 0;
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odomain->iommus = NULL;
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}
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static int
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@ -1108,8 +1247,10 @@ omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
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{
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struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
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struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
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struct omap_iommu_device *iommu;
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struct omap_iommu *oiommu;
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int ret = 0;
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int i;
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if (!arch_data || !arch_data->iommu_dev) {
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dev_err(dev, "device doesn't have an associated iommu\n");
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@ -1125,19 +1266,42 @@ omap_iommu_attach_dev(struct iommu_domain *domain, struct device *dev)
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goto out;
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}
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oiommu = arch_data->iommu_dev;
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/* get a handle to and enable the omap iommu */
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ret = omap_iommu_attach(oiommu, omap_domain->pgtable);
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ret = omap_iommu_attach_init(dev, omap_domain);
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if (ret) {
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dev_err(dev, "can't get omap iommu: %d\n", ret);
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goto out;
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dev_err(dev, "failed to allocate required iommu data %d\n",
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ret);
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goto init_fail;
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}
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omap_domain->iommu_dev = oiommu;
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omap_domain->dev = dev;
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oiommu->domain = domain;
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iommu = omap_domain->iommus;
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for (i = 0; i < omap_domain->num_iommus; i++, iommu++, arch_data++) {
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/* configure and enable the omap iommu */
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oiommu = arch_data->iommu_dev;
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ret = omap_iommu_attach(oiommu, iommu->pgtable);
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if (ret) {
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dev_err(dev, "can't get omap iommu: %d\n", ret);
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goto attach_fail;
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}
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oiommu->domain = domain;
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iommu->iommu_dev = oiommu;
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}
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omap_domain->dev = dev;
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goto out;
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attach_fail:
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while (i--) {
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iommu--;
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arch_data--;
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oiommu = iommu->iommu_dev;
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omap_iommu_detach(oiommu);
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iommu->iommu_dev = NULL;
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oiommu->domain = NULL;
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}
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init_fail:
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omap_iommu_detach_fini(omap_domain);
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out:
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spin_unlock(&omap_domain->lock);
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return ret;
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@ -1146,7 +1310,10 @@ out:
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static void _omap_iommu_detach_dev(struct omap_iommu_domain *omap_domain,
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struct device *dev)
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{
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struct omap_iommu *oiommu = dev_to_omap_iommu(dev);
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struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
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struct omap_iommu_device *iommu = omap_domain->iommus;
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struct omap_iommu *oiommu;
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int i;
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if (!omap_domain->dev) {
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dev_err(dev, "domain has no attached device\n");
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@ -1159,13 +1326,24 @@ static void _omap_iommu_detach_dev(struct omap_iommu_domain *omap_domain,
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return;
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}
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iopgtable_clear_entry_all(oiommu);
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/*
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* cleanup in the reverse order of attachment - this addresses
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* any h/w dependencies between multiple instances, if any
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*/
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iommu += (omap_domain->num_iommus - 1);
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arch_data += (omap_domain->num_iommus - 1);
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for (i = 0; i < omap_domain->num_iommus; i++, iommu--, arch_data--) {
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oiommu = iommu->iommu_dev;
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iopgtable_clear_entry_all(oiommu);
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omap_iommu_detach(oiommu);
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omap_iommu_detach(oiommu);
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iommu->iommu_dev = NULL;
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oiommu->domain = NULL;
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}
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omap_iommu_detach_fini(omap_domain);
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omap_domain->iommu_dev = NULL;
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omap_domain->dev = NULL;
|
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oiommu->domain = NULL;
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}
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static void omap_iommu_detach_dev(struct iommu_domain *domain,
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@ -1187,18 +1365,7 @@ static struct iommu_domain *omap_iommu_domain_alloc(unsigned type)
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|
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omap_domain = kzalloc(sizeof(*omap_domain), GFP_KERNEL);
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if (!omap_domain)
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goto out;
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|
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omap_domain->pgtable = kzalloc(IOPGD_TABLE_SIZE, GFP_KERNEL);
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if (!omap_domain->pgtable)
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goto fail_nomem;
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/*
|
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* should never fail, but please keep this around to ensure
|
||||
* we keep the hardware happy
|
||||
*/
|
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if (WARN_ON(!IS_ALIGNED((long)omap_domain->pgtable, IOPGD_TABLE_SIZE)))
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goto fail_align;
|
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return NULL;
|
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|
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spin_lock_init(&omap_domain->lock);
|
||||
|
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|
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@ -1207,13 +1374,6 @@ static struct iommu_domain *omap_iommu_domain_alloc(unsigned type)
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omap_domain->domain.geometry.force_aperture = true;
|
||||
|
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return &omap_domain->domain;
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|
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fail_align:
|
||||
kfree(omap_domain->pgtable);
|
||||
fail_nomem:
|
||||
kfree(omap_domain);
|
||||
out:
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void omap_iommu_domain_free(struct iommu_domain *domain)
|
||||
|
|
@ -1227,7 +1387,6 @@ static void omap_iommu_domain_free(struct iommu_domain *domain)
|
|||
if (omap_domain->dev)
|
||||
_omap_iommu_detach_dev(omap_domain, omap_domain->dev);
|
||||
|
||||
kfree(omap_domain->pgtable);
|
||||
kfree(omap_domain);
|
||||
}
|
||||
|
||||
|
|
@ -1235,11 +1394,16 @@ static phys_addr_t omap_iommu_iova_to_phys(struct iommu_domain *domain,
|
|||
dma_addr_t da)
|
||||
{
|
||||
struct omap_iommu_domain *omap_domain = to_omap_domain(domain);
|
||||
struct omap_iommu *oiommu = omap_domain->iommu_dev;
|
||||
struct omap_iommu_device *iommu = omap_domain->iommus;
|
||||
struct omap_iommu *oiommu = iommu->iommu_dev;
|
||||
struct device *dev = oiommu->dev;
|
||||
u32 *pgd, *pte;
|
||||
phys_addr_t ret = 0;
|
||||
|
||||
/*
|
||||
* all the iommus within the domain will have identical programming,
|
||||
* so perform the lookup using just the first iommu
|
||||
*/
|
||||
iopgtable_lookup_entry(oiommu, da, &pgd, &pte);
|
||||
|
||||
if (pte) {
|
||||
|
|
@ -1265,11 +1429,12 @@ static phys_addr_t omap_iommu_iova_to_phys(struct iommu_domain *domain,
|
|||
|
||||
static int omap_iommu_add_device(struct device *dev)
|
||||
{
|
||||
struct omap_iommu_arch_data *arch_data;
|
||||
struct omap_iommu_arch_data *arch_data, *tmp;
|
||||
struct omap_iommu *oiommu;
|
||||
struct iommu_group *group;
|
||||
struct device_node *np;
|
||||
struct platform_device *pdev;
|
||||
int num_iommus, i;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
|
|
@ -1281,36 +1446,57 @@ static int omap_iommu_add_device(struct device *dev)
|
|||
if (!dev->of_node)
|
||||
return 0;
|
||||
|
||||
np = of_parse_phandle(dev->of_node, "iommus", 0);
|
||||
if (!np)
|
||||
/*
|
||||
* retrieve the count of IOMMU nodes using phandle size as element size
|
||||
* since #iommu-cells = 0 for OMAP
|
||||
*/
|
||||
num_iommus = of_property_count_elems_of_size(dev->of_node, "iommus",
|
||||
sizeof(phandle));
|
||||
if (num_iommus < 0)
|
||||
return 0;
|
||||
|
||||
pdev = of_find_device_by_node(np);
|
||||
if (WARN_ON(!pdev)) {
|
||||
of_node_put(np);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
oiommu = platform_get_drvdata(pdev);
|
||||
if (!oiommu) {
|
||||
of_node_put(np);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
arch_data = kzalloc(sizeof(*arch_data), GFP_KERNEL);
|
||||
if (!arch_data) {
|
||||
of_node_put(np);
|
||||
arch_data = kzalloc((num_iommus + 1) * sizeof(*arch_data), GFP_KERNEL);
|
||||
if (!arch_data)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0, tmp = arch_data; i < num_iommus; i++, tmp++) {
|
||||
np = of_parse_phandle(dev->of_node, "iommus", i);
|
||||
if (!np) {
|
||||
kfree(arch_data);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pdev = of_find_device_by_node(np);
|
||||
if (WARN_ON(!pdev)) {
|
||||
of_node_put(np);
|
||||
kfree(arch_data);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
oiommu = platform_get_drvdata(pdev);
|
||||
if (!oiommu) {
|
||||
of_node_put(np);
|
||||
kfree(arch_data);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
tmp->iommu_dev = oiommu;
|
||||
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
/*
|
||||
* use the first IOMMU alone for the sysfs device linking.
|
||||
* TODO: Evaluate if a single iommu_group needs to be
|
||||
* maintained for both IOMMUs
|
||||
*/
|
||||
oiommu = arch_data->iommu_dev;
|
||||
ret = iommu_device_link(&oiommu->iommu, dev);
|
||||
if (ret) {
|
||||
kfree(arch_data);
|
||||
of_node_put(np);
|
||||
return ret;
|
||||
}
|
||||
|
||||
arch_data->iommu_dev = oiommu;
|
||||
dev->archdata.iommu = arch_data;
|
||||
|
||||
/*
|
||||
|
|
@ -1326,8 +1512,6 @@ static int omap_iommu_add_device(struct device *dev)
|
|||
}
|
||||
iommu_group_put(group);
|
||||
|
||||
of_node_put(np);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -28,18 +28,27 @@ struct iotlb_entry {
|
|||
u32 endian, elsz, mixed;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct omap_iommu_device - omap iommu device data
|
||||
* @pgtable: page table used by an omap iommu attached to a domain
|
||||
* @iommu_dev: pointer to store an omap iommu instance attached to a domain
|
||||
*/
|
||||
struct omap_iommu_device {
|
||||
u32 *pgtable;
|
||||
struct omap_iommu *iommu_dev;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct omap_iommu_domain - omap iommu domain
|
||||
* @pgtable: the page table
|
||||
* @iommu_dev: an omap iommu device attached to this domain. only a single
|
||||
* iommu device can be attached for now.
|
||||
* @num_iommus: number of iommus in this domain
|
||||
* @iommus: omap iommu device data for all iommus in this domain
|
||||
* @dev: Device using this domain.
|
||||
* @lock: domain lock, should be taken when attaching/detaching
|
||||
* @domain: generic domain handle used by iommu core code
|
||||
*/
|
||||
struct omap_iommu_domain {
|
||||
u32 *pgtable;
|
||||
struct omap_iommu *iommu_dev;
|
||||
u32 num_iommus;
|
||||
struct omap_iommu_device *iommus;
|
||||
struct device *dev;
|
||||
spinlock_t lock;
|
||||
struct iommu_domain domain;
|
||||
|
|
@ -97,17 +106,6 @@ struct iotlb_lock {
|
|||
short vict;
|
||||
};
|
||||
|
||||
/**
|
||||
* dev_to_omap_iommu() - retrieves an omap iommu object from a user device
|
||||
* @dev: iommu client device
|
||||
*/
|
||||
static inline struct omap_iommu *dev_to_omap_iommu(struct device *dev)
|
||||
{
|
||||
struct omap_iommu_arch_data *arch_data = dev->archdata.iommu;
|
||||
|
||||
return arch_data->iommu_dev;
|
||||
}
|
||||
|
||||
/*
|
||||
* MMU Register offsets
|
||||
*/
|
||||
|
|
|
|||
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