x86/apic: Factor out default vector_allocation_domain() operation
Signed-off-by: Alexander Gordeev <agordeev@redhat.com> Acked-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Yinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/20120607131449.GC4759@dhcp-26-207.brq.redhat.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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9d8e106676
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@ -615,6 +615,27 @@ extern unsigned int
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default_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
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const struct cpumask *andmask);
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static inline void
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flat_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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cpumask_clear(retmask);
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cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
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}
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static inline void
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default_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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cpumask_copy(retmask, cpumask_of(cpu));
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}
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static inline unsigned long default_check_apicid_used(physid_mask_t *map, int apicid)
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{
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return physid_isset(apicid, *map);
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@ -36,20 +36,6 @@ static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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return 1;
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}
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static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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cpumask_clear(retmask);
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cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
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}
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/*
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* Set up the logical destination ID.
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*
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@ -257,12 +243,6 @@ static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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return 0;
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}
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static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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cpumask_clear(retmask);
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cpumask_set_cpu(cpu, retmask);
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}
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static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
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{
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default_send_IPI_mask_sequence_phys(cpumask, vector);
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@ -309,7 +289,7 @@ static struct apic apic_physflat = {
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.check_apicid_used = NULL,
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.check_apicid_present = NULL,
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.vector_allocation_domain = physflat_vector_allocation_domain,
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.vector_allocation_domain = default_vector_allocation_domain,
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/* not needed, but shouldn't hurt: */
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.init_apic_ldr = flat_init_apic_ldr,
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@ -104,8 +104,7 @@ static void noop_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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if (cpu != 0)
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pr_warning("APIC: Vector allocated for non-BSP cpu\n");
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cpumask_clear(retmask);
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cpumask_set_cpu(cpu, retmask);
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cpumask_copy(retmask, cpumask_of(cpu));
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}
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static u32 noop_apic_read(u32 reg)
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@ -72,12 +72,6 @@ static int numachip_phys_pkg_id(int initial_apic_id, int index_msb)
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return initial_apic_id >> index_msb;
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}
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static void numachip_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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cpumask_clear(retmask);
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cpumask_set_cpu(cpu, retmask);
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}
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static int __cpuinit numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip)
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{
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union numachip_csr_g3_ext_irq_gen int_gen;
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@ -222,7 +216,7 @@ static struct apic apic_numachip __refconst = {
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.check_apicid_used = NULL,
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.check_apicid_present = NULL,
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.vector_allocation_domain = numachip_vector_allocation_domain,
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.vector_allocation_domain = default_vector_allocation_domain,
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.init_apic_ldr = flat_init_apic_ldr,
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.ioapic_phys_id_map = NULL,
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@ -142,12 +142,6 @@ static const struct dmi_system_id bigsmp_dmi_table[] = {
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{ } /* NULL entry stops DMI scanning */
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};
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static void bigsmp_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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cpumask_clear(retmask);
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cpumask_set_cpu(cpu, retmask);
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}
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static int probe_bigsmp(void)
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{
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if (def_to_bigsmp)
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@ -176,7 +170,7 @@ static struct apic apic_bigsmp = {
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.check_apicid_used = bigsmp_check_apicid_used,
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.check_apicid_present = bigsmp_check_apicid_present,
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.vector_allocation_domain = bigsmp_vector_allocation_domain,
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.vector_allocation_domain = default_vector_allocation_domain,
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.init_apic_ldr = bigsmp_init_apic_ldr,
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.ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
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@ -394,21 +394,6 @@ static void es7000_enable_apic_mode(void)
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WARN(1, "Command failed, status = %x\n", mip_status);
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}
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static void es7000_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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cpumask_clear(retmask);
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cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
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}
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static void es7000_wait_for_init_deassert(atomic_t *deassert)
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{
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while (!atomic_read(deassert))
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@ -638,7 +623,7 @@ static struct apic __refdata apic_es7000_cluster = {
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.check_apicid_used = es7000_check_apicid_used,
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.check_apicid_present = es7000_check_apicid_present,
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.vector_allocation_domain = es7000_vector_allocation_domain,
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.vector_allocation_domain = flat_vector_allocation_domain,
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.init_apic_ldr = es7000_init_apic_ldr_cluster,
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.ioapic_phys_id_map = es7000_ioapic_phys_id_map,
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@ -705,7 +690,7 @@ static struct apic __refdata apic_es7000 = {
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.check_apicid_used = es7000_check_apicid_used,
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.check_apicid_present = es7000_check_apicid_present,
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.vector_allocation_domain = es7000_vector_allocation_domain,
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.vector_allocation_domain = flat_vector_allocation_domain,
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.init_apic_ldr = es7000_init_apic_ldr,
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.ioapic_phys_id_map = es7000_ioapic_phys_id_map,
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@ -441,20 +441,6 @@ static int probe_numaq(void)
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return found_numaq;
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}
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static void numaq_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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cpumask_clear(retmask);
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cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
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}
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static void numaq_setup_portio_remap(void)
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{
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int num_quads = num_online_nodes();
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@ -491,7 +477,7 @@ static struct apic __refdata apic_numaq = {
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.check_apicid_used = numaq_check_apicid_used,
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.check_apicid_present = numaq_check_apicid_present,
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.vector_allocation_domain = numaq_vector_allocation_domain,
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.vector_allocation_domain = flat_vector_allocation_domain,
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.init_apic_ldr = numaq_init_apic_ldr,
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.ioapic_phys_id_map = numaq_ioapic_phys_id_map,
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@ -66,21 +66,6 @@ static void setup_apic_flat_routing(void)
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#endif
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}
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static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/*
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* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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cpumask_clear(retmask);
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cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
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}
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/* should be called last. */
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static int probe_default(void)
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{
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@ -105,7 +90,7 @@ static struct apic apic_default = {
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.check_apicid_used = default_check_apicid_used,
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.check_apicid_present = default_check_apicid_present,
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.vector_allocation_domain = default_vector_allocation_domain,
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.vector_allocation_domain = flat_vector_allocation_domain,
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.init_apic_ldr = default_init_apic_ldr,
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.ioapic_phys_id_map = default_ioapic_phys_id_map,
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@ -320,20 +320,6 @@ static int probe_summit(void)
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return 0;
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}
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static void summit_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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/* Careful. Some cpus do not strictly honor the set of cpus
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* specified in the interrupt destination when using lowest
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* priority interrupt delivery mode.
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*
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* In particular there was a hyperthreading cpu observed to
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* deliver interrupts to the wrong hyperthread when only one
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* hyperthread was specified in the interrupt desitination.
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*/
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cpumask_clear(retmask);
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cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
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}
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#ifdef CONFIG_X86_SUMMIT_NUMA
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static struct rio_table_hdr *rio_table_hdr;
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static struct scal_detail *scal_devs[MAX_NUMNODES];
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@ -509,7 +495,7 @@ static struct apic apic_summit = {
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.check_apicid_used = summit_check_apicid_used,
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.check_apicid_present = summit_check_apicid_present,
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.vector_allocation_domain = summit_vector_allocation_domain,
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.vector_allocation_domain = flat_vector_allocation_domain,
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.init_apic_ldr = summit_init_apic_ldr,
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.ioapic_phys_id_map = summit_ioapic_phys_id_map,
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@ -88,15 +88,6 @@ static int x2apic_phys_probe(void)
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return apic == &apic_x2apic_phys;
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}
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/*
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* Each logical cpu is in its own vector allocation domain.
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*/
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static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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cpumask_clear(retmask);
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cpumask_set_cpu(cpu, retmask);
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}
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static struct apic apic_x2apic_phys = {
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.name = "physical x2apic",
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@ -114,7 +105,7 @@ static struct apic apic_x2apic_phys = {
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.check_apicid_used = NULL,
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.check_apicid_present = NULL,
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.vector_allocation_domain = x2apic_vector_allocation_domain,
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.vector_allocation_domain = default_vector_allocation_domain,
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.init_apic_ldr = init_x2apic_ldr,
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.ioapic_phys_id_map = NULL,
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@ -185,12 +185,6 @@ EXPORT_SYMBOL_GPL(uv_possible_blades);
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unsigned long sn_rtc_cycles_per_second;
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EXPORT_SYMBOL(sn_rtc_cycles_per_second);
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static void uv_vector_allocation_domain(int cpu, struct cpumask *retmask)
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{
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cpumask_clear(retmask);
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cpumask_set_cpu(cpu, retmask);
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}
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static int __cpuinit uv_wakeup_secondary(int phys_apicid, unsigned long start_rip)
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{
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#ifdef CONFIG_SMP
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@ -363,7 +357,7 @@ static struct apic __refdata apic_x2apic_uv_x = {
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.check_apicid_used = NULL,
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.check_apicid_present = NULL,
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.vector_allocation_domain = uv_vector_allocation_domain,
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.vector_allocation_domain = default_vector_allocation_domain,
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.init_apic_ldr = uv_init_apic_ldr,
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.ioapic_phys_id_map = NULL,
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