ath9k: get EEPROM contents from platform data on AHB bus
On the AR913x SOCs we have to provide EEPROM contents via platform_data, because accessing the flash via MMIO is not safe. Additionally different boards may store the radio calibration data at different locations. Changes-licensed-under: ISC Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Tested-by: Pavel Roskin <proski@gnu.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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Родитель
09329d371e
Коммит
9dbeb91a8b
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@ -18,6 +18,7 @@
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#include <linux/nl80211.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include "core.h"
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#include "reg.h"
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#include "hw.h"
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@ -33,9 +34,29 @@ static void ath_ahb_cleanup(struct ath_softc *sc)
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iounmap(sc->mem);
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}
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static bool ath_ahb_eeprom_read(struct ath_hal *ah, u32 off, u16 *data)
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{
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struct ath_softc *sc = ah->ah_sc;
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struct platform_device *pdev = to_platform_device(sc->dev);
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struct ath9k_platform_data *pdata;
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pdata = (struct ath9k_platform_data *) pdev->dev.platform_data;
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if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
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DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
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"%s: flash read failed, offset %08x is out of range\n",
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__func__, off);
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return false;
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}
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*data = pdata->eeprom_data[off];
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return true;
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}
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static struct ath_bus_ops ath_ahb_bus_ops = {
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.read_cachesize = ath_ahb_read_cachesize,
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.cleanup = ath_ahb_cleanup,
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.eeprom_read = ath_ahb_eeprom_read,
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};
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static int ath_ahb_probe(struct platform_device *pdev)
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@ -48,6 +69,12 @@ static int ath_ahb_probe(struct platform_device *pdev)
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int ret = 0;
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struct ath_hal *ah;
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if (!pdev->dev.platform_data) {
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dev_err(&pdev->dev, "no platform data specified\n");
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ret = -EINVAL;
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goto err_out;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "no memory resource found\n");
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@ -696,6 +696,7 @@ enum PROT_MODE {
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struct ath_bus_ops {
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void (*read_cachesize)(struct ath_softc *sc, int *csz);
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void (*cleanup)(struct ath_softc *sc);
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bool (*eeprom_read)(struct ath_hal *ah, u32 off, u16 *data);
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};
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struct ath_softc {
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@ -91,53 +91,11 @@ static inline bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList,
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return false;
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}
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static bool ath9k_hw_eeprom_read(struct ath_hal *ah, u32 off, u16 *data)
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{
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(void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
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if (!ath9k_hw_wait(ah,
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AR_EEPROM_STATUS_DATA,
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AR_EEPROM_STATUS_DATA_BUSY |
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AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0)) {
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return false;
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}
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*data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
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AR_EEPROM_STATUS_DATA_VAL);
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return true;
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}
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static int ath9k_hw_flash_map(struct ath_hal *ah)
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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ahp->ah_cal_mem = ioremap(AR5416_EEPROM_START_ADDR, AR5416_EEPROM_MAX);
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if (!ahp->ah_cal_mem) {
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DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
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"cannot remap eeprom region \n");
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return -EIO;
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}
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return 0;
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}
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static bool ath9k_hw_flash_read(struct ath_hal *ah, u32 off, u16 *data)
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{
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struct ath_hal_5416 *ahp = AH5416(ah);
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*data = ioread16(ahp->ah_cal_mem + off);
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return true;
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}
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static inline bool ath9k_hw_nvram_read(struct ath_hal *ah, u32 off, u16 *data)
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{
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if (ath9k_hw_use_flash(ah))
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return ath9k_hw_flash_read(ah, off, data);
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else
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return ath9k_hw_eeprom_read(ah, off, data);
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struct ath_softc *sc = ah->ah_sc;
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return sc->bus_ops->eeprom_read(ah, off, data);
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}
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static bool ath9k_hw_fill_4k_eeprom(struct ath_hal *ah)
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@ -2825,9 +2783,6 @@ int ath9k_hw_eeprom_attach(struct ath_hal *ah)
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int status;
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struct ath_hal_5416 *ahp = AH5416(ah);
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if (ath9k_hw_use_flash(ah))
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ath9k_hw_flash_map(ah);
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if (AR_SREV_9285(ah))
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ahp->ah_eep_map = EEP_MAP_4KBITS;
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else
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@ -58,9 +58,27 @@ static void ath_pci_cleanup(struct ath_softc *sc)
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pci_disable_device(pdev);
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}
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static bool ath_pci_eeprom_read(struct ath_hal *ah, u32 off, u16 *data)
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{
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(void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
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if (!ath9k_hw_wait(ah,
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AR_EEPROM_STATUS_DATA,
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AR_EEPROM_STATUS_DATA_BUSY |
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AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0)) {
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return false;
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}
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*data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
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AR_EEPROM_STATUS_DATA_VAL);
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return true;
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}
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static struct ath_bus_ops ath_pci_bus_ops = {
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.read_cachesize = ath_pci_read_cachesize,
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.cleanup = ath_pci_cleanup,
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.eeprom_read = ath_pci_eeprom_read,
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};
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static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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@ -0,0 +1,28 @@
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/*
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* Copyright (c) 2008 Atheros Communications Inc.
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* Copyright (c) 2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (c) 2009 Imre Kaloz <kaloz@openwrt.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _LINUX_ATH9K_PLATFORM_H
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#define _LINUX_ATH9K_PLATFORM_H
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#define ATH9K_PLAT_EEP_MAX_WORDS 2048
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struct ath9k_platform_data {
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u16 eeprom_data[ATH9K_PLAT_EEP_MAX_WORDS];
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};
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#endif /* _LINUX_ATH9K_PLATFORM_H */
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