pinctrl: single: support generic pinconf
Support the operation of generic pinconf. The supported config arguments are INPUT_SCHMITT, INPUT_SCHMITT_ENABLE, DRIVE_STRENGHT, BIAS_DISABLE, BIAS_PULLUP, BIAS_PULLDOWN, SLEW_RATE. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Haojian Zhuang
Linus Walleij
Родитель
477ac771dd
Коммит
9dddb4df90
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@ -166,6 +166,7 @@ config PINCTRL_SINGLE
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depends on OF
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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help
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This selects the device tree based generic pinctrl driver.
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@ -22,8 +22,10 @@
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include "core.h"
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#include "pinconf.h"
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#define DRIVER_NAME "pinctrl-single"
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#define PCS_MUX_PINS_NAME "pinctrl-single,pins"
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@ -58,6 +60,33 @@ struct pcs_func_vals {
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unsigned mask;
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};
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/**
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* struct pcs_conf_vals - pinconf parameter, pinconf register offset
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* and value, enable, disable, mask
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* @param: config parameter
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* @val: user input bits in the pinconf register
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* @enable: enable bits in the pinconf register
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* @disable: disable bits in the pinconf register
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* @mask: mask bits in the register value
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*/
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struct pcs_conf_vals {
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enum pin_config_param param;
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unsigned val;
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unsigned enable;
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unsigned disable;
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unsigned mask;
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};
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/**
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* struct pcs_conf_type - pinconf property name, pinconf param pair
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* @name: property name in DTS file
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* @param: config parameter
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*/
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struct pcs_conf_type {
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const char *name;
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enum pin_config_param param;
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};
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/**
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* struct pcs_function - pinctrl function
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* @name: pinctrl function name
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@ -73,6 +102,8 @@ struct pcs_function {
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unsigned nvals;
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const char **pgnames;
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int npgnames;
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struct pcs_conf_vals *conf;
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int nconfs;
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struct list_head node;
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};
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@ -131,6 +162,7 @@ struct pcs_name {
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* @fshift: function register shift
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* @foff: value to turn mux off
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* @fmax: max number of functions in fmask
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* @is_pinconf: whether supports pinconf
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* @names: array of register names for pins
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* @pins: physical pins on the SoC
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* @pgtree: pingroup index radix tree
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@ -157,6 +189,7 @@ struct pcs_device {
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unsigned foff;
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unsigned fmax;
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bool bits_per_mux;
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bool is_pinconf;
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struct pcs_name *names;
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struct pcs_data pins;
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struct radix_tree_root pgtree;
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@ -171,6 +204,16 @@ struct pcs_device {
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void (*write)(unsigned val, void __iomem *reg);
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};
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static int pcs_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
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unsigned long *config);
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static int pcs_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
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unsigned long config);
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static enum pin_config_param pcs_bias[] = {
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PIN_CONFIG_BIAS_PULL_DOWN,
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PIN_CONFIG_BIAS_PULL_UP,
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};
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/*
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* REVISIT: Reads and writes could eventually use regmap or something
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* generic. But at least on omaps, some mux registers are performance
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@ -342,6 +385,28 @@ static int pcs_get_function_groups(struct pinctrl_dev *pctldev,
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return 0;
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}
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static int pcs_get_function(struct pinctrl_dev *pctldev, unsigned pin,
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struct pcs_function **func)
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{
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struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
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struct pin_desc *pdesc = pin_desc_get(pctldev, pin);
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const struct pinctrl_setting_mux *setting;
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unsigned fselector;
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/* If pin is not described in DTS & enabled, mux_setting is NULL. */
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setting = pdesc->mux_setting;
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if (!setting)
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return -ENOTSUPP;
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fselector = setting->func;
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*func = radix_tree_lookup(&pcs->ftree, fselector);
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if (!(*func)) {
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dev_err(pcs->dev, "%s could not find function%i\n",
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__func__, fselector);
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return -ENOTSUPP;
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}
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return 0;
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}
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static int pcs_enable(struct pinctrl_dev *pctldev, unsigned fselector,
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unsigned group)
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{
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@ -461,32 +526,191 @@ static const struct pinmux_ops pcs_pinmux_ops = {
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.gpio_request_enable = pcs_request_gpio,
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};
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/* Clear BIAS value */
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static void pcs_pinconf_clear_bias(struct pinctrl_dev *pctldev, unsigned pin)
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{
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unsigned long config;
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int i;
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for (i = 0; i < ARRAY_SIZE(pcs_bias); i++) {
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config = pinconf_to_config_packed(pcs_bias[i], 0);
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pcs_pinconf_set(pctldev, pin, config);
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}
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}
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/*
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* Check whether PIN_CONFIG_BIAS_DISABLE is valid.
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* It's depend on that PULL_DOWN & PULL_UP configs are all invalid.
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*/
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static bool pcs_pinconf_bias_disable(struct pinctrl_dev *pctldev, unsigned pin)
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{
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unsigned long config;
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int i;
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for (i = 0; i < ARRAY_SIZE(pcs_bias); i++) {
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config = pinconf_to_config_packed(pcs_bias[i], 0);
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if (!pcs_pinconf_get(pctldev, pin, &config))
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goto out;
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}
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return true;
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out:
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return false;
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}
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static int pcs_pinconf_get(struct pinctrl_dev *pctldev,
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unsigned pin, unsigned long *config)
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{
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struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
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struct pcs_function *func;
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enum pin_config_param param;
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unsigned offset = 0, data = 0, i, j, ret;
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ret = pcs_get_function(pctldev, pin, &func);
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if (ret)
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return ret;
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for (i = 0; i < func->nconfs; i++) {
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param = pinconf_to_config_param(*config);
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if (param == PIN_CONFIG_BIAS_DISABLE) {
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if (pcs_pinconf_bias_disable(pctldev, pin)) {
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*config = 0;
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return 0;
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} else {
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return -ENOTSUPP;
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}
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} else if (param != func->conf[i].param) {
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continue;
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}
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offset = pin * (pcs->width / BITS_PER_BYTE);
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data = pcs->read(pcs->base + offset) & func->conf[i].mask;
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switch (func->conf[i].param) {
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/* 4 parameters */
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case PIN_CONFIG_BIAS_PULL_DOWN:
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case PIN_CONFIG_BIAS_PULL_UP:
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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if ((data != func->conf[i].enable) ||
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(data == func->conf[i].disable))
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return -ENOTSUPP;
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*config = 0;
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break;
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/* 2 parameters */
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case PIN_CONFIG_INPUT_SCHMITT:
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for (j = 0; j < func->nconfs; j++) {
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switch (func->conf[j].param) {
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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if (data != func->conf[j].enable)
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return -ENOTSUPP;
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break;
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default:
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break;
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}
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}
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*config = data;
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break;
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case PIN_CONFIG_DRIVE_STRENGTH:
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case PIN_CONFIG_SLEW_RATE:
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default:
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*config = data;
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break;
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}
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return 0;
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}
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return -ENOTSUPP;
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}
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static int pcs_pinconf_set(struct pinctrl_dev *pctldev,
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unsigned pin, unsigned long config)
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{
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struct pcs_device *pcs = pinctrl_dev_get_drvdata(pctldev);
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struct pcs_function *func;
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unsigned offset = 0, shift = 0, arg = 0, i, data, ret;
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u16 argument;
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ret = pcs_get_function(pctldev, pin, &func);
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if (ret)
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return ret;
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for (i = 0; i < func->nconfs; i++) {
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if (pinconf_to_config_param(config) == func->conf[i].param) {
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offset = pin * (pcs->width / BITS_PER_BYTE);
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data = pcs->read(pcs->base + offset);
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argument = pinconf_to_config_argument(config);
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switch (func->conf[i].param) {
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/* 2 parameters */
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case PIN_CONFIG_INPUT_SCHMITT:
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case PIN_CONFIG_DRIVE_STRENGTH:
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case PIN_CONFIG_SLEW_RATE:
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shift = ffs(func->conf[i].mask) - 1;
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arg = pinconf_to_config_argument(config);
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data &= ~func->conf[i].mask;
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data |= (arg << shift) & func->conf[i].mask;
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break;
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/* 4 parameters */
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case PIN_CONFIG_BIAS_DISABLE:
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pcs_pinconf_clear_bias(pctldev, pin);
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break;
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case PIN_CONFIG_BIAS_PULL_DOWN:
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case PIN_CONFIG_BIAS_PULL_UP:
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if (argument)
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pcs_pinconf_clear_bias(pctldev, pin);
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/* fall through */
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
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data &= ~func->conf[i].mask;
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if (argument)
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data |= func->conf[i].enable;
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else
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data |= func->conf[i].disable;
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break;
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default:
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return -ENOTSUPP;
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}
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pcs->write(data, pcs->base + offset);
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return 0;
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}
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}
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return -ENOTSUPP;
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}
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static int pcs_pinconf_group_get(struct pinctrl_dev *pctldev,
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unsigned group, unsigned long *config)
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{
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return -ENOTSUPP;
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const unsigned *pins;
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unsigned npins, old = 0;
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int i, ret;
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ret = pcs_get_group_pins(pctldev, group, &pins, &npins);
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if (ret)
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return ret;
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for (i = 0; i < npins; i++) {
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if (pcs_pinconf_get(pctldev, pins[i], config))
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return -ENOTSUPP;
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/* configs do not match between two pins */
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if (i && (old != *config))
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return -ENOTSUPP;
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old = *config;
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}
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return 0;
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}
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static int pcs_pinconf_group_set(struct pinctrl_dev *pctldev,
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unsigned group, unsigned long config)
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{
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return -ENOTSUPP;
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const unsigned *pins;
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unsigned npins;
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int i, ret;
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ret = pcs_get_group_pins(pctldev, group, &pins, &npins);
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if (ret)
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return ret;
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for (i = 0; i < npins; i++) {
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if (pcs_pinconf_set(pctldev, pins[i], config))
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return -ENOTSUPP;
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}
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return 0;
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}
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static void pcs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned offset)
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struct seq_file *s, unsigned pin)
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{
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}
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@ -495,6 +719,13 @@ static void pcs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
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{
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}
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static void pcs_pinconf_config_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s,
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unsigned long config)
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{
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pinconf_generic_dump_config(pctldev, s, config);
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}
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static const struct pinconf_ops pcs_pinconf_ops = {
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.pin_config_get = pcs_pinconf_get,
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.pin_config_set = pcs_pinconf_set,
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@ -502,6 +733,7 @@ static const struct pinconf_ops pcs_pinconf_ops = {
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.pin_config_group_set = pcs_pinconf_group_set,
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.pin_config_dbg_show = pcs_pinconf_dbg_show,
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.pin_config_group_dbg_show = pcs_pinconf_group_dbg_show,
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.pin_config_config_dbg_show = pcs_pinconf_config_dbg_show,
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};
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/**
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@ -692,11 +924,157 @@ static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset)
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return index;
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}
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/*
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* check whether data matches enable bits or disable bits
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* Return value: 1 for matching enable bits, 0 for matching disable bits,
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* and negative value for matching failure.
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*/
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static int pcs_config_match(unsigned data, unsigned enable, unsigned disable)
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{
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int ret = -EINVAL;
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if (data == enable)
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ret = 1;
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else if (data == disable)
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ret = 0;
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return ret;
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}
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static void add_config(struct pcs_conf_vals **conf, enum pin_config_param param,
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unsigned value, unsigned enable, unsigned disable,
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unsigned mask)
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{
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(*conf)->param = param;
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(*conf)->val = value;
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(*conf)->enable = enable;
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(*conf)->disable = disable;
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(*conf)->mask = mask;
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(*conf)++;
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}
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static void add_setting(unsigned long **setting, enum pin_config_param param,
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unsigned arg)
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{
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**setting = pinconf_to_config_packed(param, arg);
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(*setting)++;
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}
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/* add pinconf setting with 2 parameters */
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static void pcs_add_conf2(struct pcs_device *pcs, struct device_node *np,
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const char *name, enum pin_config_param param,
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struct pcs_conf_vals **conf, unsigned long **settings)
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{
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unsigned value[2];
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int ret;
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ret = of_property_read_u32_array(np, name, value, 2);
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if (ret)
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return;
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/* set value & mask */
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value[0] &= value[1];
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/* skip enable & disable */
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add_config(conf, param, value[0], 0, 0, value[1]);
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add_setting(settings, param, value[0]);
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}
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/* add pinconf setting with 4 parameters */
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static void pcs_add_conf4(struct pcs_device *pcs, struct device_node *np,
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const char *name, enum pin_config_param param,
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struct pcs_conf_vals **conf, unsigned long **settings)
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{
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unsigned value[4];
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int ret;
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/* value to set, enable, disable, mask */
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ret = of_property_read_u32_array(np, name, value, 4);
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if (ret)
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return;
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if (!value[3]) {
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dev_err(pcs->dev, "mask field of the property can't be 0\n");
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return;
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}
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value[0] &= value[3];
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value[1] &= value[3];
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value[2] &= value[3];
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ret = pcs_config_match(value[0], value[1], value[2]);
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if (ret < 0)
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dev_dbg(pcs->dev, "failed to match enable or disable bits\n");
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add_config(conf, param, value[0], value[1], value[2], value[3]);
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add_setting(settings, param, ret);
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}
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static int pcs_parse_pinconf(struct pcs_device *pcs, struct device_node *np,
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struct pcs_function *func,
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struct pinctrl_map **map)
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{
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struct pinctrl_map *m = *map;
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int i = 0, nconfs = 0;
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unsigned long *settings = NULL, *s = NULL;
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struct pcs_conf_vals *conf = NULL;
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struct pcs_conf_type prop2[] = {
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{ "pinctrl-single,drive-strength", PIN_CONFIG_DRIVE_STRENGTH, },
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{ "pinctrl-single,slew-rate", PIN_CONFIG_SLEW_RATE, },
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{ "pinctrl-single,input-schmitt", PIN_CONFIG_INPUT_SCHMITT, },
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};
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struct pcs_conf_type prop4[] = {
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{ "pinctrl-single,bias-pullup", PIN_CONFIG_BIAS_PULL_UP, },
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{ "pinctrl-single,bias-pulldown", PIN_CONFIG_BIAS_PULL_DOWN, },
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{ "pinctrl-single,input-schmitt-enable",
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PIN_CONFIG_INPUT_SCHMITT_ENABLE, },
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};
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/* If pinconf isn't supported, don't parse properties in below. */
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if (!pcs->is_pinconf)
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return 0;
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/* cacluate how much properties are supported in current node */
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for (i = 0; i < ARRAY_SIZE(prop2); i++) {
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if (of_find_property(np, prop2[i].name, NULL))
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nconfs++;
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}
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for (i = 0; i < ARRAY_SIZE(prop4); i++) {
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if (of_find_property(np, prop4[i].name, NULL))
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nconfs++;
|
||||
}
|
||||
if (!nconfs)
|
||||
return 0;
|
||||
|
||||
func->conf = devm_kzalloc(pcs->dev,
|
||||
sizeof(struct pcs_conf_vals) * nconfs,
|
||||
GFP_KERNEL);
|
||||
if (!func->conf)
|
||||
return -ENOMEM;
|
||||
func->nconfs = nconfs;
|
||||
conf = &(func->conf[0]);
|
||||
m++;
|
||||
settings = devm_kzalloc(pcs->dev, sizeof(unsigned long) * nconfs,
|
||||
GFP_KERNEL);
|
||||
if (!settings)
|
||||
return -ENOMEM;
|
||||
s = &settings[0];
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(prop2); i++)
|
||||
pcs_add_conf2(pcs, np, prop2[i].name, prop2[i].param,
|
||||
&conf, &s);
|
||||
for (i = 0; i < ARRAY_SIZE(prop4); i++)
|
||||
pcs_add_conf4(pcs, np, prop4[i].name, prop4[i].param,
|
||||
&conf, &s);
|
||||
m->type = PIN_MAP_TYPE_CONFIGS_GROUP;
|
||||
m->data.configs.group_or_pin = np->name;
|
||||
m->data.configs.configs = settings;
|
||||
m->data.configs.num_configs = nconfs;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pcs_free_pingroups(struct pcs_device *pcs);
|
||||
|
||||
/**
|
||||
* smux_parse_one_pinctrl_entry() - parses a device tree mux entry
|
||||
* @pcs: pinctrl driver instance
|
||||
* @np: device node of the mux entry
|
||||
* @map: map entry
|
||||
* @num_maps: number of map
|
||||
* @pgnames: pingroup names
|
||||
*
|
||||
* Note that this binding currently supports only sets of one register + value.
|
||||
|
|
@ -713,6 +1091,7 @@ static int pcs_get_pin_by_offset(struct pcs_device *pcs, unsigned offset)
|
|||
static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
|
||||
struct device_node *np,
|
||||
struct pinctrl_map **map,
|
||||
unsigned *num_maps,
|
||||
const char **pgnames)
|
||||
{
|
||||
struct pcs_func_vals *vals;
|
||||
|
|
@ -785,8 +1164,18 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
|
|||
(*map)->data.mux.group = np->name;
|
||||
(*map)->data.mux.function = np->name;
|
||||
|
||||
if (pcs->is_pinconf) {
|
||||
if (pcs_parse_pinconf(pcs, np, function, map))
|
||||
goto free_pingroups;
|
||||
*num_maps = 2;
|
||||
} else {
|
||||
*num_maps = 1;
|
||||
}
|
||||
return 0;
|
||||
|
||||
free_pingroups:
|
||||
pcs_free_pingroups(pcs);
|
||||
*num_maps = 1;
|
||||
free_function:
|
||||
pcs_remove_function(pcs, function);
|
||||
|
||||
|
|
@ -815,7 +1204,8 @@ static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
|
|||
|
||||
pcs = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
*map = devm_kzalloc(pcs->dev, sizeof(**map), GFP_KERNEL);
|
||||
/* create 2 maps. One is for pinmux, and the other is for pinconf. */
|
||||
*map = devm_kzalloc(pcs->dev, sizeof(**map) * 2, GFP_KERNEL);
|
||||
if (!*map)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
@ -827,13 +1217,13 @@ static int pcs_dt_node_to_map(struct pinctrl_dev *pctldev,
|
|||
goto free_map;
|
||||
}
|
||||
|
||||
ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, pgnames);
|
||||
ret = pcs_parse_one_pinctrl_entry(pcs, np_config, map, num_maps,
|
||||
pgnames);
|
||||
if (ret < 0) {
|
||||
dev_err(pcs->dev, "no pins entries for %s\n",
|
||||
np_config->name);
|
||||
goto free_pgnames;
|
||||
}
|
||||
*num_maps = 1;
|
||||
|
||||
return 0;
|
||||
|
||||
|
|
@ -976,6 +1366,7 @@ static int pcs_probe(struct platform_device *pdev)
|
|||
INIT_LIST_HEAD(&pcs->pingroups);
|
||||
INIT_LIST_HEAD(&pcs->functions);
|
||||
INIT_LIST_HEAD(&pcs->gpiofuncs);
|
||||
pcs->is_pinconf = match->data;
|
||||
|
||||
PCS_GET_PROP_U32("pinctrl-single,register-width", &pcs->width,
|
||||
"register width not specified\n");
|
||||
|
|
@ -1046,6 +1437,8 @@ static int pcs_probe(struct platform_device *pdev)
|
|||
pcs->desc.pmxops = &pcs_pinmux_ops;
|
||||
pcs->desc.confops = &pcs_pinconf_ops;
|
||||
pcs->desc.owner = THIS_MODULE;
|
||||
if (match->data)
|
||||
pcs_pinconf_ops.is_generic = true;
|
||||
|
||||
ret = pcs_allocate_pin_table(pcs);
|
||||
if (ret < 0)
|
||||
|
|
@ -1086,7 +1479,8 @@ static int pcs_remove(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
static struct of_device_id pcs_of_match[] = {
|
||||
{ .compatible = DRIVER_NAME, },
|
||||
{ .compatible = "pinctrl-single", .data = (void *)false },
|
||||
{ .compatible = "pinconf-single", .data = (void *)true },
|
||||
{ },
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, pcs_of_match);
|
||||
|
|
|
|||
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