Merge branch 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86/pti updates from Thomas Gleixner:
"Another set of melted spectrum updates:
- Iron out the last late microcode loading issues by actually
checking whether new microcode is present and preventing the CPU
synchronization to run into a timeout induced hang.
- Remove Skylake C2 from the microcode blacklist according to the
latest Intel documentation
- Fix the VM86 POPF emulation which traps if VIP is set, but VIF is
not. Enhance the selftests to catch that kind of issue
- Annotate indirect calls/jumps for objtool on 32bit. This is not a
functional issue, but for consistency sake its the right thing to
do.
- Fix a jump label build warning observed on SPARC64 which uses 32bit
storage for the code location which is casted to 64 bit pointer w/o
extending it to 64bit first.
- Add two new cpufeature bits. Not really an urgent issue, but
provides them for both x86 and x86/kvm work. No impact on the
current kernel"
* 'x86-pti-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/microcode: Fix CPU synchronization routine
x86/microcode: Attempt late loading only when new microcode is present
x86/speculation: Remove Skylake C2 from Speculation Control microcode blacklist
jump_label: Fix sparc64 warning
x86/speculation, objtool: Annotate indirect calls/jumps for objtool on 32-bit kernels
x86/vm86/32: Fix POPF emulation
selftests/x86/entry_from_vm86: Add test cases for POPF
selftests/x86/entry_from_vm86: Exit with 1 if we fail
x86/cpufeatures: Add Intel PCONFIG cpufeature
x86/cpufeatures: Add Intel Total Memory Encryption cpufeature
This commit is contained in:
Linus Torvalds
Коммит
9e1909b9da
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@ -316,6 +316,7 @@
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#define X86_FEATURE_VPCLMULQDQ (16*32+10) /* Carry-Less Multiplication Double Quadword */
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#define X86_FEATURE_AVX512_VNNI (16*32+11) /* Vector Neural Network Instructions */
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#define X86_FEATURE_AVX512_BITALG (16*32+12) /* Support for VPOPCNT[B,W] and VPSHUF-BITQMB instructions */
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#define X86_FEATURE_TME (16*32+13) /* Intel Total Memory Encryption */
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#define X86_FEATURE_AVX512_VPOPCNTDQ (16*32+14) /* POPCNT for vectors of DW/QW */
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#define X86_FEATURE_LA57 (16*32+16) /* 5-level page tables */
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#define X86_FEATURE_RDPID (16*32+22) /* RDPID instruction */
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@ -328,6 +329,7 @@
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/* Intel-defined CPU features, CPUID level 0x00000007:0 (EDX), word 18 */
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#define X86_FEATURE_AVX512_4VNNIW (18*32+ 2) /* AVX-512 Neural Network Instructions */
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#define X86_FEATURE_AVX512_4FMAPS (18*32+ 3) /* AVX-512 Multiply Accumulation Single precision */
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#define X86_FEATURE_PCONFIG (18*32+18) /* Intel PCONFIG */
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#define X86_FEATURE_SPEC_CTRL (18*32+26) /* "" Speculation Control (IBRS + IBPB) */
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#define X86_FEATURE_INTEL_STIBP (18*32+27) /* "" Single Thread Indirect Branch Predictors */
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#define X86_FEATURE_ARCH_CAPABILITIES (18*32+29) /* IA32_ARCH_CAPABILITIES MSR (Intel) */
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@ -39,6 +39,7 @@ struct device;
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enum ucode_state {
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UCODE_OK = 0,
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UCODE_NEW,
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UCODE_UPDATED,
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UCODE_NFOUND,
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UCODE_ERROR,
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@ -183,7 +183,10 @@
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* otherwise we'll run out of registers. We don't care about CET
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* here, anyway.
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*/
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# define CALL_NOSPEC ALTERNATIVE("call *%[thunk_target]\n", \
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# define CALL_NOSPEC \
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ALTERNATIVE( \
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ANNOTATE_RETPOLINE_SAFE \
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"call *%[thunk_target]\n", \
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" jmp 904f;\n" \
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" .align 16\n" \
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"901: call 903f;\n" \
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@ -105,7 +105,7 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c)
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/*
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* Early microcode releases for the Spectre v2 mitigation were broken.
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* Information taken from;
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* - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/microcode-update-guidance.pdf
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* - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf
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* - https://kb.vmware.com/s/article/52345
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* - Microcode revisions observed in the wild
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* - Release note from 20180108 microcode release
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@ -123,7 +123,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = {
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{ INTEL_FAM6_KABYLAKE_MOBILE, 0x09, 0x80 },
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{ INTEL_FAM6_SKYLAKE_X, 0x03, 0x0100013e },
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{ INTEL_FAM6_SKYLAKE_X, 0x04, 0x0200003c },
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{ INTEL_FAM6_SKYLAKE_DESKTOP, 0x03, 0xc2 },
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{ INTEL_FAM6_BROADWELL_CORE, 0x04, 0x28 },
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{ INTEL_FAM6_BROADWELL_GT3E, 0x01, 0x1b },
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{ INTEL_FAM6_BROADWELL_XEON_D, 0x02, 0x14 },
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@ -339,7 +339,7 @@ int __init save_microcode_in_initrd_amd(unsigned int cpuid_1_eax)
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return -EINVAL;
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ret = load_microcode_amd(true, x86_family(cpuid_1_eax), desc.data, desc.size);
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if (ret != UCODE_OK)
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if (ret > UCODE_UPDATED)
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return -EINVAL;
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return 0;
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@ -683,27 +683,35 @@ static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
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static enum ucode_state
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load_microcode_amd(bool save, u8 family, const u8 *data, size_t size)
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{
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struct ucode_patch *p;
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enum ucode_state ret;
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/* free old equiv table */
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free_equiv_cpu_table();
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ret = __load_microcode_amd(family, data, size);
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if (ret != UCODE_OK)
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if (ret != UCODE_OK) {
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cleanup();
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return ret;
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}
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p = find_patch(0);
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if (!p) {
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return ret;
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} else {
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if (boot_cpu_data.microcode == p->patch_id)
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return ret;
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ret = UCODE_NEW;
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}
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#ifdef CONFIG_X86_32
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/* save BSP's matching patch for early load */
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if (save) {
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struct ucode_patch *p = find_patch(0);
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if (p) {
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if (!save)
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return ret;
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memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
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memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data),
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PATCH_MAX_SIZE));
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}
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}
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#endif
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memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data), PATCH_MAX_SIZE));
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return ret;
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}
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@ -517,7 +517,29 @@ static int check_online_cpus(void)
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return -EINVAL;
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}
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static atomic_t late_cpus;
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static atomic_t late_cpus_in;
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static atomic_t late_cpus_out;
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static int __wait_for_cpus(atomic_t *t, long long timeout)
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{
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int all_cpus = num_online_cpus();
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atomic_inc(t);
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while (atomic_read(t) < all_cpus) {
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if (timeout < SPINUNIT) {
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pr_err("Timeout while waiting for CPUs rendezvous, remaining: %d\n",
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all_cpus - atomic_read(t));
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return 1;
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}
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ndelay(SPINUNIT);
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timeout -= SPINUNIT;
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touch_nmi_watchdog();
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}
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return 0;
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}
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/*
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* Returns:
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@ -527,30 +549,16 @@ static atomic_t late_cpus;
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*/
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static int __reload_late(void *info)
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{
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unsigned int timeout = NSEC_PER_SEC;
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int all_cpus = num_online_cpus();
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int cpu = smp_processor_id();
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enum ucode_state err;
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int ret = 0;
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atomic_dec(&late_cpus);
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/*
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* Wait for all CPUs to arrive. A load will not be attempted unless all
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* CPUs show up.
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* */
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while (atomic_read(&late_cpus)) {
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if (timeout < SPINUNIT) {
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pr_err("Timeout while waiting for CPUs rendezvous, remaining: %d\n",
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atomic_read(&late_cpus));
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if (__wait_for_cpus(&late_cpus_in, NSEC_PER_SEC))
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return -1;
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}
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ndelay(SPINUNIT);
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timeout -= SPINUNIT;
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touch_nmi_watchdog();
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}
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spin_lock(&update_lock);
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apply_microcode_local(&err);
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@ -558,15 +566,22 @@ static int __reload_late(void *info)
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if (err > UCODE_NFOUND) {
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pr_warn("Error reloading microcode on CPU %d\n", cpu);
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ret = -1;
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} else if (err == UCODE_UPDATED) {
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return -1;
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/* siblings return UCODE_OK because their engine got updated already */
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} else if (err == UCODE_UPDATED || err == UCODE_OK) {
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ret = 1;
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} else {
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return ret;
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}
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atomic_inc(&late_cpus);
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while (atomic_read(&late_cpus) != all_cpus)
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cpu_relax();
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/*
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* Increase the wait timeout to a safe value here since we're
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* serializing the microcode update and that could take a while on a
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* large number of CPUs. And that is fine as the *actual* timeout will
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* be determined by the last CPU finished updating and thus cut short.
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*/
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if (__wait_for_cpus(&late_cpus_out, NSEC_PER_SEC * num_online_cpus()))
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panic("Timeout during microcode update!\n");
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return ret;
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}
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@ -579,12 +594,11 @@ static int microcode_reload_late(void)
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{
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int ret;
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atomic_set(&late_cpus, num_online_cpus());
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atomic_set(&late_cpus_in, 0);
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atomic_set(&late_cpus_out, 0);
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ret = stop_machine_cpuslocked(__reload_late, NULL, cpu_online_mask);
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if (ret < 0)
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return ret;
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else if (ret > 0)
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if (ret > 0)
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microcode_check();
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return ret;
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@ -607,7 +621,7 @@ static ssize_t reload_store(struct device *dev,
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return size;
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tmp_ret = microcode_ops->request_microcode_fw(bsp, µcode_pdev->dev, true);
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if (tmp_ret != UCODE_OK)
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if (tmp_ret != UCODE_NEW)
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return size;
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get_online_cpus();
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@ -691,10 +705,8 @@ static enum ucode_state microcode_init_cpu(int cpu, bool refresh_fw)
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if (system_state != SYSTEM_RUNNING)
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return UCODE_NFOUND;
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ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev,
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refresh_fw);
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if (ustate == UCODE_OK) {
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ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev, refresh_fw);
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if (ustate == UCODE_NEW) {
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pr_debug("CPU%d updated upon init\n", cpu);
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apply_microcode_on_target(cpu);
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}
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@ -862,6 +862,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
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unsigned int leftover = size;
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unsigned int curr_mc_size = 0, new_mc_size = 0;
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unsigned int csig, cpf;
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enum ucode_state ret = UCODE_OK;
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while (leftover) {
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struct microcode_header_intel mc_header;
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@ -903,6 +904,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
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new_mc = mc;
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new_mc_size = mc_size;
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mc = NULL; /* trigger new vmalloc */
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ret = UCODE_NEW;
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}
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ucode_ptr += mc_size;
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@ -932,7 +934,7 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
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pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
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cpu, new_rev, uci->cpu_sig.rev);
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return UCODE_OK;
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return ret;
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}
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static int get_ucode_fw(void *to, const void *from, size_t n)
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|
|
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@ -727,7 +727,8 @@ void handle_vm86_fault(struct kernel_vm86_regs *regs, long error_code)
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return;
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check_vip:
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if (VEFLAGS & X86_EFLAGS_VIP) {
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if ((VEFLAGS & (X86_EFLAGS_VIP | X86_EFLAGS_VIF)) ==
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(X86_EFLAGS_VIP | X86_EFLAGS_VIF)) {
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save_v86_state(regs, VM86_STI);
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return;
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}
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|
|
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|
|
@ -373,7 +373,8 @@ static void __jump_label_update(struct static_key *key,
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if (kernel_text_address(entry->code))
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arch_jump_label_transform(entry, jump_label_type(entry));
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else
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WARN_ONCE(1, "can't patch jump_label at %pS", (void *)entry->code);
|
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WARN_ONCE(1, "can't patch jump_label at %pS",
|
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(void *)(unsigned long)entry->code);
|
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}
|
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}
|
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}
|
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|
|
|
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|
|
@ -95,6 +95,10 @@ asm (
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"int3\n\t"
|
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"vmcode_int80:\n\t"
|
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"int $0x80\n\t"
|
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"vmcode_popf_hlt:\n\t"
|
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"push %ax\n\t"
|
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"popf\n\t"
|
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"hlt\n\t"
|
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"vmcode_umip:\n\t"
|
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/* addressing via displacements */
|
||||
"smsw (2052)\n\t"
|
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|
|
@ -124,8 +128,8 @@ asm (
|
|||
|
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extern unsigned char vmcode[], end_vmcode[];
|
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extern unsigned char vmcode_bound[], vmcode_sysenter[], vmcode_syscall[],
|
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vmcode_sti[], vmcode_int3[], vmcode_int80[], vmcode_umip[],
|
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vmcode_umip_str[], vmcode_umip_sldt[];
|
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vmcode_sti[], vmcode_int3[], vmcode_int80[], vmcode_popf_hlt[],
|
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vmcode_umip[], vmcode_umip_str[], vmcode_umip_sldt[];
|
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|
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/* Returns false if the test was skipped. */
|
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static bool do_test(struct vm86plus_struct *v86, unsigned long eip,
|
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|
|
@ -175,7 +179,7 @@ static bool do_test(struct vm86plus_struct *v86, unsigned long eip,
|
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(VM86_TYPE(ret) == rettype && VM86_ARG(ret) == retarg)) {
|
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printf("[OK]\tReturned correctly\n");
|
||||
} else {
|
||||
printf("[FAIL]\tIncorrect return reason\n");
|
||||
printf("[FAIL]\tIncorrect return reason (started at eip = 0x%lx, ended at eip = 0x%lx)\n", eip, v86->regs.eip);
|
||||
nerrs++;
|
||||
}
|
||||
|
||||
|
|
@ -264,6 +268,9 @@ int main(void)
|
|||
v86.regs.ds = load_addr / 16;
|
||||
v86.regs.es = load_addr / 16;
|
||||
|
||||
/* Use the end of the page as our stack. */
|
||||
v86.regs.esp = 4096;
|
||||
|
||||
assert((v86.regs.cs & 3) == 0); /* Looks like RPL = 0 */
|
||||
|
||||
/* #BR -- should deliver SIG??? */
|
||||
|
|
@ -295,6 +302,23 @@ int main(void)
|
|||
v86.regs.eflags &= ~X86_EFLAGS_IF;
|
||||
do_test(&v86, vmcode_sti - vmcode, VM86_STI, 0, "STI with VIP set");
|
||||
|
||||
/* POPF with VIP set but IF clear: should not trap */
|
||||
v86.regs.eflags = X86_EFLAGS_VIP;
|
||||
v86.regs.eax = 0;
|
||||
do_test(&v86, vmcode_popf_hlt - vmcode, VM86_UNKNOWN, 0, "POPF with VIP set and IF clear");
|
||||
|
||||
/* POPF with VIP set and IF set: should trap */
|
||||
v86.regs.eflags = X86_EFLAGS_VIP;
|
||||
v86.regs.eax = X86_EFLAGS_IF;
|
||||
do_test(&v86, vmcode_popf_hlt - vmcode, VM86_STI, 0, "POPF with VIP and IF set");
|
||||
|
||||
/* POPF with VIP clear and IF set: should not trap */
|
||||
v86.regs.eflags = 0;
|
||||
v86.regs.eax = X86_EFLAGS_IF;
|
||||
do_test(&v86, vmcode_popf_hlt - vmcode, VM86_UNKNOWN, 0, "POPF with VIP clear and IF set");
|
||||
|
||||
v86.regs.eflags = 0;
|
||||
|
||||
/* INT3 -- should cause #BP */
|
||||
do_test(&v86, vmcode_int3 - vmcode, VM86_TRAP, 3, "INT3");
|
||||
|
||||
|
|
@ -318,7 +342,7 @@ int main(void)
|
|||
clearhandler(SIGSEGV);
|
||||
|
||||
/* Make sure nothing explodes if we fork. */
|
||||
if (fork() > 0)
|
||||
if (fork() == 0)
|
||||
return 0;
|
||||
|
||||
return (nerrs == 0 ? 0 : 1);
|
||||
|
|
|
|||
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